22d0492f34
Fix up a few more spots of addrmode2 (or not) changes that were
...
missed. Update some comments accordingly.
Fixes rdar://8652289
llvm-svn: 118888
2010-11-12 09:48:30 +00:00
68147ee320
Trailing whitespace.
...
llvm-svn: 118606
2010-11-09 19:22:26 +00:00
89965d7091
Make sure we have movw on the target before using it.
...
Fixes 8559.
llvm-svn: 118333
2010-11-06 07:53:11 +00:00
71049f78ed
In the calling convention logic, ValVT is always a legal type,
...
and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
e4dd7378d0
Optimize generated code for integer materialization a bit.
...
llvm-svn: 118192
2010-11-03 20:21:17 +00:00
1462777017
Simplify uses of MVT and EVT. An MVT can be compared directly
...
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
llvm-svn: 118169
2010-11-03 12:17:33 +00:00
f5dda01f33
Inside the calling convention logic LocVT is always a simple
...
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
c63d846ad6
Invert these branches by default, it makes assembly comparisons a little
...
easier to read.
llvm-svn: 118148
2010-11-03 04:29:11 +00:00
1e43892e4b
Make sure we're only storing a single bit here.
...
llvm-svn: 118126
2010-11-02 23:59:09 +00:00
b2abb508ae
Remove an assert - it's possible to be hit, and we just want to avoid
...
handling those cases for now.
llvm-svn: 117996
2010-11-02 01:24:49 +00:00
ac746e1b38
Whitespeace
...
llvm-svn: 117995
2010-11-02 01:22:45 +00:00
e8fccc82e4
No really, no thumb1 for arm fast isel. Also add an informative comment as
...
to what someone would need to do to support thumb1.
llvm-svn: 117994
2010-11-02 01:21:28 +00:00
04b0a3e651
Make sure we have a legal type (and simple) before continuing.
...
llvm-svn: 117848
2010-10-30 21:25:26 +00:00
5c308f8452
Handle comparison values we already have - this fixes the consumer-typeset
...
failure for llvm-gcc on arm fast isel.
llvm-svn: 117710
2010-10-29 21:08:19 +00:00
338de3ee56
Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like
...
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752
llvm-svn: 117505
2010-10-27 23:12:14 +00:00
055de2c789
Trailing whitespace
...
llvm-svn: 117496
2010-10-27 21:39:08 +00:00
5a7c715470
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
...
rdar://8477752.
llvm-svn: 117419
2010-10-27 00:19:44 +00:00
1e4d9a17c2
First part of refactoring ARM addrmode2 (load/store) instructions to be more
...
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
llvm-svn: 117409
2010-10-26 22:37:02 +00:00
c9616f26bd
Move rejection of NEON parameters earlier in fast isel call processing,
...
note that we can actually handle some f64 arguments.
llvm-svn: 117209
2010-10-23 09:37:17 +00:00
21abfc9450
Silence compiler warnings.
...
llvm-svn: 117128
2010-10-22 18:57:05 +00:00
93bbe6599f
Add some basic ret instruction support to arm fast-isel.
...
llvm-svn: 117085
2010-10-22 01:28:00 +00:00
2f8637d393
These don't need to be virtual.
...
llvm-svn: 117068
2010-10-21 21:47:51 +00:00
b353e4f579
Handle storing args to the stack for calls.
...
llvm-svn: 117055
2010-10-21 20:09:54 +00:00
73bc5b0f86
More load/store refactoring, call reg+offset simplification from within
...
the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.
llvm-svn: 117051
2010-10-21 19:40:30 +00:00
4ac3ed0219
Custom lower f64 args passed in integer registers.
...
llvm-svn: 116977
2010-10-21 00:01:47 +00:00
af719ef86b
Fix a TODO by removing some unnecesary copies.
...
llvm-svn: 116915
2010-10-20 08:02:24 +00:00
7b92c2a9a0
Revert r116220 - thus turning arm fast isel back on by default.
...
llvm-svn: 116762
2010-10-18 22:53:53 +00:00
167a700229
Remove the check for invalid calling conventions. Testing shows that they're
...
working just fine.
llvm-svn: 116698
2010-10-18 06:49:12 +00:00
c103c668ce
Lift arg promotion from the X86 backend. This should be unified at some point.
...
llvm-svn: 116694
2010-10-18 02:17:53 +00:00
a8a9f3c52b
Now that we handle all allocas via a non-SP reg offset remove all of the
...
special case handling for ARM::SP.
llvm-svn: 116688
2010-10-17 11:08:44 +00:00
730764da62
Allow more load types to be materialized through the allocas.
...
llvm-svn: 116683
2010-10-17 06:07:26 +00:00
d265b3fcfe
Optimize GEP off of intermediate allocas.
...
llvm-svn: 116681
2010-10-17 01:51:42 +00:00
a0b9c2e9c0
Fix comment.
...
llvm-svn: 116680
2010-10-17 01:42:53 +00:00
abc3a9d34b
Turn on AddOperator folding in GEP.
...
llvm-svn: 116679
2010-10-17 01:41:46 +00:00
947e422c46
Use the i12 immediate versions of the load instructions - they're handled
...
more in the post-passes.
llvm-svn: 116678
2010-10-17 01:40:27 +00:00
c918d550b6
Fix some funky formatting that got through.
...
llvm-svn: 116653
2010-10-16 01:10:35 +00:00
f410acbbd5
Make sure offset is 0 for load/store register to the stack call.
...
llvm-svn: 116640
2010-10-15 23:07:10 +00:00
a3e64c1791
Fix else if -> if in store machinery.
...
llvm-svn: 116628
2010-10-15 22:32:37 +00:00
a9b3901b47
Refactor ARM fast-isel reg + offset to be a base + offset.
...
llvm-svn: 116622
2010-10-15 21:32:12 +00:00
e4b3d6b379
Expand GEP handling for constant offsets.
...
llvm-svn: 116594
2010-10-15 18:02:07 +00:00
21d0c173f4
Handle more complex GEP based loads and add a few TODOs to deal with
...
GEP + alloca.
llvm-svn: 116474
2010-10-14 09:29:41 +00:00
340cd5174b
A few 80 column fixes.
...
llvm-svn: 116451
2010-10-13 23:34:31 +00:00
ef83e21b57
Update comment.
...
llvm-svn: 116438
2010-10-13 21:41:51 +00:00
dd0821e7ff
Start handling more global variables.
...
llvm-svn: 116401
2010-10-13 09:11:46 +00:00
22e051eef0
Fix thinko in arm fast isel alloca rewrite.
...
llvm-svn: 116339
2010-10-12 21:23:43 +00:00
7cd5cda6bb
Rework alloca handling so that we can load or store from casted
...
address that we've looked through.
Fixes compilation problems in tramp3d from earlier patch.
llvm-svn: 116296
2010-10-12 05:39:06 +00:00
db3bcc9910
Handle a wider arrangement of loads.
...
llvm-svn: 116284
2010-10-12 00:43:21 +00:00
d42340ecfd
Use a sane mechanism for that assert.
...
llvm-svn: 116249
2010-10-11 22:01:22 +00:00
72b91c1765
We're not going to handle dynamic allocas anywhere else.
...
llvm-svn: 116240
2010-10-11 21:37:35 +00:00
71ef1af66b
Make sure that the call stack adjustments have default operands. Also
...
leave custom lowerings for later.
Fixes some nightly tests.
llvm-svn: 116232
2010-10-11 21:20:02 +00:00
e2a0b6841a
Found a bug turning this on by default. Disable again for now.
...
llvm-svn: 116220
2010-10-11 20:26:21 +00:00
46cc854e5e
Fix help text.
...
llvm-svn: 116218
2010-10-11 20:15:02 +00:00
5501b7e805
Change flag from Enable to Disable since we're enabled by default.
...
Also don't use fast-isel on non-darwin since it's untested.
llvm-svn: 116217
2010-10-11 20:05:22 +00:00
2276e87a65
Turn on arm fast isel by default.
...
llvm-svn: 116212
2010-10-11 18:48:18 +00:00
e1bcb43bb9
Copy and pasteo.
...
llvm-svn: 116198
2010-10-11 08:40:05 +00:00
7ac602bc8e
Whitespace cleanup in ARM fast isel.
...
llvm-svn: 116197
2010-10-11 08:38:55 +00:00
eae1b38550
Add srem libcall support to ARM fast isel.
...
llvm-svn: 116196
2010-10-11 08:37:26 +00:00
e11017c19e
Add i8 sdiv support for ARM fast isel.
...
llvm-svn: 116195
2010-10-11 08:31:54 +00:00
511aa31965
Implement select handling for ARM fast-isel.
...
llvm-svn: 116194
2010-10-11 08:27:59 +00:00
548587c31c
Fix the store part of this as well. Fixes smg2000.
...
llvm-svn: 116123
2010-10-08 23:52:16 +00:00
15bc2438d9
Move to thumb2 loads, fixes a problem with incoming registers
...
as thumb1.
Fixes lencod.
llvm-svn: 116027
2010-10-08 01:13:17 +00:00
3e1e447ca2
Remember to promote load/store types for stack to register size.
...
llvm-svn: 115984
2010-10-07 21:40:18 +00:00
a2583ea9f2
Use the correct register class for load instructions - fixes
...
compilation of MultiSource/Benchmarks/Bullet.
llvm-svn: 115907
2010-10-07 05:50:44 +00:00
76a9752d45
Use the correct register class here.
...
llvm-svn: 115906
2010-10-07 05:39:19 +00:00
a98be90efe
Use the thumb2 conditional move instruction.
...
llvm-svn: 115905
2010-10-07 05:31:49 +00:00
6d74673366
Remove in-progress assertion, add TODO.
...
llvm-svn: 115904
2010-10-07 05:14:08 +00:00
b9f2d50d5f
Comment out fastisel debugging message.
...
llvm-svn: 115717
2010-10-05 23:50:58 +00:00
8cfc459274
Random cleanup and make the intermediate register in fptosi a
...
32-bit fp reg, not 64-bit.
Fixes SingleSource.
llvm-svn: 115711
2010-10-05 23:13:24 +00:00
7787f79f21
Start on lowering global addresses.
...
llvm-svn: 115390
2010-10-02 00:32:44 +00:00
83a5ec8fe0
Stub out constant GV handling, fixes C++ eh tests.
...
llvm-svn: 115375
2010-10-01 23:24:42 +00:00
9d0136274b
Direct calls only for arm fast isel for now.
...
llvm-svn: 115350
2010-10-01 21:33:12 +00:00
6080da7a79
Fix thinko on store instructions. Fixes test_indvars failure.
...
llvm-svn: 115342
2010-10-01 20:46:04 +00:00
c1e209d40e
Implement double return values in calls. Fixes
...
SingleSource/Regression/C/casts.c.
llvm-svn: 115246
2010-10-01 00:00:11 +00:00
56094ff402
Movement and cleanup.
...
llvm-svn: 115225
2010-09-30 22:34:19 +00:00
78f8d4eaf0
Start of generalized call support for ARM fast isel.
...
llvm-svn: 115203
2010-09-30 20:49:44 +00:00
7939806ecc
Refactor arm fast isel libcall handling so that pieces can be used
...
for generic call handling.
llvm-svn: 115105
2010-09-29 23:11:09 +00:00
b024be3162
Add a convenience variable so I'm not chasing all over looking for
...
a context.
llvm-svn: 115094
2010-09-29 22:24:45 +00:00
3a7e8cd6bd
Rework comparison handling to set a register on true/false. This avoids
...
problems with phi-nodes in blocks that have hard and not virtual registers.
Accordingly update branch handling to compensate.
llvm-svn: 115013
2010-09-29 01:14:47 +00:00
edd4b600f3
Remove unnecessary set ahead of time.
...
llvm-svn: 115011
2010-09-29 00:50:57 +00:00
2c8e7f421c
Remove assert, add comment.
...
llvm-svn: 115009
2010-09-29 00:49:09 +00:00
a86a6d2fed
32-bit constant ints only for now.
...
llvm-svn: 115001
2010-09-28 22:47:54 +00:00
953b1afd5f
Integer materialization needed the same thinko change.
...
llvm-svn: 114994
2010-09-28 21:55:34 +00:00
7990df1ae2
Rework builtin handling and call setup. The builtin handling
...
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.
llvm-svn: 114934
2010-09-28 01:21:42 +00:00
6f98bfd870
Fix fp constant loads to have a destination register.
...
llvm-svn: 114930
2010-09-28 00:35:09 +00:00
0720611e3a
Insert missing coherency in comment. Add a quick check for hardware
...
divide support also.
llvm-svn: 114813
2010-09-27 06:08:12 +00:00
29ab6d1f82
Mass rename for Jim.
...
llvm-svn: 114812
2010-09-27 06:02:23 +00:00
a6ba082cb6
Thumb opcodes for thumb calls.
...
llvm-svn: 114263
2010-09-18 02:32:38 +00:00
aef6499bf1
Add addrmode5 fp load support. Swap float/thumb operand adding to handle
...
thumb with floating point.
llvm-svn: 114256
2010-09-18 01:59:37 +00:00
30f2300ed2
Floating point stores have a 3rd addressing mode type.
...
llvm-svn: 114254
2010-09-18 01:23:38 +00:00
2ccc1aa696
Rework arm fast isel branch and compare code.
...
llvm-svn: 114226
2010-09-17 22:28:18 +00:00
8b9126694d
Emit libcalls for SDIV, this requires some call infrastructure
...
that needs to be shared a bit more widely around.
llvm-svn: 113886
2010-09-14 23:03:37 +00:00
72497e5d90
Start sketching out ARM fast-isel calls.
...
llvm-svn: 113662
2010-09-10 23:18:12 +00:00
cc766a20d3
For consistency.
...
llvm-svn: 113659
2010-09-10 23:10:30 +00:00
712bd0a604
Fix build error.
...
llvm-svn: 113566
2010-09-10 00:35:09 +00:00
860fc9370f
Update comments, reorganize some code, rename variables to be
...
more clear. No functional change.
llvm-svn: 113565
2010-09-10 00:34:35 +00:00
22fd29a94a
64-bit fp loads can come straight out of the constant pool, not as
...
bad as I'd thought.
llvm-svn: 113561
2010-09-09 23:50:00 +00:00
4bd7047324
SIToFP and FPToSI conversions work only on fp-reg to fp-reg. Move
...
some data around and implement a couple of move routines to do this.
llvm-svn: 113546
2010-09-09 21:44:45 +00:00
2cbe0fd956
New "move to fp reg" routine. Use it.
...
llvm-svn: 113537
2010-09-09 20:49:25 +00:00
82b05d7206
"Strike that, reverse it." -- Mr. Wonka.
...
Truncate when truncating, extend when extending.
llvm-svn: 113536
2010-09-09 20:36:19 +00:00
5903c0be2a
Add FPTrunc, fix some bugs where I forgot to update the value map.
...
llvm-svn: 113533
2010-09-09 20:26:31 +00:00
Eric Christopher