Mark Schimmel
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7c82db3634
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[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
This change improves the code generated for long long addition and subtraction
Differential Revision: https://reviews.llvm.org/D109615
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2021-09-10 13:04:08 -07:00 |
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Thomas Johnson
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ce1dc9d647
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[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions
Differential Revision: https://reviews.llvm.org/D108598
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2021-08-24 11:53:20 -07:00 |
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Thomas Johnson
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b821086876
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[ARC] Add codegen for count trailing zeros intrinsic for the ARC backend
Differential Revision: https://reviews.llvm.org/D107828
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2021-08-10 12:07:35 -07:00 |
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Thomas Johnson
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f8a4495149
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[ARC] Add codegen for llvm.ctlz intrinsic for the ARC backend
Differential Revision: https://reviews.llvm.org/D107611
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2021-08-06 12:18:06 -07:00 |
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Pete Couperus
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0f661418aa
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[ARC] Update brcc test.
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2020-08-28 17:07:25 -07:00 |
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Fangrui Song
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5b50a1656a
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[ARC] Fix CodeGen/ARC/brcc.ll
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2020-08-15 19:33:35 -07:00 |
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Fangrui Song
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ac14f7b10c
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[lit] Delete empty lines at the end of lit.local.cfg NFC
llvm-svn: 363538
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2019-06-17 09:51:07 +00:00 |
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Pete Couperus
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b062239d63
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[ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores.
Build on newly introduced ARC postincrement loads/stores from r356200.
Patch By Denis Antrushin! <denis@synopsys.com>
Differential Revision: https://reviews.llvm.org/D59409
llvm-svn: 356606
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2019-03-20 20:06:21 +00:00 |
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Pete Couperus
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2d1f6d67c5
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[ARC] Add ARC backend.
Add the ARC backend as an experimental target to lib/Target.
Reviewed at: https://reviews.llvm.org/D36331
llvm-svn: 311667
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2017-08-24 15:40:33 +00:00 |