aea37d65c8
Set the is64bit flag and propagate it to PowerPCRegisterInfo
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llvm-svn: 15671
2004-08-11 23:45:43 +00:00
dad438bfb9
Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
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llvm-svn: 15631
2004-08-10 22:47:03 +00:00
58499ead7d
ADDI can take several forms, including:
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addi r1, r2, 0
addi r1, <frame index #n>, 0
so we must check for the second parameter being a register for this instruction
to be considered a reg-to-reg copy.
llvm-svn: 15244
2004-07-26 21:50:38 +00:00
6c125a92d7
assert() on MachineInstr properties instead of checking them dynamically
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llvm-svn: 15243
2004-07-26 21:35:58 +00:00
43f1c4045a
* Recognize `addi r1, r2, 0' a move instruction
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* List formats of instructions currently recognized as moves
llvm-svn: 15242
2004-07-26 21:29:00 +00:00
780da8425f
Fix code formatting
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llvm-svn: 14899
2004-07-16 20:54:25 +00:00
3adf84ba0d
Implement PowerPCInstrInfo::isMoveInstr(), patch by Nate Begeman
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llvm-svn: 14898
2004-07-16 20:51:55 +00:00
e05203fb40
Initial revision
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llvm-svn: 14283
2004-06-21 16:55:25 +00:00
Misha Brukman