Kevin Enderby
4886cc8be7
Add some more MC tests for ARM arithmetic instructions that update or don't
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update the condition codes. These come from my test generator and are just
the ones that MC currently assembles correctly.
llvm-svn: 121830
2010-12-15 01:24:36 +00:00
Kevin Enderby
3164a346e6
Add support for parsing ARM arithmetic instructions that update or don't update
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the condition codes. Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix. The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present. Four simple test cases added for now, lots more to come.
llvm-svn: 121401
2010-12-09 19:19:43 +00:00
Bill Wendling
c01d679928
Add encoding for ARM "trap" instruction.
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llvm-svn: 119938
2010-11-21 11:05:29 +00:00
Bill Wendling
2063b84297
Add support for parsing the writeback ("!") token.
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llvm-svn: 119761
2010-11-18 23:43:05 +00:00
Bill Wendling
92756fff57
Test encodings for LDM and STM.
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llvm-svn: 119315
2010-11-16 01:38:20 +00:00
Bill Wendling
603bd8f54c
Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work
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with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.
llvm-svn: 118094
2010-11-02 22:31:46 +00:00
Jim Grosbach
0190a649e8
Mark ARM subtarget features that are available for the assembler.
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llvm-svn: 117929
2010-11-01 16:59:54 +00:00
Chris Lattner
5d6f6a061b
add simple support for addrmode5 operands, allowing
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vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
llvm-svn: 117626
2010-10-29 00:27:31 +00:00
Chris Lattner
327a61423b
most simple arm instructions match correctly now,
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it looks like we're not handling [] operands though
llvm-svn: 117607
2010-10-28 21:31:07 +00:00
Chris Lattner
1be0697ab9
fix the asmmatcher generator to handle targets with no RegisterPrefix
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(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
llvm-svn: 117606
2010-10-28 21:28:42 +00:00
Chris Lattner
fbae9435c9
move ARM MC tests up one level.
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llvm-svn: 115414
2010-10-02 18:52:05 +00:00