c01d679928
Add encoding for ARM "trap" instruction.
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llvm-svn: 119938
2010-11-21 11:05:29 +00:00
0ce06c08fb
Add a CMP test.
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llvm-svn: 117187
2010-10-22 23:48:01 +00:00
b40a60fa2f
tidy up.
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llvm-svn: 117166
2010-10-22 22:15:48 +00:00
2c9ae05c67
ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.
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llvm-svn: 117165
2010-10-22 22:12:16 +00:00
2b80543fc2
Add the encoding information for the rest of the ARM mode multiply instructions.
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llvm-svn: 117133
2010-10-22 19:15:30 +00:00
6956a60563
More ARM multiply instuction binary encodings.
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llvm-svn: 117121
2010-10-22 18:35:16 +00:00
22261600a8
More ARM multiply instruction encoding information.
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llvm-svn: 117108
2010-10-22 17:16:17 +00:00
a97becfaac
ARM binary encodings for MVN variants.
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llvm-svn: 117076
2010-10-21 22:19:32 +00:00
5edb03ee57
ARM Binary encoding information for BFC/BFI instructions.
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llvm-svn: 117072
2010-10-21 22:03:21 +00:00
68a335e185
ARM mode encoding information for UBFX and SBFX instructions.
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llvm-svn: 116588
2010-10-15 17:15:16 +00:00
0b5c743811
Simplify test file a bit.
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llvm-svn: 116540
2010-10-14 23:32:44 +00:00
89efff3763
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
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are just forms of that instruction).
llvm-svn: 116538
2010-10-14 23:29:18 +00:00
eafcb27ded
MOVi16 and MOVT ARM mode encodings.
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llvm-svn: 116498
2010-10-14 18:54:27 +00:00
1e7db68774
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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llvm-svn: 116421
2010-10-13 19:56:10 +00:00
651dc7c9e9
Add ARM mode operand encoding information for ADDE/SUBE instructions.
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llvm-svn: 116412
2010-10-13 18:00:52 +00:00
8c519c0d4b
Add ARM encoding information for comparisons, forced-cc-out arithmetics, and
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arithmetic-with-carry-in instructions.
llvm-svn: 116384
2010-10-13 00:50:27 +00:00
d5f8c3350d
Be nitpicky and line up the comments.
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llvm-svn: 116365
2010-10-12 23:14:03 +00:00
6fead930af
Add encoding information for the remainder of the generic arithmetic
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ARM instructions.
llvm-svn: 116313
2010-10-12 17:11:26 +00:00
b7c2962d20
MC machine encoding for simple aritmetic instructions that use a shifted
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register operand.
llvm-svn: 116259
2010-10-11 23:16:21 +00:00
c43c930690
Implement a few more binary encoding bits. Still very early stage proof-of-
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concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.
This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.
llvm-svn: 116112
2010-10-08 21:45:55 +00:00
42a07e8545
Add test file for simple ARM binary encodings with MC
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llvm-svn: 116024
2010-10-08 00:47:59 +00:00
Bill Wendling