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Author SHA1 Message Date
Alexander Timofeev c4d256a590 [AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.' 
Detailed description:

    After https://reviews.llvm.org/D59990 submit several issues were discovered.
    Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly.

    Discovered issues were addressed in the following commits:

    https://reviews.llvm.org/D67662
    https://reviews.llvm.org/D67101
    https://reviews.llvm.org/D63953
    https://reviews.llvm.org/D63731

    This change brings back AMDGPU specific changes.

  Reviewed by: rampitec, arsenm

  Differential Revision: https://reviews.llvm.org/D68635

llvm-svn: 374767
 2019-10-14 12:01:10 +00:00
Piotr Sobczak 252a584cbd [AMDGPU] Add test 
Summary:
Add test checking that the redundant immediate MOV instruction
(by-product of handling phi nodes) is not found in the generated code.

Reviewers: arsenm, anton-afanasyev, craig.topper, rtereshin, bogner

Reviewed By: arsenm

Subscribers: kzhuravl, yaxunl, dstuttard, tpr, t-tye, wdng, jvesely, nhaehnle, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63860

llvm-svn: 370634
 2019-09-02 10:02:54 +00:00