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3 Commits

Author SHA1 Message Date
Nemanja Ivanovic 7fbaa8097e [PowerPC] Fix VSX clobbers of CSR registers 
If an inline asm statement clobbers a VSX register that overlaps with a
callee-saved Altivec register or FPR, we will not record the clobber and will
therefore violate the ABI. This is clearly a bug so this patch fixes it.

Differential revision: https://reviews.llvm.org/D68576
 2019-11-25 11:41:34 -06:00
Stefan Pintilie bd5429ef38 [PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue. 
Move the stdu instruction in the prologue and epilogue.
This should provide a small performance boost in functions that are able to do
this. I've kept this change rather conservative at the moment and functions
with frame pointers or base pointers will not try to move the stack pointer
update.

Differential Revision: https://reviews.llvm.org/D42590

llvm-svn: 355085
 2019-02-28 12:23:28 +00:00
Stefan Pintilie 1113940df2 [PowerPC][NFC] Added tests for prologue and epilogue code gen. 
Added four test files to check the existing behaviour of prologue
and epilogue code generation. This patch was done as a setup for
the upcoming patch listed on Phabricator that will change how the
prologue and epilogue work.
The upcoming patch is: https://reviews.llvm.org/D42590

llvm-svn: 353994
 2019-02-13 23:37:23 +00:00