Commit Graph

2158 Commits

Author SHA1 Message Date
Chris Lattner efd1cddb5a Tell TargetLoweringOpt whether it is running before
or after legalize.

llvm-svn: 45321
2007-12-22 20:56:36 +00:00
Chris Lattner 843cad4df2 Add a new FGETSIGN operation, which defaults to expand on all
targets.

llvm-svn: 45320
2007-12-22 20:47:56 +00:00
Evan Cheng f989141d30 More accurate checks for two-address constraints.
llvm-svn: 45259
2007-12-20 09:25:31 +00:00
Evan Cheng 61bc51ee97 Bring back a burr scheduling heuristic that's still needed.
llvm-svn: 45252
2007-12-20 02:22:36 +00:00
Duncan Sands e9d8861cdf Simplify LowerCallTo by using a callsite.
llvm-svn: 45198
2007-12-19 09:48:52 +00:00
Duncan Sands 030bce7b83 The C++ exception handling personality function wants
to know about calls that cannot throw ('nounwind'):
if such a call does throw for some reason then the
personality will terminate the program.  The distinction
between an ordinary call and a nounwind call is that
an ordinary call gets an entry in the exception table
but a nounwind call does not.  This patch sets up the
exception table appropriately.  One oddity is that
I've chosen to bracket nounwind calls with labels (like
invokes) - the other choice would have been to bracket
ordinary calls with labels.  While bracketing
ordinary calls is more natural (because bracketing
by labels would then correspond exactly to getting an
entry in the exception table), I didn't do it because
introducing labels impedes some optimizations and I'm
guessing that ordinary calls occur more often than
nounwind calls.  This fixes the gcc filter2 eh test,
at least at -O0 (the inliner needs some tweaking at
higher optimization levels).

llvm-svn: 45197
2007-12-19 07:36:31 +00:00
Evan Cheng 9f06e5e2df Don't leave newly created nodes around if it turns out they are not needed.
llvm-svn: 45186
2007-12-19 01:34:38 +00:00
Evan Cheng 483a969ece Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
llvm-svn: 45167
2007-12-18 19:38:14 +00:00
Evan Cheng 78ced47a2f Also print alignment and volatileness.
llvm-svn: 45164
2007-12-18 19:06:30 +00:00
Evan Cheng 91e0fc9cb4 FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
llvm-svn: 45157
2007-12-18 08:42:10 +00:00
Evan Cheng e2dbba5828 SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.
llvm-svn: 45151
2007-12-18 07:02:08 +00:00
Duncan Sands b5a79d0eaa Make invokes of inline asm legal. Teach codegen
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).

llvm-svn: 45108
2007-12-17 18:08:19 +00:00
Evan Cheng 0fcf56f8f5 Bug fix. Must also match ResNo when matching an operand with a user.
llvm-svn: 45028
2007-12-14 08:25:15 +00:00
Dan Gohman 7a7742c2fe Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
2007-12-12 22:21:26 +00:00
Evan Cheng f54030231e Pretty print shuffle mask operand.
llvm-svn: 44837
2007-12-11 02:08:35 +00:00
Chris Lattner 64443973c0 Duncan points out that the subtraction is unneeded since hte code
knows the vector is not pow2

llvm-svn: 44740
2007-12-09 17:56:34 +00:00
Chris Lattner 69d3298777 Add support for splitting the operand of a return instruction.
llvm-svn: 44728
2007-12-09 00:06:19 +00:00
Chris Lattner e48fc80446 add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
llvm-svn: 44726
2007-12-08 23:58:27 +00:00
Chris Lattner de9046af54 Implement splitting support for store, allowing us to compile:
%f8 = type <8 x float>

define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
	%p = load %f8* %P		; <%f8> [#uses=1]
	%q = load %f8* %Q		; <%f8> [#uses=1]
	%R = add %f8 %p, %q		; <%f8> [#uses=1]
	store %f8 %R, %f8* %S
	ret void
}

into:

_test_f8:
	movaps	16(%rdi), %xmm0
	addps	16(%rsi), %xmm0
	movaps	(%rdi), %xmm1
	addps	(%rsi), %xmm1
	movaps	%xmm0, 16(%rdx)
	movaps	%xmm1, (%rdx)
	ret

llvm-svn: 44725
2007-12-08 23:24:26 +00:00
Chris Lattner de87224cd9 implement vector splitting of load, undef, and binops.
llvm-svn: 44724
2007-12-08 23:08:49 +00:00
Chris Lattner 1ef437d4e1 implement some methods.
llvm-svn: 44723
2007-12-08 22:40:18 +00:00
Chris Lattner a5e7db115e add scaffolding for splitting of vectors.
llvm-svn: 44722
2007-12-08 22:37:41 +00:00
Chris Lattner 8c8eaf6b92 reorganize header to separate into functional blocks.
llvm-svn: 44719
2007-12-08 21:59:32 +00:00
Chris Lattner 4063bd6eae split scalarization out to its own file.
llvm-svn: 44718
2007-12-08 20:30:28 +00:00
Chris Lattner 5c7c46baaf Split expansion out into its own file.
llvm-svn: 44717
2007-12-08 20:27:32 +00:00
Chris Lattner 029c816460 Split promotion support out to its own file.
llvm-svn: 44716
2007-12-08 20:24:38 +00:00
Chris Lattner 757d4beba9 Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
llvm-svn: 44715
2007-12-08 20:17:13 +00:00
Chris Lattner 92288147b6 Split the class definition of DAGTypeLegalizer out into a header.
Leave it visibility hidden, but not in an anon namespace.

llvm-svn: 44714
2007-12-08 20:16:06 +00:00
Dale Johannesen 5eff4de9c8 Redo previous patch so optimization only done for i1.
Simpler and safer.

llvm-svn: 44663
2007-12-06 17:53:31 +00:00
Chris Lattner eedaf92fcf third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

llvm-svn: 44658
2007-12-06 07:47:55 +00:00
Chris Lattner b5fdfb9612 Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.

llvm-svn: 44657
2007-12-06 07:44:31 +00:00
Chris Lattner 7c709a5d08 implement a readme entry, compiling the code into:
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656
2007-12-06 07:33:36 +00:00
Chris Lattner 42558bf664 implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
llvm-svn: 44654
2007-12-06 05:53:43 +00:00
Dale Johannesen 05bbbda78a Fix PR1842.
llvm-svn: 44649
2007-12-06 01:43:46 +00:00
Chris Lattner c9693c60a5 more scalarization
llvm-svn: 44608
2007-12-05 07:45:02 +00:00
Chris Lattner 1a0d49a63c scalarize vector binops
llvm-svn: 44607
2007-12-05 07:36:58 +00:00
Chris Lattner b892225fb9 Implement framework for scalarizing node results. This is sufficient
to codegen this:

define float @test_extract_elt(<1 x float> * %P) {
	%p = load <1 x float>* %P
	%R = extractelement <1 x float> %p, i32 0
	ret float %R
}

llvm-svn: 44570
2007-12-04 07:48:46 +00:00
Chris Lattner 681c9d6697 start providing framework for scalarizing vectors.
llvm-svn: 44569
2007-12-04 07:29:51 +00:00
Duncan Sands 38ef3a8ec7 Rather than having special rules like "intrinsics cannot
throw exceptions", just mark intrinsics with the nounwind
attribute.  Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).

llvm-svn: 44544
2007-12-03 20:06:50 +00:00
Duncan Sands 5208d1ab4a Add some convenience methods for querying attributes, and
use them.

llvm-svn: 44403
2007-11-28 17:07:01 +00:00
Nate Begeman 6f026a654c Support returning non-power-of-2 vectors to unblock some work
llvm-svn: 44371
2007-11-27 19:28:48 +00:00
Duncan Sands ad0ea2d430 Fix PR1146: parameter attributes are longer part of
the function type, instead they belong to functions
and function calls.  This is an updated and slightly
corrected version of Reid Spencer's original patch.
The only known problem is that auto-upgrading of
bitcode files doesn't seem to work properly (see
test/Bitcode/AutoUpgradeIntrinsics.ll).  Hopefully
a bitcode guru (who might that be? :) ) will fix it.

llvm-svn: 44359
2007-11-27 13:23:08 +00:00
Chris Lattner 698b1cb28d err, no really.
llvm-svn: 44352
2007-11-27 06:14:32 +00:00
Chris Lattner 28caf2717a don't depend on ADL.
llvm-svn: 44351
2007-11-27 06:14:12 +00:00
Dan Gohman 9a69341725 Don't lower srem/urem X%C to X-X/C*C unless the division is actually
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.

llvm-svn: 44341
2007-11-26 23:46:11 +00:00
Chris Lattner cab915f9cf Implement expand support for MERGE_VALUEs that only produces one result.
llvm-svn: 44304
2007-11-24 19:12:15 +00:00
Chris Lattner 6e3641897b Implement support for custom legalization in DAGTypeLegalizer::ExpandOperand.
Improve a comment.
Unbreak Duncan's carefully written path compression where I didn't realize
what was happening!

llvm-svn: 44301
2007-11-24 18:11:42 +00:00
Chris Lattner f81d5886c6 Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to 
   take and return entire NODES that need a result expanded, not just
   the value.  This allows us to handle things like READCYCLECOUNTER,
   which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
   ExpandOperationResult.  This makes the result simpler and fully 
   general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
   i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
   allowing them to work with LegalizeDAGTypes.

LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.

llvm-svn: 44300
2007-11-24 07:07:01 +00:00
Duncan Sands b87dde7e8e Fix a bug in which node A is replaced by node B, but later
node A gets back into the DAG again because it was hiding in
one of the node maps: make sure that node replacement happens
in those maps too.

llvm-svn: 44263
2007-11-21 16:43:19 +00:00
Chris Lattner 09c0393d5e ExpandUnalignedLoad doesn't handle vectors right at all apparently.
Fix a couple of problems:
1. Don't assume the VT-1 is a VT that is half the size.
2. Treat vectors of FP in the vector path, not the FP path.

This has a couple of remaining problems before it will work with
the code in PR1811: the code below this change assumes that it can
use extload/shift/or to construct the result, which isn't right for
vectors.

This also doesn't handle vectors of 1 or vectors that aren't pow-2.

llvm-svn: 44243
2007-11-19 21:38:03 +00:00
Chris Lattner 6fa95ec19d Implement vector expand support for shuffle_vector. This fixes PR1811.
llvm-svn: 44242
2007-11-19 21:16:54 +00:00
Chris Lattner 67d77945e7 Implement splitting of UNDEF nodes. This is the first step towards fixing PR1811
llvm-svn: 44239
2007-11-19 20:21:32 +00:00
Dan Gohman 36347a26f9 Add support in SplitVectorOp for remainder operators.
llvm-svn: 44233
2007-11-19 15:15:03 +00:00
Nate Begeman d4d45c268c Add support for vectors to int <-> float casts.
llvm-svn: 44204
2007-11-17 03:58:34 +00:00
Anton Korobeynikov 66b91e66ec Implement necessary bits for flt_rounds gcc builtin.
Codegen bits and llvm-gcc support will follow.

llvm-svn: 44182
2007-11-15 23:25:33 +00:00
Nate Begeman bd117f06ba Basic non-power-of-2 vector support
llvm-svn: 44181
2007-11-15 21:15:26 +00:00
Duncan Sands d4494352f8 This assertion was bogus.
llvm-svn: 44167
2007-11-15 09:54:37 +00:00
Bill Wendling f359fed9f9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
2007-11-13 00:44:25 +00:00
Duncan Sands e795efea5b Move MinAlign to MathExtras.h.
llvm-svn: 43944
2007-11-09 13:41:39 +00:00
Duncan Sands e7a9ac929f Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is
not a multiple of 8.  Introduce a new helper,
MVT::getStoreSizeInBits, and use it.

llvm-svn: 43934
2007-11-09 08:57:19 +00:00
Evan Cheng 797d56ff17 Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924
2007-11-09 01:32:10 +00:00
Evan Cheng f14006f4d6 Didn't mean to check these in.
llvm-svn: 43923
2007-11-09 01:28:33 +00:00
Evan Cheng 1bf166312b Bug fix. Passive nodes are not in SUnitMap.
llvm-svn: 43922
2007-11-09 01:27:11 +00:00
Evan Cheng ece4c68b82 If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
llvm-svn: 43888
2007-11-08 09:25:29 +00:00
Dan Gohman ccfc028283 Remainder operations must be either integer or floating-point.
llvm-svn: 43781
2007-11-06 22:11:54 +00:00
Evan Cheng 2dbffa4e76 Add pseudo dependency to force two-address instruction to be scheduled after
other uses. There was a overly restricted check that prevented some obvious
cases.

llvm-svn: 43762
2007-11-06 08:44:59 +00:00
Dan Gohman 08143e397d Add support for vector remainder operations.
llvm-svn: 43744
2007-11-05 23:35:22 +00:00
Rafael Espindola fa0df55bdd Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)

llvm-svn: 43742
2007-11-05 23:12:20 +00:00
Dale Johannesen 4646aa3e33 Make labels work in asm blocks; allow labels as
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.

llvm-svn: 43734
2007-11-05 21:20:28 +00:00
Dan Gohman d7917b6248 Add std:: to sort calls.
llvm-svn: 43652
2007-11-02 22:24:01 +00:00
Dan Gohman c981d72d1a Change illegal uses of ++ to uses of STLExtra.h's next function.
llvm-svn: 43651
2007-11-02 22:22:02 +00:00
Duncan Sands 04059dd351 Fix a thinko.
llvm-svn: 43639
2007-11-02 15:18:06 +00:00
Duncan Sands 44b8721de8 Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.

llvm-svn: 43620
2007-11-01 20:53:16 +00:00
Duncan Sands 3b4668a5d8 Promotion of sdiv/srem/udiv/urem.
llvm-svn: 43551
2007-10-31 08:57:43 +00:00
Dale Johannesen b066c1f216 Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
llvm-svn: 43535
2007-10-31 00:32:36 +00:00
Evan Cheng 0747bc1df6 Typo.
llvm-svn: 43511
2007-10-30 20:11:21 +00:00
Duncan Sands 9ad5465005 Add support for expanding trunc stores. Consider
storing an i170 on a 32 bit machine.  This is first
promoted to a trunc-i170 store of an i256.  On a
little-endian machine this expands to a store of
an i128 and a trunc-i42 store of an i128.  The
trunc-i42 store is further expanded to a trunc-i42
store of an i64, then to a store of an i32 and a
trunc-i10 store of an i32.  At this point the operand
type is legal (i32) and expansion stops (legalization
of the trunc-i10 needs to be handled in LegalizeDAG.cpp).
On big-endian machines the high bits are stored first,
and some bit-fiddling is needed in order to generate
aligned stores.

llvm-svn: 43499
2007-10-30 12:50:39 +00:00
Duncan Sands 341f093bb1 If a call to getTruncStore is for a normal store,
offload to getStore rather than trying to handle
both cases at once (the assertions for example
assume the store really is truncating).

llvm-svn: 43498
2007-10-30 12:40:58 +00:00
Dan Gohman ae95d72a52 Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
llvm-svn: 43470
2007-10-29 20:44:42 +00:00
Evan Cheng e106e2f142 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).

llvm-svn: 43465
2007-10-29 19:58:20 +00:00
Dan Gohman 1961c28d46 Add explicit keywords.
llvm-svn: 43464
2007-10-29 19:52:04 +00:00
Duncan Sands 1826deda68 The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2.  While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is.  For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8.  Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places.  Since I'm on x86 I'm
not very motivated to do this myself...

llvm-svn: 43421
2007-10-28 12:59:45 +00:00
Bill Wendling 6d15b32c15 - Remove the hacky code that forces a memcpy. Alignment is taken care of in the
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
  unaligned pointers.

llvm-svn: 43398
2007-10-26 20:24:42 +00:00
Duncan Sands d385f0759c Small formatting changes. Add a sanity check.
Use NVT rather than looking it up, since we have
it to hand.

llvm-svn: 43341
2007-10-25 12:35:51 +00:00
Duncan Sands a8f4ba6eb9 Promote SETCC operands.
llvm-svn: 43340
2007-10-25 12:32:31 +00:00
Duncan Sands cf0da03312 Correctly extract the ValueType from a VTSDNode.
llvm-svn: 43339
2007-10-25 12:30:51 +00:00
Dale Johannesen a4a972e32d Another expansion for i64 multiply, suitable for PPC.
llvm-svn: 43314
2007-10-24 22:26:08 +00:00
Bill Wendling 38ccabcae9 Fix comment and use the "Size" variable that's already provided.
llvm-svn: 43271
2007-10-23 23:36:57 +00:00
Bill Wendling e3b859298a If there's an unaligned memcpy to/from the stack, don't lower it. Just call the
memcpy library function instead.

llvm-svn: 43270
2007-10-23 23:32:40 +00:00
Bill Wendling 6f149c0571 This broke lots. Reverting.
llvm-svn: 43264
2007-10-23 22:04:26 +00:00
Bill Wendling 8971440e56 Lowering a memcpy to the stack is killing PPC. The ARM and X86 backends already
have their own custom memcpy lowering code. This code needs to be factored out
into a target-independent lowering method with hooks to the backend. In the
meantime, just call memcpy if we're trying to copy onto a stack.

llvm-svn: 43262
2007-10-23 21:30:25 +00:00
Duncan Sands 941db4da0a Support for expanding extending loads of integers with
funky bit-widths.

llvm-svn: 43225
2007-10-22 19:00:05 +00:00
Duncan Sands 8fc995069b Fix up the logic for result expanding the various extension
operations so they work right for integers with funky
bit-widths.  For example, consider extending i48 to i64
on a 32 bit machine.  The i64 result is expanded to 2 x i32.
We know that the i48 operand will be promoted to i64, then
also expanded to 2 x i32.  If we had the expanded promoted
operand to hand, then expanding the result would be trivial.
Unfortunately at this stage we can only get hold of the
promoted operand.  So instead we kind of hand-expand, doing
explicit shifting and truncating to get the top and bottom
halves of the i64 operand into 2 x i32, which are then used
to expand the result.  This is harmless, because when the
promoted operand is finally expanded all this bit fiddling
turns into trivial operations which are eliminated either
by the expansion code itself or the DAG combiner.

llvm-svn: 43223
2007-10-22 18:26:21 +00:00
Chris Lattner 36f06c80e6 Add promote operand support for [su]int_to_fp.
llvm-svn: 43204
2007-10-20 22:57:56 +00:00
Chris Lattner 2ba4b148f3 Add result promotion of FP_TO_*INT, fixing CodeGen/X86/trunc-to-bool.ll
with the new legalizer.

llvm-svn: 43199
2007-10-20 04:32:38 +00:00
Chris Lattner 1c87f0c620 simplify some code.
llvm-svn: 43198
2007-10-20 04:09:48 +00:00
Chris Lattner 2bcac640b7 Implement promote and expand for operands of memcpy and friends.
This fixes CodeGen/X86/mem*.ll.

llvm-svn: 43197
2007-10-20 04:07:07 +00:00
Dale Johannesen 771188cf60 Fix a few places vector operations were not getting
the operand's type from the right place.

llvm-svn: 43195
2007-10-20 00:07:52 +00:00
Duncan Sands a87c9e4b75 Add support for a few more nodes.
llvm-svn: 43190
2007-10-19 20:29:48 +00:00
Dale Johannesen 6802d0c96f Redo "last ppc long double fix" as Chris wants.
llvm-svn: 43189
2007-10-19 20:29:00 +00:00
Chris Lattner 064c31ebac Fix a really nasty vector miscompilation bill recently introduced.
llvm-svn: 43181
2007-10-19 16:47:35 +00:00
Chris Lattner 3ea519e56d rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan

llvm-svn: 43177
2007-10-19 15:28:47 +00:00
Duncan Sands a9953e4d0a Support for expanding ADDE and SUBE.
llvm-svn: 43175
2007-10-19 13:06:17 +00:00
Duncan Sands d9834b29dd If the value types are equal then this routine
asserts in later checks rather than producing
the ordinary load it is supposed to.  Avoid all
such hassles by directly returning an ordinary
load in this case.

llvm-svn: 43174
2007-10-19 13:05:40 +00:00
Rafael Espindola 846c19dd70 Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)

llvm-svn: 43172
2007-10-19 10:41:11 +00:00
Chris Lattner e5a6448533 Implement a few new operations.
llvm-svn: 43171
2007-10-19 04:46:45 +00:00
Chris Lattner e31365eecc Implement expansion of SINT_TO_FP and UINT_TO_FP operands.
llvm-svn: 43170
2007-10-19 04:32:47 +00:00
Chris Lattner 9081d08083 implement support for custom expansion of any node type, in one place.
llvm-svn: 43169
2007-10-19 04:14:36 +00:00
Chris Lattner d01b8ea4a5 Make use of TLI.ExpandOperation, remove softfloat stuff.
llvm-svn: 43167
2007-10-19 03:58:25 +00:00
Chris Lattner 3c7ee41c78 add expand support for bit_convert result, even allowing custom expansion.
llvm-svn: 43166
2007-10-19 03:33:14 +00:00
Chris Lattner 579db81f1c add a new target hook.
llvm-svn: 43165
2007-10-19 03:31:45 +00:00
Bill Wendling de16ad1446 Negative indices aren't allowed here.
llvm-svn: 43161
2007-10-19 01:10:49 +00:00
Dale Johannesen 10432e5a67 More ppcf128 issues (maybe the last)?
llvm-svn: 43160
2007-10-19 00:59:18 +00:00
Bill Wendling 070aca5d25 Pointer arithmetic should be done with the index the same size as the pointer.
llvm-svn: 43120
2007-10-18 08:32:37 +00:00
Duncan Sands cb7aca0dcb Support for ADDC/SUBC.
llvm-svn: 43119
2007-10-18 08:22:16 +00:00
Dan Gohman 8f518b9875 Add support for ISD::SELECT in SplitVectorOp.
llvm-svn: 43072
2007-10-17 14:48:28 +00:00
Duncan Sands d42c812f4a Return Expand from getOperationAction for all extended
types.  This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.

llvm-svn: 43071
2007-10-17 13:49:58 +00:00
Dale Johannesen e5facd51cb Disable attempts to constant fold PPC f128.
Remove the assumption that this will happen from
various places.

llvm-svn: 43053
2007-10-16 23:38:29 +00:00
Duncan Sands bbbfbe95f7 Initial infrastructure for arbitrary precision integer
codegen support.  This should have no effect on codegen
for other types.  Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.

llvm-svn: 43030
2007-10-16 09:56:48 +00:00
Duncan Sands 052c843559 Fixes due to lack of type-safety for ValueType: (1) ValueType
being passed instead of an opcode; (2) ValueType being passed
for isVolatile (!) in getLoad.

llvm-svn: 43028
2007-10-16 09:07:20 +00:00
Chris Lattner cece03dd89 implement promotion of select and select_cc, allowing MallocBench/gs to
work with type promotion on x86.

llvm-svn: 43025
2007-10-16 03:00:22 +00:00
Evan Cheng 04c44712d3 Make CalcLatency() non-recursive.
llvm-svn: 43017
2007-10-15 21:33:22 +00:00
Chris Lattner d6f7d44eae Move CreateStackTemporary out to SelectionDAG
llvm-svn: 42995
2007-10-15 17:48:57 +00:00
Chris Lattner 9eb7a829e6 add a new CreateStackTemporary helper method.
llvm-svn: 42994
2007-10-15 17:47:20 +00:00
Chris Lattner 9d5b131e70 implement promotion of BR_CC operands, fixing bisort on ppc.
llvm-svn: 42992
2007-10-15 17:16:12 +00:00
Chris Lattner 8555e69def updates from duncan
llvm-svn: 42991
2007-10-15 16:46:29 +00:00
Duncan Sands f6977d9842 Fix some typos. Call getTypeToTransformTo rather than
getTypeToExpandTo.  The difference is that
getTypeToExpandTo gives the final result of expansion
(eg: i128 -> i32 on a 32 bit machine) while
getTypeToTransformTo does just one step (i128 -> i64).

llvm-svn: 42982
2007-10-15 13:30:18 +00:00
Chris Lattner 3cfb56d489 One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.

One more significant change:  Implement the start of a legalizer that
just works on types.  This legalizer is designed to run before the 
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.

This design/impl has the following advantages:

1. When finished, this will *significantly* reduce the amount of code in
   LegalizeDAG.cpp.  It will remove all the code related to promotion and
   expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike 
   LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
   for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of 
   deallocating and reallocating the entire graph that points to some 
   mutated node.
5. The code nicely separates out handling of operations with invalid 
   results from operations with invalid operands, making some cases
   simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :), 
   allowing you to easily understand what legalize types is doing.

This is not yet done.  Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing.  However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine.  The
biggest issues are:

1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.

Hey, at least it is a step in the right direction :).  If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it.  If
this explodes it will tell you what needs to be implemented.  Help is 
certainly appreciated.

Once this goes in, we can do three things:

1. Add a new pass of dag combine between the "type legalizer" and "operation
   legalizer" passes.  This will let us catch some long-standing isel issues
   that we miss because operation legalization often obfuscates the dag with
   target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
   making it much smaller and simpler.  When that happens we can then 
   reimplement the core functionality left in it in a much more efficient and
   non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
   selectiondags maybe...

llvm-svn: 42981
2007-10-15 06:10:22 +00:00
Chris Lattner b193517eed One xform performed by LegalizeDAG is transformation of "store of fp" to "store of int".
Make two changes:
1) only xform "store of f32" if i32 is a legal type for the target.
2) only xform "store of f64" if either i64 or i32 are legal for the target.
3) if i64 isn't legal, manually lower to 2 stores of i32 instead of letting a
   later pass of legalize do it.  This is ugly, but helps future changes I'm 
   about to commit.

llvm-svn: 42980
2007-10-15 05:46:06 +00:00
Chris Lattner 90e0b271df Add a (disabled by default) way to view the ID of a node.
llvm-svn: 42978
2007-10-15 05:32:43 +00:00
Chris Lattner fbbe570994 remove misleading comment.
llvm-svn: 42970
2007-10-14 20:35:12 +00:00
Chris Lattner ebe491ea9c If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set.  Fall through to making a libcall instead.

llvm-svn: 42969
2007-10-14 18:35:05 +00:00
Dale Johannesen 19db093b35 Disable some compile-time optimizations on PPC
long double.

llvm-svn: 42958
2007-10-14 01:56:47 +00:00
Chris Lattner f47e30627a Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.

This allows this code:
void foo(char *P) {
   strcpy(P, "abc");
}
to compile to:

_foo:
        ldrb r3, [r1]
        ldrb r2, [r1, #+1]
        ldrb r12, [r1, #+2]!
        ldrb r1, [r1, #+1]
        strb r1, [r0, #+3]
        strb r2, [r0, #+1]
        strb r12, [r0, #+2]
        strb r3, [r0]
        bx lr

instead of:

_foo:
        ldrb r3, [r1, #+3]
        ldrb r2, [r1, #+2]
        orr r3, r2, r3, lsl #8
        ldrb r2, [r1, #+1]
        ldrb r1, [r1]
        orr r2, r1, r2, lsl #8
        orr r3, r2, r3, lsl #16
        strb r3, [r0]
        mov r2, r3, lsr #24
        strb r2, [r0, #+3]
        mov r2, r3, lsr #16
        strb r2, [r0, #+2]
        mov r3, r3, lsr #8
        strb r3, [r0, #+1]
        bx lr

testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll

This also helps occasionally for X86 and other cases not involving 
unaligned load/stores.

llvm-svn: 42954
2007-10-13 06:58:48 +00:00
Chris Lattner 5e6fe054a2 Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the 
knowledge that they don't demand the top bits.

llvm-svn: 42952
2007-10-13 06:35:54 +00:00
Arnold Schwaighofer 1f0da1fefb Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.

llvm-svn: 42934
2007-10-12 21:30:57 +00:00
Dale Johannesen 61c574fc51 ppc long double. Implement fabs and fneg.
llvm-svn: 42924
2007-10-12 19:02:17 +00:00
Dale Johannesen a1a4a9ebfa Implement i64->ppcf128 conversions.
llvm-svn: 42919
2007-10-12 17:52:03 +00:00
Dan Gohman e3583817ac Fix some corner cases with vectors in copyToRegs and copyFromRegs.
llvm-svn: 42907
2007-10-12 14:33:11 +00:00
Dan Gohman 4f056f3c10 Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.

llvm-svn: 42906
2007-10-12 14:13:46 +00:00
Evan Cheng aa2d6ef81d EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
2007-10-12 08:50:34 +00:00
Dale Johannesen 05ff9e8cda PPC long double. Implement a couple more conversions.
llvm-svn: 42888
2007-10-12 01:37:08 +00:00
Dan Gohman be37007e64 Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.

llvm-svn: 42885
2007-10-12 00:01:22 +00:00
Dan Gohman 2a7de41682 Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.

Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.

llvm-svn: 42884
2007-10-11 23:57:53 +00:00
Dale Johannesen 6472eb63c2 Implement ppc long double->uint conversion.
Make ppc long double constants print.

llvm-svn: 42882
2007-10-11 23:32:15 +00:00
Dan Gohman fd66486950 Add runtime library names for pow.
llvm-svn: 42880
2007-10-11 23:09:10 +00:00
Dan Gohman daee002438 Add an ISD::FPOW node type.
llvm-svn: 42879
2007-10-11 23:06:37 +00:00
Arnold Schwaighofer 9ccea99165 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870
2007-10-11 19:40:01 +00:00
Dale Johannesen 007aa378ad Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.

llvm-svn: 42865
2007-10-11 18:07:22 +00:00
Duncan Sands 56ab90d3ad Correct swapped arguments to getConstant.
llvm-svn: 42824
2007-10-10 09:54:50 +00:00
Dale Johannesen 666323eacd Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
2007-10-10 01:01:31 +00:00
Dan Gohman a160361c85 Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.

llvm-svn: 42762
2007-10-08 18:33:35 +00:00
Dan Gohman 5c6d0c3b99 DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.

llvm-svn: 42759
2007-10-08 17:57:15 +00:00
Dan Gohman b08c8bfe41 Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.

llvm-svn: 42753
2007-10-08 15:49:58 +00:00
Dan Gohman fadf40a655 In -debug mode, dump SelectionDAGs both before and after the
optimization passes.

llvm-svn: 42749
2007-10-08 15:12:17 +00:00
Neil Booth 5f00973393 convertFromInteger, as originally written, expected sign-extended
input.  APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input.  Make this
assumption explicit in the function name.

llvm-svn: 42732
2007-10-07 11:45:55 +00:00
Evan Cheng 0de312dd7d Reapply 42677.
llvm-svn: 42692
2007-10-06 08:19:55 +00:00
Chris Lattner 82217bd155 revert evan's patch until the header is committed
llvm-svn: 42686
2007-10-06 06:08:17 +00:00
Evan Cheng f4b5d491df Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.

llvm-svn: 42677
2007-10-06 02:46:29 +00:00
Dale Johannesen f864ac96d8 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.

llvm-svn: 42672
2007-10-06 01:24:11 +00:00
Dale Johannesen c0154c06d6 First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
2007-10-05 20:04:43 +00:00
Dan Gohman 12334acbfb Legalize support for MUL_LOHI and DIVREM.
llvm-svn: 42636
2007-10-05 14:17:22 +00:00
Dan Gohman 2682bb6df2 Fix a typo in a comment.
llvm-svn: 42635
2007-10-05 14:11:58 +00:00
Dan Gohman 1a77dfba15 Provide names for MUL_LOHI and DIVREM operators.
llvm-svn: 42634
2007-10-05 14:11:04 +00:00
Evan Cheng 84d0ebc10a Chain producing nodes cannot be moved, not chain reading nodes.
llvm-svn: 42627
2007-10-05 01:42:35 +00:00
Evan Cheng 991cf47221 Oops. Didn't mean to leave this in.
llvm-svn: 42626
2007-10-05 01:39:40 +00:00
Evan Cheng 79e9713b11 If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.

llvm-svn: 42625
2007-10-05 01:39:18 +00:00
Evan Cheng 4852303bdb Add a variant of getTargetNode() that takes a vector of MVT::ValueType.
llvm-svn: 42620
2007-10-05 01:10:49 +00:00
Evan Cheng fd11ef4665 Silence a warning.
llvm-svn: 42619
2007-10-05 01:09:32 +00:00
Dan Gohman c731c97fac Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().

llvm-svn: 42585
2007-10-03 19:26:29 +00:00
Dale Johannesen 4d4e77af8e Rewrite sqrt and powi to use anyfloat. By popular demand.
llvm-svn: 42537
2007-10-02 17:43:59 +00:00
Dale Johannesen b6c05b1f90 Fix stride computations for long double arrays.
llvm-svn: 42508
2007-10-01 23:08:35 +00:00
Evan Cheng a3a67596f6 Remove simple scheduler.
llvm-svn: 42499
2007-10-01 20:44:07 +00:00
Dale Johannesen c0855f8a88 remove dup comment
llvm-svn: 42486
2007-09-30 19:08:12 +00:00
Dale Johannesen 9150652b21 Constant fold int-to-long-double conversions;
use APFloat for int-to-float/double; use
round-to-nearest for these (implementation-defined,
seems to match gcc).

llvm-svn: 42484
2007-09-30 18:19:03 +00:00
Dan Gohman a90183e7d1 Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
llvm-svn: 42457
2007-09-28 23:53:40 +00:00
Evan Cheng a5e595d23a If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.

llvm-svn: 42453
2007-09-28 22:32:30 +00:00
Evan Cheng f72693f36e Remove a poor scheduling heuristic.
llvm-svn: 42443
2007-09-28 19:37:35 +00:00
Evan Cheng 038dcc5136 Trim some unneeded fields.
llvm-svn: 42442
2007-09-28 19:24:24 +00:00
Dale Johannesen 789b5a505b Fix long double -> uint64 conversion.
llvm-svn: 42440
2007-09-28 18:44:17 +00:00
Dale Johannesen 25a00a63eb Add sqrt and powi intrinsics for long double.
llvm-svn: 42423
2007-09-28 01:08:20 +00:00
Evan Cheng e6f92253f5 Avoid inserting a live register more than once.
llvm-svn: 42410
2007-09-27 18:46:06 +00:00
Evan Cheng 75439b3b78 Silence a compiler warning.
llvm-svn: 42389
2007-09-27 07:35:39 +00:00
Evan Cheng bde499be60 Boogs.
llvm-svn: 42388
2007-09-27 07:29:27 +00:00
Evan Cheng 1ec79b41db Be smarter about which node to force schedule. Reduce # of duplications + copies; Added statistics.
llvm-svn: 42387
2007-09-27 07:09:03 +00:00
Evan Cheng cfd5f82890 Backtracking only when it won't create a cycle.
llvm-svn: 42384
2007-09-27 00:25:29 +00:00
Evan Cheng 8e136a9dc4 - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.

llvm-svn: 42375
2007-09-26 21:36:17 +00:00
Dale Johannesen b6d56401aa Enable codegen for long double abs, sin, cos
llvm-svn: 42368
2007-09-26 21:10:55 +00:00
Dale Johannesen f04d37d3a9 Fix f80 UNDEF.
llvm-svn: 42359
2007-09-26 17:26:49 +00:00
Evan Cheng c1e4e3743b Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!

llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Dan Gohman 5e1a428344 Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.

llvm-svn: 42297
2007-09-25 15:10:49 +00:00
Evan Cheng 5924bf7d3b Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
llvm-svn: 42284
2007-09-25 01:54:36 +00:00
Dan Gohman 6002818999 Use the correct result value type instead of using getValueType(0)
in ExpandEXTRACT_VECTOR_ELT and SplitVectorOp. This fixes an abort
in the included testcase.

llvm-svn: 42264
2007-09-24 15:54:53 +00:00
Chris Lattner 10671ad650 initialize isstore/isload fields in ctor, fixing PR1695
llvm-svn: 42222
2007-09-22 07:02:12 +00:00
Dale Johannesen 4230512f32 Change APFloat::convertFromInteger to take the incoming
bit width instead of number of words allocated, which
makes it actually work for int->APF conversions.
Adjust callers.  Add const to one of the APInt constructors
to prevent surprising match when called with const
argument.

llvm-svn: 42210
2007-09-21 22:09:37 +00:00
Chris Lattner b3d01d2f56 initialize SetCCResultContents, fixing PR1693
llvm-svn: 42193
2007-09-21 17:06:39 +00:00
Dale Johannesen 7d67e547b5 More long double fixes. x86_64 should build now.
llvm-svn: 42155
2007-09-19 23:55:34 +00:00
Dale Johannesen b59d25fe54 Fix longdouble -> uint conversion.
llvm-svn: 42143
2007-09-19 17:53:26 +00:00
Evan Cheng 0effc3a6b8 Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.

llvm-svn: 42125
2007-09-19 01:38:40 +00:00
Evan Cheng e2e8f2d96b Fix a bogus splat xform:
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2>
!=
<undef, undef, x, undef>

llvm-svn: 42111
2007-09-18 21:54:37 +00:00