Commit Graph

688 Commits

Author SHA1 Message Date
Evan Cheng 504c645b3e Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
llvm-svn: 47529
2008-02-23 03:38:34 +00:00
Evan Cheng 405827dc26 Update test.
llvm-svn: 47527
2008-02-23 02:57:25 +00:00
Evan Cheng 174ef9a0bb Remat of pic loads are now on by default.
llvm-svn: 47525
2008-02-23 02:08:30 +00:00
Evan Cheng 26e5d01ca1 Really. Why doesn't every arch support MMX?
llvm-svn: 47513
2008-02-23 00:56:14 +00:00
Evan Cheng cee351c410 Test case for PR2082.
llvm-svn: 47501
2008-02-22 20:38:49 +00:00
Evan Cheng 94ba37f8e3 Allow re-materialization of pic load (controlled by -remat-pic-load for now).
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
Chris Lattner ab8bfc28c8 copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474
2008-02-22 05:18:04 +00:00
Chris Lattner 997b3a65ca Start using GPR's to copy around mmx value instead of mmx regs.
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470
2008-02-22 02:09:43 +00:00
Chris Lattner bdd4c8b04d Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.

llvm-svn: 47454
2008-02-21 19:43:13 +00:00
Tanya Lattner 3cdf542f5a Remove llvm-upgrade and update tests.
llvm-svn: 47432
2008-02-21 07:42:26 +00:00
Chris Lattner 59f18b4de6 testcase for PR1133
llvm-svn: 47427
2008-02-21 05:27:08 +00:00
Chris Lattner 83c93d5afd Fix a (harmless) but where vregs were added to the used reg lists for
inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.

llvm-svn: 47426
2008-02-21 04:55:52 +00:00
Evan Cheng 0aa9f2a7f3 XFAIL this for now.
llvm-svn: 47355
2008-02-20 02:38:58 +00:00
Chris Lattner a0b1cc41ef this test requires sse2
llvm-svn: 47331
2008-02-19 18:07:46 +00:00
Chris Lattner 97b9662f78 Don't fold and's into test instructions if they have multiple uses.
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

llvm-svn: 47330
2008-02-19 17:37:35 +00:00
Chris Lattner 08162d9515 rename tests to avoid a test- prefix when they aren't related to the test instruction.
llvm-svn: 47329
2008-02-19 17:33:52 +00:00
Tanya Lattner a99d8b5a9a Remove llvm-upgrade and update tests.
llvm-svn: 47325
2008-02-19 08:07:33 +00:00
Nick Lewycky 0e2e21b8b9 Don't spew stats to stderr.
llvm-svn: 47308
2008-02-19 03:11:47 +00:00
Nick Lewycky b54a803a2e Fix up the run line for this new test.
llc: for the -info-output-file option:  requires a value!

llvm-svn: 47306
2008-02-19 02:58:36 +00:00
Evan Cheng 634a8f9275 New test.
llvm-svn: 47302
2008-02-19 02:09:58 +00:00
Tanya Lattner 3f04773f78 Remove llvm-upgrade and update tests.
llvm-svn: 47296
2008-02-19 01:41:04 +00:00
Evan Cheng 6200c225e0 - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.

llvm-svn: 47290
2008-02-18 23:04:32 +00:00
Dan Gohman a589ee11bb Don't mark scalar integer multiplication as Expand on x86, since x86
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.

llvm-svn: 47277
2008-02-18 17:55:26 +00:00
Tanya Lattner f697c03883 Remove llvm-upgrade.
llvm-svn: 47238
2008-02-17 20:02:20 +00:00
Andrew Lenharth 9b254eed32 llvm.memory.barrier, and impl for x86 and alpha
llvm-svn: 47204
2008-02-16 01:24:58 +00:00
Evan Cheng 6edbbe0c25 This test is not interesting.
llvm-svn: 47189
2008-02-15 23:06:21 +00:00
Chris Lattner 558a3ba17f Fix a miscompilation from Dan's recent apintification.
llvm-svn: 47128
2008-02-14 18:48:56 +00:00
Chris Lattner 3bd37f549a This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
Evan Cheng a4621f04bb Fix test.
llvm-svn: 47102
2008-02-14 01:32:53 +00:00
Duncan Sands f8d29f228d Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.

llvm-svn: 47075
2008-02-13 18:01:53 +00:00
Chris Lattner a08af08a88 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.

llvm-svn: 47054
2008-02-13 07:39:09 +00:00
Nate Begeman fe61967361 Add testcase for recent legalizer change
llvm-svn: 47049
2008-02-13 06:48:40 +00:00
Evan Cheng ea8530d82c New tests.
llvm-svn: 47047
2008-02-13 03:23:53 +00:00
Evan Cheng 724029151b Don't mask the isel bug.
llvm-svn: 47018
2008-02-12 19:11:29 +00:00
Evan Cheng 3069a26f63 This test assumes no SSE4.1.
llvm-svn: 47017
2008-02-12 19:11:08 +00:00
Evan Cheng b21301fbe7 Fix some test cases.
llvm-svn: 46998
2008-02-12 07:22:46 +00:00
Evan Cheng ad4d57a2f5 Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.
llvm-svn: 46953
2008-02-11 08:30:52 +00:00
Dale Johannesen 43a2ed8611 Alignment of struct containing vectors depends on
whether SSE is present, on Darwin anyway.  Make it
explicit.

llvm-svn: 46909
2008-02-09 19:04:25 +00:00
Evan Cheng 3b3286d4bc It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Evan Cheng 8d59dd119b Added missing entries in X86 load / store folding tables.
llvm-svn: 46866
2008-02-08 00:12:56 +00:00
Evan Cheng a20a773654 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850
2008-02-07 08:53:49 +00:00
Evan Cheng 127b41500c It's PR1925, not PR1609.
llvm-svn: 46825
2008-02-06 22:07:17 +00:00
Evan Cheng 1ec748c784 Fix a number of local register allocator issues: PR1609.
llvm-svn: 46821
2008-02-06 19:16:53 +00:00
Evan Cheng 87fbd66f9f Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
llvm-svn: 46776
2008-02-05 22:50:29 +00:00
Evan Cheng 8d78b0597b If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead).
llvm-svn: 46763
2008-02-05 20:04:18 +00:00
Duncan Sands 3342d4083f Crashes LegalizeTypes with "Do not know how to
expand the result of this operator!" (node: ctlz).

llvm-svn: 46713
2008-02-04 18:07:02 +00:00
Duncan Sands ff1a444879 Crashes LegalizeTypes with "Do not know how to split
this operator's operand" (node: extract_subvector).

llvm-svn: 46712
2008-02-04 18:05:42 +00:00
Chris Lattner 69f90ccb17 remove target triple to make this test more "generic"
llvm-svn: 46711
2008-02-04 18:02:37 +00:00
Duncan Sands 331cd706f5 Crashed the new type legalizer. Not likely to catch
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.

llvm-svn: 46706
2008-02-04 09:40:27 +00:00
Lauro Ramos Venancio 192c07b727 CBackend: Implement unaligned load/store.
llvm-svn: 46646
2008-02-01 21:25:59 +00:00