3de8ae38e6
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730
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llvm-svn: 177736
2013-03-22 15:24:16 +00:00
0a22bc4156
R600: Factorize code handling Const Read Port limitation
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llvm-svn: 177078
2013-03-14 15:50:45 +00:00
e781913ac4
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
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llvm-svn: 176835
2013-03-11 23:16:30 +00:00
e5ecf10a02
R600: Fix JUMP handling so that MachineInstr verification can occur
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This allows R600 Target to use the newly created -verify-misched llc flag
llvm-svn: 176819
2013-03-11 18:15:06 +00:00
01b75cc0f2
Test case hygiene.
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llvm-svn: 176772
2013-03-09 18:25:40 +00:00
5e524897ed
R600: Optimize another selectcc case
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fold selectcc (selectcc x, y, a, b, cc), b, a, b, setne ->
selectcc x, y, a, b, cc
Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176700
2013-03-08 15:37:11 +00:00
2add82de09
R600: Improve custom lowering of select_cc
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Two changes:
1. Prefer SET* instructions when possible
2. Handle the CND*_INT case with floating-point args
Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176699
2013-03-08 15:37:09 +00:00
492ebeabe9
R600: Change operation action from Custom to Expand for BR_CC
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Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176698
2013-03-08 15:37:07 +00:00
e8f9f2877b
R600: Change operation action from Custom to Expand for SETCC
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Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176697
2013-03-08 15:37:05 +00:00
d93ef7afaa
LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC
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llvm-svn: 176695
2013-03-08 15:37:02 +00:00
2bc2730765
R600: Change addresspace in fold-kcache.ll
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AddressSpace definition has changed in a previous commit, reflect it
to avoid false failure.
llvm-svn: 176693
2013-03-08 15:34:07 +00:00
21442994a7
R600/SI: adjust test to recent changes
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Signed-off-by: Christian König <christian.koenig@amd.com>
llvm-svn: 176691
2013-03-08 14:44:00 +00:00
3b6f20e944
R600: Turn BUILD_VECTOR into Reg_Sequence
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Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 176487
2013-03-05 15:04:49 +00:00
a199d01e4d
R600: Use MUL_IEEE for trig/fdiv intrinsic
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Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 176485
2013-03-05 15:04:37 +00:00
3c54770365
R600/SI: fix sampler tests after fixing wait insertions
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Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176359
2013-03-01 17:39:05 +00:00
0d171c8877
R600: Fix for Unigine when MachineSched is enabled
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Fixes for-loop.cl piglit test
Patch By: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175742
2013-02-21 15:06:59 +00:00
7f02a8c7a7
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32
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NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175733
2013-02-21 08:57:10 +00:00
1ce13f553e
R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern
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llvm-svn: 175446
2013-02-18 14:11:28 +00:00
f940fd05bd
R600: Do not fold single instruction with more that 3 kcache read
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It fixes around 100 tfb piglit tests and 16 glean tests.
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175183
2013-02-14 16:57:19 +00:00
51d5eb2f63
R600: Add lit tests for texture sampling instruction selection.
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Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175138
2013-02-14 07:43:51 +00:00
91da4e9199
R600: Add support for 128-bit parameters
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NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175096
2013-02-13 22:05:20 +00:00
e06163a9a6
R600: Add support for SET*_DX10 instructions
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These instructions compare two floating point values and return an
integer true (-1) or false (0) value.
When compiling code generated by the Mesa GLSL frontend, the SET*_DX10
instructions save us four instructions for most branch decisions that
use floating-point comparisons.
llvm-svn: 174609
2013-02-07 14:02:35 +00:00
6d867e8d4d
R600: Add tests for unsupported condition codes.
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All of the le and lt variants are unsupported.
llvm-svn: 174608
2013-02-07 14:02:33 +00:00
b40ada9b85
R600: Fix assembly name for SETGT_INT
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llvm-svn: 174607
2013-02-07 14:02:27 +00:00
7d41161a2d
R600: Add tests for instruction predicates
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llvm-svn: 174393
2013-02-05 17:09:13 +00:00
2e5e7a5bef
R600: Emit function name in the AsmPrinter
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Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.
llvm-svn: 174392
2013-02-05 17:09:11 +00:00
4926921bd4
R600: Fold clamp, neg, abs
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Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174099
2013-01-31 22:11:54 +00:00
567f886eb0
DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
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DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:
1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.
2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.
llvm-svn: 171420
2013-01-02 22:13:01 +00:00
a8b0351720
R600: Expand vec4 INT <-> FP conversions
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llvm-svn: 170901
2012-12-21 16:33:24 +00:00
75aadc2813
Add R600 backend
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A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
llvm-svn: 169915
2012-12-11 21:25:42 +00:00
fc3db614c0
Revert "test/CodeGen/R600: Add some basic tests v6"
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This reverts commit 11d3457afcda7848448dd7f11b2ede6552ffb9ea.
llvm-svn: 160300
2012-07-16 18:19:43 +00:00
6693fbe3eb
test/CodeGen/R600: Add some basic tests v6
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llvm-svn: 160273
2012-07-16 14:17:19 +00:00
Michel Danzer