SUMMARY:
The patch detects MIPS application specific extensions (ASE) like micromips by reading
ELF header.e_flags and SHT_MIPS_ABIFLAGS section. MIPS triple does not contain ASE
information like micromips, mips16, DSP, MSA etc. These can be read from header.e_flags
or SHT_MIPS_ABIFLAGS section.
Reviewers: clayborg
Subscribers: mohit.bhakkad, sagar, lldb-commits
Differential Revision: http://reviews.llvm.org/D11133
llvm-svn: 242381
Summary: This aligns the library names used by the Makefile build to be the same as those create by the CMake build to make switching between the two easier. The only major difficulty was lldbHost which was one library in the CMake system and several in the Makefile system. Most of the other changes are trivial renames.
Reviewers: labath
Subscribers: emaste, tberghammer, lldb-commits
Differential Revision: http://reviews.llvm.org/D11154
llvm-svn: 242196
SUMMARY:
This patch implements
1. Emulation of MIPS32 branch instructions
2. Enable single-stepping for MIPS32 instructions
3. Correction in emulation of MIPS64 branch instructions with delay slot
4. Adjust breakpoint address when breakpoint is hit in a forbidden slot of compact branch instruction
Reviewers: clayborg
Subscribers: mohit.bhakkad, sagar, bhushan, lldb-commits, emaste, nitesh.jain
Differential Revision: http://reviews.llvm.org/D10596
llvm-svn: 240373
Patch by Jaydeep Patil
SUMMARY:
1. Added emulation of MIPS64 floating-point branch instructions
2. Updated GetRegisterInfo to recognize floating-point registers
3. Provided CPU information while creating createMCSubtargetInfo in disassembler
4. Bug fix in emulation of JIC and JIALC
5. Correct identification of breakpoint when set in a delay slot of a branch instruction
Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D10355
llvm-svn: 239996
Patch by Jaydeep Patil
EmulateInstructionMIPS64 has been modified to use llvm::MCDisassembler instead of duplicating the decoding logic.
Added emulation of few branch instructions for software single stepping
Reviewers: clayborg, jasonmolenda
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9319
llvm-svn: 236411
Patch by Jaydeep Patil
Added MIPS32 and MIPS64 core revisions. This would be followed by register context and emulate-instruction for MIPS32.
DYLDRendezvous.cpp:
On Linux link map struct does not contain extra load offset field.
Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9190
llvm-svn: 235574
Summary:
This is initial implementation of assembly profiler which only scans prologue/epilogue assembly instructions to create CFI instructions.
Reviewers: clayborg, jasonmolenda
Differential Revision: http://reviews.llvm.org/D7696
llvm-svn: 232619
Jaydeep Patil