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466 Commits

Author SHA1 Message Date
Johnny Chen 8b04b550df Fixed warnings pointed out by clang. 
llvm-svn: 100696
 2010-04-07 22:03:27 +00:00
Johnny Chen 80f8c3d533 Fixed warnings pointed out by clang. 
Next to work on is ARMDisassemblerCore.cpp.

llvm-svn: 100695
 2010-04-07 21:52:48 +00:00
Johnny Chen 3f253e2cb1 Fixed 3 warnings pointed out by clang. 
llvm-svn: 100693
 2010-04-07 21:23:48 +00:00
Johnny Chen 4e2f8722c4 Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 
ARMDecoderEmitter.cpp, with FIXME comment.

llvm-svn: 100690
 2010-04-07 20:53:12 +00:00
Johnny Chen dacfd2c6d4 Get rid of traling whitespaces. No functionality change. 
llvm-svn: 100404
 2010-04-05 04:51:50 +00:00
Johnny Chen dba13e7922 The disassembler impl. of MCDisassembler::getInstruction() was using the pattern 
uint32_t insn;
  MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL)

to read 4 bytes of memory contents into a 32-bit uint variable.  This leaves the
interpretation of byte order up to the host machine and causes PPC test cases of
arm-tests, neon-tests, and thumb-tests to fail.  Fixed to use a byte array for
reading the memory contents and shift the bytes into place for the 32-bit uint
variable in the ARM case and 16-bit halfword in the Thumb case.

llvm-svn: 100403
 2010-04-05 04:46:17 +00:00
Evan Cheng 0b8adb0652 Temporarily remove to disable building of ARM disassembler. 
llvm-svn: 100380
 2010-04-05 01:57:50 +00:00
Evan Cheng 492a82e426 Re-apply 100265 but instead disable building of ARM disassembly for now. 
llvm-svn: 100379
 2010-04-05 01:34:00 +00:00
Evan Cheng 876a5015af Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests. 
llvm-svn: 100378
 2010-04-05 01:04:27 +00:00
Johnny Chen fc8c3b7547 Get rid of the middleman (ARMAlgorithm), which causes more trouble than the 
abstraction it brings.  And also get rid of the atexit() handler, it does not
belong in the lib directory. :-)

llvm-svn: 100265
 2010-04-03 04:10:56 +00:00
Johnny Chen 884e66a545 Fix comment. 
llvm-svn: 100259
 2010-04-03 01:17:30 +00:00
Johnny Chen 58e83eb50d Register ARMAlgorithm::DoCleanup() to be called on exit to free the memory 
occuplied by the cached ARMAlgorithm objects.

llvm-svn: 100258
 2010-04-03 01:09:47 +00:00
Johnny Chen a0d74064fe Fix another build warning. 
llvm-svn: 100251
 2010-04-02 23:43:38 +00:00
Johnny Chen 7b999ea7b7 Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen 
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.

llvm-svn: 100233
 2010-04-02 22:27:38 +00:00
Bob Wilson 1b4e8cc69c --- Reverse-merging r98637 into '.': 
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640
 2010-03-16 16:59:47 +00:00
Johnny Chen 3d9327bd06 Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637
 2010-03-16 16:36:54 +00:00