Commit Graph

126289 Commits

Author SHA1 Message Date
Dan Gohman b13c91f159 [WebAssembly] Disable some WebAssembly-specific optimization passes at -O0.
llvm-svn: 258127
2016-01-19 14:55:02 +00:00
Dan Gohman 3196650bf3 [WebAssembly] Use the templated form of MachineFunction::getSubtarget(). NFC.
llvm-svn: 258126
2016-01-19 14:53:19 +00:00
Dan Gohman 0553299586 [WebAssembly] Re-enable loop idiom recognition for memcpy et al.
llvm-svn: 258125
2016-01-19 14:49:23 +00:00
Asaf Badouh d4a0d9a78c [X86][AVX512]fix dag & add intrinsics for fixupimm
cover all width and types (pd/ps/sd/ss) of fixupimm instruction and inrtinsics

Differential Revision: http://reviews.llvm.org/D16313

llvm-svn: 258124
2016-01-19 14:21:39 +00:00
Andrew Wilkins 2a3810e8f7 docs: address post-commit review
Rewording/expansion of CMake options
suggested by Dan Liew.

See http://reviews.llvm.org/D16208.

llvm-svn: 258112
2016-01-19 05:43:21 +00:00
Philip Reames b336bca07e [GC] Lower vectors-of-pointers directly by default
This commit changes the default on our lowering of vectors-of-pointers from splitting in RS4GC to reporting them in the final stack map.  All of the changes to do so are already in place and tested.  Assuming no problems are unearthed in the next week, we will be deleting the old code entirely next Monday.

llvm-svn: 258111
2016-01-19 04:18:24 +00:00
Philip Reames 3195500297 [GC] Consolidate all built in GCs into a single file [NFC]
Combine a bunch of small files into a single, still rather small, file.  The primary purpose of this is to get all of the static initializers into a single file so as to have a well defined order of initialization.  

llvm-svn: 258109
2016-01-19 03:57:18 +00:00
Kelvin Li 510498c0d3 parseArch() supports more variations of arch names for PowerPC builds
llvm-svn: 258103
2016-01-19 00:04:41 +00:00
Tobias Edler von Koch 3f4f6f3ed6 Add a change accidentally left out from r258100
Also remove an executable bit introduced by r258083.

llvm-svn: 258101
2016-01-18 23:35:24 +00:00
Tobias Edler von Koch 8ecaf69291 [LTO] Restore original linkage of externals prior to splitting
Summary:
This is a companion patch for http://reviews.llvm.org/D16124.

Internalized symbols increase the size of strongly-connected components in
SCC-based module splitting and thus reduce the amount of parallelism. This
patch records the original linkage of non-local symbols prior to
internalization and then restores it just before splitting/CodeGen. This is
also useful for cases where the linker requires symbols to remain external, for
instance, so they can be placed according to linker script rules.

It's currently under its own flag (-restore-globals) but should eventually
share a common flag with D16124.

Reviewers: joker.eph, pcc

Subscribers: slarin, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D16229

llvm-svn: 258100
2016-01-18 23:24:54 +00:00
Simon Pilgrim c4d519d340 Fixed MSVC warning that not all control paths return a value.
llvm-svn: 258099
2016-01-18 22:54:46 +00:00
Matt Arsenault 33e3ecee0c AMDGPU: Reduce 64-bit SRAs
llvm-svn: 258096
2016-01-18 22:09:04 +00:00
Matt Arsenault 6e3a45193a AMDGPU: Split 64-bit and of constant up
This breaks the tests that were meant for testing
64-bit inline immediates, so move those to shl where
they won't be broken up.

This should be repeated for the other related bit ops.

llvm-svn: 258095
2016-01-18 22:01:13 +00:00
Simon Pilgrim 77d86d1c08 [X86][AVX2] Ensure integer execution domain for integer blend tests
llvm-svn: 258094
2016-01-18 21:58:21 +00:00
Chad Rosier 234bf6fe5c [AArch64] Remove unused arguments. NFC.
AFAICT, these have been unused since the initial backend import.

llvm-svn: 258093
2016-01-18 21:56:40 +00:00
Matt Arsenault 3cbbc10488 AMDGPU: Generalize shl combine
Reduce 64-bit shl with constant > 32. We already special cased
this for the == 32 case, but this also works for any >= 32 constant.

llvm-svn: 258092
2016-01-18 21:55:14 +00:00
Simon Pilgrim 3ca2f21f50 [X86][SSE] Regenerate vector blend commutation tests
llvm-svn: 258091
2016-01-18 21:46:46 +00:00
Matt Arsenault 80edab99ff AMDGPU: Reduce 64-bit lshr by constant to 32-bit
64-bit shifts are very slow on some subtargets.

llvm-svn: 258090
2016-01-18 21:43:36 +00:00
Davide Italiano f0caa3eaab [Support/ELF] Remove field erroneously added in r258025.
Although glibc defines it, this is currently of no use for my primary
use-case (dumping DT_* keys correctly). Its semantic is not described
anywhere I can find, so better leave it out for now.
Thanks to Rafael for pointing out in his post-commit review!

llvm-svn: 258089
2016-01-18 21:20:02 +00:00
Adam Nemet d8968f0945 [LAA] Include function name in debug output
llvm-svn: 258088
2016-01-18 21:16:33 +00:00
Davide Italiano 5e82324fe4 [JIT] Add small-code model test for ELF.
The coverage is almost non-existent, hopefully more will come after this.

Differential Revision:	http://reviews.llvm.org/D16096

llvm-svn: 258087
2016-01-18 21:14:12 +00:00
Matt Arsenault 4085e8fcef AMDGPU: Cleanup sra test
llvm-svn: 258086
2016-01-18 21:13:56 +00:00
Matt Arsenault e83690c1cc AMDGPU: Add subtarget feature for instruction rates
llvm-svn: 258085
2016-01-18 21:13:50 +00:00
Simon Pilgrim 99c6c29c0c Fixed MSVC Win64 warning of implicit conversion of 32-bit shift to 64-bits.
llvm-svn: 258084
2016-01-18 21:11:19 +00:00
Sergei Larin d19d4d30d8 Add to the split module utility an SCC based method which allows not to globalize any local variables.
Summary:
    Currently llvm::SplitModule as the first step globalizes all local objects, which might not be desirable in some scenarios.
    This change adds a new flag to llvm::SplitModule that uses SCC approach to search for a balanced partition without the need to externalize symbols.
    Such partition might not be possible or fully balanced for a given number of partitions, and is a function of the module properties (global/local dependencies within the module).
    
    Joint development Tobias Edler von Koch (tobias@codeaurora.org) and Sergei Larin (slarin@codeaurora.org)
    
    Subscribers: llvm-commits, joker.eph
    
    Differential Revision: http://reviews.llvm.org/D16124

llvm-svn: 258083
2016-01-18 21:07:13 +00:00
Rafael Espindola df9e61b599 Delete dead code.
llvm-svn: 258082
2016-01-18 21:01:50 +00:00
Simon Pilgrim 3e5fb61978 [X86][AVX2] Broadcast subvectors
AVX2 can only broadcast from the zero'th element of a vector, but if the broadcastable element is the zero'th element of a 128-bit subvector its advantageous to extract the subvector, broadcast from that and avoid the loading of shuffle mask data that would be needed for VPERMPS/VPERMD. The only exception being when the source type is 4f64 or 4i64 which can directly use the immediate shuffle VPERMPD/VPERMQ directly.

Differential Revision: http://reviews.llvm.org/D16050

llvm-svn: 258081
2016-01-18 20:59:04 +00:00
Rafael Espindola a79078c3ce Use new function name. NFC.
llvm-svn: 258079
2016-01-18 20:55:24 +00:00
Krzysztof Parzyszek 7aae9b3782 [Hexagon] Recognize more copy-equivalents in RDF optimizations
llvm-svn: 258076
2016-01-18 20:45:51 +00:00
Krzysztof Parzyszek adc64b7df0 [RDF] Improvements to copy propagation
- Allow any instruction to define equality between registers.
- Keep the DFG updated.

llvm-svn: 258075
2016-01-18 20:43:57 +00:00
Krzysztof Parzyszek e6b0662092 [RDF] Improve compile-time performance of dead code elimination
llvm-svn: 258074
2016-01-18 20:42:47 +00:00
Krzysztof Parzyszek 69e670d5f9 [RDF] Allow unlinking ref nodes from data-flow chains only
llvm-svn: 258073
2016-01-18 20:41:34 +00:00
Craig Topper 5e46adb09a [TableGen] Use FoldingSets instead of DenseMaps to unique UnOpInit, BinOpInit and TernOpInit. This remove the memory needed to store the key for the DenseMap. NFC
llvm-svn: 258071
2016-01-18 20:36:06 +00:00
Craig Topper 7dcb1a5c89 [TableGen] Fix an assert I missed in r258063.
llvm-svn: 258068
2016-01-18 19:59:05 +00:00
Tom Stellard ccdc5391ea TargetLowering: Improve handling of (setcc ([sz]ext x) 0, cc) in SimplifySetCC
Summary:
When SimplifySetCC sees a setcc node that compares the result of a
value extension operation with a constant, it tries to simplify the
setcc node by eliminating the extension and shrinking the constant.

If shrinking the inputs to setcc is deemed not desirable by the target
(e.g. the target does not want a setcc comparing i1 values), then it
is still possible to optimize this sequence in some cases.

This patch adds the following combines to SimplifySetCC when shrinking setcc
inputs is not desirable:

(setcc ([sz]ext (setcc x, y, cc)), 0, setne) -> (setcc (x, y, cc))
(setcc ([sz]ext (setcc x, y, cc)), 0, seteq) -> (setcc (x, Y, !cc))

There are no tests for this yet, but once AMDGPU correctly implements
TargetLowering::isTypeDesirableForOp(), this new combine will be
exercised by the existing CodeGen/AMDGPU/setcc-opt.ll test.

Reviewers: resistor, arsenm

Subscribers: jroelofs, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15034

llvm-svn: 258067
2016-01-18 19:55:21 +00:00
Craig Topper 0e41d0b963 [TableGen] Merge the SuperClass Record and SMRange vector into a single vector. This removes the state needed to manage the extra vector thus reducing the size of the Record class. NFC
llvm-svn: 258065
2016-01-18 19:52:37 +00:00
Craig Topper d4d3ebd937 [TableGen] Reorder fields in Record class to optimize memory usage. NFC
llvm-svn: 258064
2016-01-18 19:52:29 +00:00
Craig Topper fbfd578056 [TableGen] Allocate the Init pointer array for BitsInit/ListInit after the BitsInit/ListInit object itself. Saves a bit of memory. NFC
llvm-svn: 258063
2016-01-18 19:52:24 +00:00
Sanjay Patel c2ceb8b2d8 combine clauses with same output ; NFCI
llvm-svn: 258062
2016-01-18 19:17:58 +00:00
Simon Atanasyan e03126aea4 [llvm-readobj][ELF] s/dyn_rela_/dyn_rel_/ No functional changes.
Follow up to r258001. These template functions might return both REL and RELA
relocations. The 'rel' noun looks less ambiguous.

llvm-svn: 258060
2016-01-18 18:52:04 +00:00
Sanjay Patel 7b7eec11c0 use m_OneUse ; NFCI
llvm-svn: 258059
2016-01-18 18:36:38 +00:00
Sanjay Patel 3b8dcc731e fix variable names, typos ; NFC
llvm-svn: 258058
2016-01-18 18:28:09 +00:00
Sanjay Patel d09b44a752 fix typo; NFC
llvm-svn: 258057
2016-01-18 17:50:23 +00:00
Igor Breger 239fda676c AVX512: Masked store intrinsic implementation.
Implemented intrinsic for the follow instructions (store) : VMOVDQU8/16/32/64, VMOVDQA32/64, VMOVAPS/PD, VMOVUPS/PD.

Differential Revision: http://reviews.llvm.org/D16271

llvm-svn: 258047
2016-01-18 13:52:57 +00:00
Elena Demikhovsky 9242ea87d6 Added Cannonlake processor to X86 Target
Differential Revision: http://reviews.llvm.org/D16289

llvm-svn: 258046
2016-01-18 13:00:31 +00:00
Igor Breger dd6522c653 AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instruction.
code example , previous implementation.
    movzbl  %dil, %eax
    kmovw  %eax, %k0
  new code
    kmovw  %edi, %k0

Differential Revision: http://reviews.llvm.org/D16287

llvm-svn: 258045
2016-01-18 12:02:45 +00:00
Oliver Stannard 9f68749eba [ARM] Operands for PKHTB alias should be swapped
When the shift immediate is zero, PKHTB is an alias for PKHBT, but the order of
the input operands needs to be swapped.

Differential Revision: http://reviews.llvm.org/D16288

llvm-svn: 258044
2016-01-18 11:56:35 +00:00
Michael Zuckerman 9c47e0681c [AVX512] adding AVXVBMI feature flag
Fixing wrong typo (avx515) → (avx512) 
Review over the shoulder by asaf . 

Differential Revision: http://reviews.llvm.org/D16190

llvm-svn: 258041
2016-01-18 11:12:47 +00:00
Xinliang David Li 42a13308a1 [Coverage] move a local var to be BinaryCoverageReader's member
The symtab is logically referenced beyond the call to the create
method. This changes makes sure its lifetime matches that of
the reader.

llvm-svn: 258036
2016-01-18 06:48:01 +00:00
Junmo Park 3347e7823a Remove extra whitespace. NFC.
llvm-svn: 258035
2016-01-18 06:42:51 +00:00