Commit Graph

838 Commits

Author SHA1 Message Date
Joerg Sonnenberger 7c7fcec329 NetBSD uses long derived size_t / ssize_t in all ARM ABIs.
llvm-svn: 196114
2013-12-02 16:09:34 +00:00
Joerg Sonnenberger 84c7ca8851 NetBSD uses signed wchar_t on ARM platforms.
llvm-svn: 195970
2013-11-30 00:38:16 +00:00
Richard Barton 3b82ed3948 Add support for Cortex-A12.
Patch by Oliver Stannard!

llvm-svn: 195449
2013-11-22 11:53:28 +00:00
Tim Northover 5bb34ca4df ARM: define & use __ARM_NEON on ARM32 (as per ACLE)
There seem to be quite a few references to the old macro __ARM_NEON__ on the
internet, so I don't think it's a good idea to remove it entirely (at least
yet), but the canonical name does not have the trailing underscores so we
should use that ourselves.

llvm-svn: 195353
2013-11-21 12:36:34 +00:00
Jim Grosbach e2bfac497d ARM: embedded v7 'darwin' doesn't get min-version defines.
Make sure armv7 doesn't get the iOS deployment version definitions when
it's being used for non-iOS.

rdar://15497681

llvm-svn: 195149
2013-11-19 20:18:39 +00:00
Jiangning Liu c8b0a1ad95 Clean up predefined macros for AArch64 to follow ACLE 2.0.
llvm-svn: 195068
2013-11-19 01:33:17 +00:00
Tom Stellard 5558304ba2 R600: Add processor type for Hawaii
llvm-svn: 194751
2013-11-14 23:45:53 +00:00
Daniel Sanders 8b59af15ed [mips][msa] Enable inlinse assembly for MSA.
Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
  asm ("ldi.w %w0, 1", "=f"(result));

Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.

MSA registers (including control registers) are supported in clobber lists.

llvm-svn: 194476
2013-11-12 12:56:01 +00:00
Robert Lytton cc4246614f XCore target Type defines.
Change SizeType, PtrDiffType, IntPtrType, WCharType, WIntType
to follow the XMOS llvm-gcc front end's settings.

llvm-svn: 194461
2013-11-12 10:09:30 +00:00
Akira Hatanaka c4baedd71d [mips] Partially revert r193640. Stack alignment should not be determined by
the floating point register mode.

llvm-svn: 194426
2013-11-11 22:10:46 +00:00
Tim Northover e77f78cbad Darwin(ish): we don't want __ARM_EABI__ even on v7a embedded targets.
llvm-svn: 194408
2013-11-11 19:11:22 +00:00
Joerg Sonnenberger 0e921f2bd9 NetBSD 6.99.26 switched to default rounding mode, so adjust
__FLT_EVAL_METHOD__ accordingly. Add test case for this and the SSE2
variances on NetBSD.

llvm-svn: 194377
2013-11-11 14:00:37 +00:00
Benjamin Kramer d9a5e2a490 Driver: Add support for -march=bdver3 on x86.
llvm-svn: 193985
2013-11-04 10:29:51 +00:00
Amara Emerson 703da2ea98 [AArch64] Add some CPU targets for "generic", A-53 and A-57.
Enables the clang driver to begin targeting specific CPUs. Introduced a
"generic" CPU which will ensure that the optional FP feature is enabled
by default when it gets to LLVM, without needing any extra arguments.
Cortex-A53 and A-57 are also introduced with tests, although backend
handling of them does not yet exist.

llvm-svn: 193740
2013-10-31 09:32:33 +00:00
Akira Hatanaka babd67e6ce [mips] Delete unused functions.
llvm-svn: 193674
2013-10-30 02:38:17 +00:00
Akira Hatanaka 618b29813a [mips] Align the stack to 16-bytes for -mfp64.
llvm-svn: 193640
2013-10-29 19:00:35 +00:00
Akira Hatanaka 9064e36551 [mips] Move setDescriptionString to base class MipsTargetInfoBase and call it
at the end of handleTargetFeatures.

No intended functionality change.

llvm-svn: 193636
2013-10-29 18:30:33 +00:00
Tom Stellard 08ded12ffb R600: Add Sea Islands GPUs
llvm-svn: 193622
2013-10-29 16:38:29 +00:00
Bernard Ogden 18b5701a68 ARM: Add -m[no-]crc to dis/enable CRC subtargetfeature from clang
Allow users to disable or enable CRC subtarget feature.

Differential Revision: http://llvm-reviews.chandlerc.com/D2037

llvm-svn: 193600
2013-10-29 09:47:51 +00:00
Bernard Ogden da13af380a Add driver support for FP, SIMD and crypto defaults.
Although we wire up a bit for v8fp for macro setting
purposes, we don't set a macro yet. Need to ask list
about that.

Change-Id: Ic9819593ce00882fbec72757ffccc6f0b18160a0
llvm-svn: 193367
2013-10-24 18:32:51 +00:00
Bernard Ogden 58a05cff97 Clean up char/numeric comparisons in ARM getTargetDefines
Change-Id: Ie07228411b68252adcd5cf80b27ccd2eb3b031d9
llvm-svn: 193366
2013-10-24 18:32:44 +00:00
Bernard Ogden 021d7dacd0 Teach clang driver about Cortex-A53 and Cortex-A57.
Adds some Cortex-A53 strings where they were missing before.
Cortex-A57 is entirely new to clang.

Doesn't touch code only used by Darwin, in consequence of which
one of the A53 lines has been removed.

Change-Id: I5edb58f6eae93947334787e26a8772c736de6483
llvm-svn: 193364
2013-10-24 18:32:36 +00:00
Tim Northover 901dee4d28 ARM-Darwin: Use the *-*-darwin-eabi triple for v6m & v7m archs
These arch arguments are used for embedded targets (obviously) which need a
different calling convention to iOS.

llvm-svn: 193328
2013-10-24 10:48:50 +00:00
Silviu Baranga e5690463e2 Set the default hardware division features for ARM cpus. Also set it as default for A32 armv8.
llvm-svn: 193075
2013-10-21 10:59:33 +00:00
Silviu Baranga f9671dd09d Add the __ARM_ARCH_EXT_IDIV__ predefine. It is set to 1 if we have hardware divide in the mode that we are compiling in (depending on the target features), not defined if we don't. Should be compatible with the GCC conterpart. Also adding a -hwdiv option to overide the default behavior.
llvm-svn: 193074
2013-10-21 10:54:53 +00:00
Simon Atanasyan 2c97a81e81 [Mips] Define __mips_fpr and _MIPS_FPSET macros.
llvm-svn: 192969
2013-10-18 13:13:53 +00:00
Eric Christopher 3ff21b3195 Rename HandleTargetFeatures->handleTargetFeatures to match
everything else in the class.

llvm-svn: 192851
2013-10-16 21:26:26 +00:00
Eric Christopher 2fe3b4a490 Add preprocessor support for powerpc vsx.
The test should be expanded upon for more powerpc checking.

llvm-svn: 192849
2013-10-16 21:19:26 +00:00
Eric Christopher c04fe09c1d Fix comments.
llvm-svn: 192847
2013-10-16 21:19:19 +00:00
Yunzhong Gao 6108936fa6 Enabling 3DNow! prefetch instruction support for a few AMD processors in the
clang front end. This change will allow the __PRFCHW__ macro to be set on these
processors and hence include prfchwintrin.h in x86intrin.h header. Support for
the intrinsic itself seems to have already been added in r178041.

Differential Revision: http://llvm-reviews.chandlerc.com/D1934

llvm-svn: 192829
2013-10-16 19:07:02 +00:00
Nick Lewycky 50e8f480ea Add support for -mcx16, and predefine __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 when
it is enabled. Also enable it on the same architectures that GCC does.

llvm-svn: 192045
2013-10-05 20:14:27 +00:00
Weiming Zhao 53a797ce7b Fix PR 12730: Add _GCC_HAVE_SYNC_COMPARE_AND_SWAP macros for ARM
llvm-svn: 191707
2013-09-30 22:51:32 +00:00
Ed Schouten d062146896 Add character set related __STDC_* definitions.
Clang uses UTF-16 and UTF-32 for its char16_t's and char32_t's
exclusively. This means that we can define __STDC_UTF_16__ and
__STDC_UTF_32__ unconditionally.

While there, define __STDC_MB_MIGHT_NEQ_WC__ for FreeBSD. FreeBSD's
wchar_t's don't encode characters as ISO-10646; the encoding depends on
the locale used. Because the character set used might not be a superset
of ASCII, we must define __STDC_MB_MIGHT_NEQ_WC__.

llvm-svn: 191631
2013-09-29 07:54:52 +00:00
Yunzhong Gao 1f6aeebe76 Adding -mtbm and -mno-tbm command line options to the clang front end for the
x86 TBM instruction set. Also adding a __TBM__ macro if the TBM feature is
enabled. Otherwise there should be no functionality change to existing features.

Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1693

llvm-svn: 191326
2013-09-24 19:00:58 +00:00
Simon Atanasyan 22127cee34 [Mips] Support -mnan=2008 option. Define "__mips_nan2008" macros and pass
this option to the assembler.

llvm-svn: 191282
2013-09-24 09:09:16 +00:00
Petar Jovanovic c19a284182 [Mips] Allocate NaClTargetInfo for MIPSEL NaCl
A patch to AllocateTarget function to recognize llvm::Triple::NaCl for
MIPSEL and return NaClTargetInfo. Additional test has been added to check
if the expected macros get defined.

llvm-svn: 191124
2013-09-21 01:27:01 +00:00
Ben Langmuir 58078d0103 Add C intrinsics for Intel SHA Extensions
Intrinsics added shaintrin.h, which is included from x86intrin.h if __SHA__ is
enabled. SHA implies SSE2, which is needed for the __m128i type.

Also add the -msha/-mno-sha option.

llvm-svn: 190999
2013-09-19 13:22:04 +00:00
Craig Topper 2956112308 Use curly braces all the way through long if/else chain for consistency and readability.
llvm-svn: 190982
2013-09-19 01:13:07 +00:00
Craig Topper 5f79e2661d Disabling sse2 should disable aes and pclmul support.
llvm-svn: 190977
2013-09-19 00:01:05 +00:00
Joey Gouly 1e8637b259 [ARMv8] Add builtins for CRC instructions.
Patch by Bradley Smith!

llvm-svn: 190931
2013-09-18 10:07:09 +00:00
Craig Topper 86d79ef4b8 Push contents of X86TargetInfo::setFeatureEnabled down to a static function called by the virtual version and all the places in getDefaultFeatures. This way getDefaultFeatures doesn't make so many virtual calls.
llvm-svn: 190847
2013-09-17 04:51:29 +00:00
Craig Topper 13f61a6c37 Mark setSSELevel/setMMXLevel/setXOPLevel as static since they don't access anything in the class.
llvm-svn: 190846
2013-09-17 04:12:55 +00:00
Amara Emerson 8c3de546d6 Add error checking to reject neon_vector_type attribute on targets without NEON.
Patch by Artyom Skrobov.

llvm-svn: 190801
2013-09-16 18:07:35 +00:00
Craig Topper 31db3a2efc Make F16C feature imply AVX. Matches GCC behavior.
llvm-svn: 190776
2013-09-16 04:54:13 +00:00
Cameron Esfahani 556d91e2c3 Clean up some Triple usage in clang.
llvm-svn: 190737
2013-09-14 01:09:11 +00:00
Preston Gurd a3c58c02f1 Update Atom Silvermont (SLM) support by adding enabled features.
llvm-svn: 190718
2013-09-13 19:27:17 +00:00
Renato Golin 1a04f22356 Add more Cortex CPUs and tests
llvm-svn: 190703
2013-09-13 17:02:54 +00:00
Renato Golin eefb577be8 Fix Neon detection for Cortex-A class, plus adds some more CPUs to default features
llvm-svn: 190702
2013-09-13 17:02:45 +00:00
David Tweed 31d09b0cef Certain multi-platform languages, such as OpenCL, have the concept of
address spaces which is both (1) a "semantic" concept and
(2) possibly a hardware level restriction. It is desirable to
be able to discard/merge the LLVM-level address spaces on arguments for which
there is no difference to the current backend while keeping
track of the semantic address spaces in a funciton prototype. To do this
enable addition of the address space into the name-mangling process. Add
some tests to document this behaviour against inadvertent changes.

Patch by Michele Scandale!

llvm-svn: 190684
2013-09-13 12:04:22 +00:00
Craig Topper c0070a4320 Fix a bug where -msse followed by -mno-sse would leave MMX enabled.
llvm-svn: 190496
2013-09-11 06:48:53 +00:00
Alexey Samsonov 3767ccf318 Delete unused static class members
llvm-svn: 190394
2013-09-10 09:26:48 +00:00
Craig Topper 7481d8aa17 Separate popcnt and sse4.2 feature control somewhat to match gcc behavior.
Enabling sse4.2 will implicitly enable popcnt unless popcnt is explicitly disabled.
Disabling sse4.2 will not disable popcnt if popcnt is explicitly enabled.

llvm-svn: 190387
2013-09-10 06:55:47 +00:00
Sylvestre Ledru 15832288f4 Fix the profile of the function (fix commit 190048)
llvm-svn: 190051
2013-09-05 13:58:07 +00:00
Sylvestre Ledru 4afe74ac26 Fix bug #17104 - Target info for GNU/kFreeBSD were missing.
As a result, Clang doesn't define the pre-processor macros that are expected
on this platform.

Thanks to Robert Millan for the patch

llvm-svn: 190048
2013-09-05 13:47:07 +00:00
Benjamin Kramer ffecc84583 Add support for -march=slm, aka Intel Atom Silvermont.
llvm-svn: 189670
2013-08-30 14:05:34 +00:00
Charles Davis b5a214e4f3 Add ms_abi and sysv_abi attribute handling.
Based on a patch by Benno Rice!

llvm-svn: 189644
2013-08-30 04:39:01 +00:00
Reid Kleckner 78af0708b7 Delete CC_Default and use the target default CC everywhere
Summary:
Makes functions with implicit calling convention compatible with
function types with a matching explicit calling convention.  This fixes
things like calls to qsort(), which has an explicit __cdecl attribute on
the comparator in Windows headers.

Clang will now infer the calling convention from the declarator.  There
are two cases when the CC must be adjusted during redeclaration:
1. When defining a non-inline static method.
2. When redeclaring a function with an implicit or mismatched
convention.

Fixes PR13457, and allows clang to compile CommandLine.cpp for the
Microsoft C++ ABI.

Excellent test cases provided by Alexander Zinenko!

Reviewers: rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D1231

llvm-svn: 189412
2013-08-27 23:08:25 +00:00
Tom Stellard 30687219ba R600: Add local address pointer size to DataLayout
llvm-svn: 189302
2013-08-27 00:55:26 +00:00
Rafael Espindola 890498236b Update now that llvm uses the same feature names as the driver.
llvm-svn: 189142
2013-08-23 20:21:37 +00:00
Rafael Espindola eb26547177 Move -mfpmath handling to -cc1 and implement it for x86.
The original idea was to implement it all on the driver, but to do that the
driver needs to know the sse level and to do that it has to know the default
features of a cpu.

Benjamin Kramer pointed out that if one day we decide to implement support for
' __attribute__ ((__target__ ("arch=core2")))', then the frontend needs to
keep its knowledge of default features of a cpu.

To avoid duplicating which part of clang handles default cpu features,
it is probably better to handle -mfpmath in the frontend.

For ARM this patch is just a small improvement. Instead of a cpu list, we
check if neon is enabled, which allows us to reject things like

-mcpu=cortex-a9 -mfpu=vfp -mfpmath=neon

For X86, since LLVM doesn't support an independent ssefp feature, we just
make sure the selected -mfpmath matches the sse level.

llvm-svn: 188939
2013-08-21 21:59:03 +00:00
Rafael Espindola 8c407dedd3 Remove dead code.
setFeatureEnabled is never called with "32" or "64". The driver never passes it
and mips' getDefaultFeatures sets the Features map directly.

llvm-svn: 188913
2013-08-21 18:13:43 +00:00
Rafael Espindola 4396480358 Move the logic for selecting the last feature in the command line to the driver.
This is a partial revert of r188817 now that the driver handles -target-feature
in a single place.

llvm-svn: 188910
2013-08-21 17:34:32 +00:00
Rafael Espindola 0221d8636e Don't disable SSE4A when disabling AVX.
Thanks for Craig Topper for noticing it.

llvm-svn: 188902
2013-08-21 13:28:02 +00:00
Craig Topper 679b53ac67 Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU.
llvm-svn: 188867
2013-08-21 05:29:10 +00:00
Craig Topper 9c4d17f65c Replace avx-512 with avx512f to match llvm side and what gcc patches appear to be using.
llvm-svn: 188860
2013-08-21 03:59:22 +00:00
Rafael Espindola db0fcfbfae Centralize the logic for handling -m* options and fix pr16943.
This moves the logic for handling -mfoo -mno-foo from the driver to -cc1. It
also changes -cc1 to apply the options in order, fixing pr16943.

The handling of -mno-mmx -msse is now an explicit special case.

llvm-svn: 188817
2013-08-20 18:57:55 +00:00
Rafael Espindola a38ce29576 Remove duplicated error checking.
The driver validates its options, so we don't need to redo the work in
"clang -cc1".

llvm-svn: 188806
2013-08-20 15:30:32 +00:00
Rafael Espindola d9401d664b Remove dead code.
llvm-svn: 188802
2013-08-20 14:18:24 +00:00
Rafael Espindola e62e279f97 Refactor the x86 feature handling.
This removes the very long chains of
Feature["avx"] = Feature["sse42"] = ... = true;

llvm-svn: 188799
2013-08-20 13:44:29 +00:00
Craig Topper 007b059c33 Change 'avx512' to 'avx-512' to match llvm backend.
llvm-svn: 188762
2013-08-20 07:39:54 +00:00
Craig Topper 449314e1ec Add AVX-512 feature flag and knl cpu to clang.
llvm-svn: 188758
2013-08-20 07:09:39 +00:00
Craig Topper 33b4cde2f2 Revert r188756 because some other changes snuck in with it.
llvm-svn: 188757
2013-08-20 07:07:29 +00:00
Craig Topper ffb7180e96 Add AVX-512 feature flag and knl cpu to clang.
llvm-svn: 188756
2013-08-20 07:05:05 +00:00
Bob Wilson 834400b484 Bump the value of the __APPLE_CC__ predefined macro up to 6000.
The previous value was set to match some ancient version of Apple's GCC.
The value should be higher than anything used by Apple's GCC, but we don't
intend for this value to be updated in the future. We have other macros to
identify compiler versions. <rdar://problem/14749599>

llvm-svn: 188700
2013-08-19 20:23:37 +00:00
Robert Lytton 0e07649ae5 Add XCore target
llvm-svn: 188258
2013-08-13 09:43:10 +00:00
Jack Carter 44ff1e5673 [Mips] MSA frontend option support
This patch adds -mmsa and -mno-msa to the options supported by 
clang to enable and disable support for MSA.

When MSA is enabled, a predefined macro '__mips_msa' is defined to 1.

Patch by Daniel Sanders

llvm-svn: 188184
2013-08-12 17:20:29 +00:00
Tim Northover 2fe823a6c3 AArch64: initial NEON support
Patch by Ana Pazos

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

llvm-svn: 187568
2013-08-01 09:23:19 +00:00
Bill Schmidt 778d387684 [PowerPC] Support powerpc64le as a syntax-checking target.
This patch provides basic support for powerpc64le as an LLVM target.
However, use of this target will not actually generate little-endian
code.  Instead, use of the target will cause the correct little-endian
built-in defines to be generated, so that code that tests for
__LITTLE_ENDIAN__, for example, will be correctly parsed for
syntax-only testing.  Code generation will otherwise be the same as
powerpc64 (big-endian), for now.

The patch leaves open the possibility of creating a little-endian
PowerPC64 back end, but there is no immediate intent to create such a
thing.

The new test case variant ensures that correct built-in defines for
little-endian code are generated.

llvm-svn: 187180
2013-07-26 01:36:11 +00:00
Rafael Espindola 9d910f9ac3 Remove the mblaze backend from clang.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

llvm-svn: 187143
2013-07-25 18:42:13 +00:00
Richard Sandiford 4652d893bc [SystemZ] Add -march= command-line option
llvm-svn: 186694
2013-07-19 16:51:51 +00:00
Bill Schmidt 58ae47bf10 [PowerPC] FreeBSD does not require f128 in its data layout string.
Long double is 64 bits on FreeBSD PPC, so the f128 entry is superfluous.

llvm-svn: 185582
2013-07-03 21:03:06 +00:00
Roman Divacky 13b586f298 Dont define __LONG_DOUBLE_128__ unless LongDoubleWidth is really 128bits width.
It's not the case on ie. FreeBSD.

llvm-svn: 185572
2013-07-03 19:45:54 +00:00
Anton Korobeynikov ef4129084a Fix MSP430 builtin types.
Patch by Job Noorman!

llvm-svn: 185362
2013-07-01 19:42:40 +00:00
Benjamin Kramer b1276b4cff Driver: Push triple objects around instead of going to std::string all the time.
No functionality change.

llvm-svn: 185261
2013-06-29 16:37:14 +00:00
Joey Gouly 7db275b947 Add support for passing v8fp options via -mfpu.
llvm-svn: 185075
2013-06-27 13:19:54 +00:00
Joey Gouly d077bc6a20 Add support for passing '-target armv8' through the Driver.
llvm-svn: 184970
2013-06-26 17:19:48 +00:00
Chandler Carruth 6aa92ad762 Fix a couple of PPC predefined macros that I spotted while driving by
this code. These aren't technically standard predefines for the platform
but apparantly lots of folks use them as they show up within LLVM's own
codebase. ;] This may even fix some self host issues w/ the JIT!!!

llvm-svn: 184830
2013-06-25 11:13:47 +00:00
Justin Holewinski 7ceab3a892 [NVPTX] Add NVPTX register constraints
llvm-svn: 184578
2013-06-21 18:51:24 +00:00
Bob Wilson 87b3a189ef size_t on Darwin AAPCS targets is "unsigned long". <rdar://problem/14136459>
Some embedded targets use ARM's AAPCS with iOS header files that define size_t
as unsigned long, which conflicts with the usual AAPCS definition of size_t
as unsigned int.

llvm-svn: 184171
2013-06-18 05:36:04 +00:00
Rafael Espindola 3d4276e3cf Use atomic instructions on Bitrig armv6. Patch by Patrick Wildt.
llvm-svn: 184113
2013-06-17 20:00:15 +00:00
Ed Schouten 60afa2d923 Emit native implementations of atomic operations on FreeBSD/armv6.
Just like on Linux, FreeBSD/armv6 assumes the system supports
ldrex/strex unconditionally. It is also used by the kernel. We can
therefore enable support for it, like we do on Linux.

While there, change one of the unit tests to explicitly test against
armv5 instead of armv7, as it actually tests whether libcalls are
emitted.

llvm-svn: 184040
2013-06-15 09:40:14 +00:00
Bob Wilson 1710d59553 Do not report -Wasm-operand-widths for ARM output operands. <rdar://14050337>
We're getting reports of this warning getting triggered in cases where it
is not adding any value. There is no asm operand modifier that you can use
to silence it, and there's really nothing wrong with having an LDRB, for
example, with a "char" output.

llvm-svn: 183172
2013-06-03 23:57:13 +00:00
Jakob Stoklund Olesen 826df14d72 OpenBSD/sparc64 uses long long for int64_t and intmax_t.
Other operating systems, including FreeBSD and NetBSD, use long.

llvm-svn: 182215
2013-05-19 17:53:37 +00:00
David Fang 072d47b67f fix PR 15726: ptrdiff_t should be int on PowerPC Darwin
llvm-svn: 182029
2013-05-16 17:51:48 +00:00
Jakob Stoklund Olesen 248520bdea Use correct types for SPARC v9.
It's an LP64 platform.

llvm-svn: 181867
2013-05-15 03:22:33 +00:00
Rafael Espindola 92dbc3183f Use atomic instructions on linux thumb v7.
This matches gcc's behaviour. The patch also explicitly parses the version so
that this keeps working when we add support for v8.

llvm-svn: 181750
2013-05-14 00:44:24 +00:00
Rafael Espindola 101d5b956a Use atomic instructions on ARM linux.
This is safe given how the pre-v6 atomic ops funcions in libgcc are
implemented.

This fixes pr15429.

llvm-svn: 181728
2013-05-13 20:09:47 +00:00
Ulrich Weigand 47445073f8 Add SystemZ support
This patch then adds all the usual platform-specific pieces for SystemZ:
driver support, basic target info, register names and constraints,
ABI info and vararg support.  It also adds new tests to verify pre-defined
macros and inline asm, and updates a test for the minimum alignment change.

This version of the patch incorporates feedback from reviews by
Eric Christopher and John McCall.  Thanks to all reviewers!

Patch by Richard Sandiford.

llvm-svn: 181211
2013-05-06 16:26:41 +00:00
Tim Northover 8ec8c4bf89 AArch64: teach Clang about __clear_cache intrinsic
libgcc provides a __clear_cache intrinsic on AArch64, much like it
does on 32-bit ARM.

llvm-svn: 181111
2013-05-04 07:15:13 +00:00
Benjamin Kramer 914d7e06b6 Add support for -march=btver2.
llvm-svn: 181006
2013-05-03 10:47:15 +00:00
Jakob Stoklund Olesen f759989bcd Add some more required SPARC v9 predefined macros.
Solaris/AuroraUX only need __arch64__, the BSDs need the other variants.

llvm-svn: 180172
2013-04-24 04:36:38 +00:00
Jakob Stoklund Olesen 4dda152d14 Add support for sparcv9 targets.
The SPARC v8 and SPARC v8 architectures are very similar, so use a base
class to share most information between them.

Include operating systems with known SPARC v9 ports.

Also fix two issues with the SPARC v8 data layout string: SPARC v8 is a
big endian target with a 64-bit aligned stack.

llvm-svn: 179596
2013-04-16 15:17:49 +00:00
Simon Atanasyan 607776140b [Mips] Support -mmicromips / -mno-micromips command line options.
llvm-svn: 179489
2013-04-14 14:07:51 +00:00
Simon Atanasyan 1607191e66 [Mips] Follow-up to r179481. Consider "single-float" as a separate
independent of float ABI feature in the MipsTargetInfoBase class.

llvm-svn: 179486
2013-04-14 14:07:30 +00:00
Eli Bendersky 4f6791cafb The PNaCl target no longer permits __attribute__((regparm)).
Remove the custom lowering code dealing with it, disallow it in PNaclTargetInfo
and adjust tests accordingly.

llvm-svn: 179059
2013-04-08 21:31:01 +00:00
Tim Northover b85654d3cd AArch64: bring predefines in line with most recent ACLE document
The prefixes and names used are now identical to 32-bit ARM, which is also
expected to remain unchanged.

If we made this change after a release, we'd probably have to support both
variants for a while, but I think since AArch64 exists only on trunk now, it's
acceptable to simply swap them now.

llvm-svn: 178870
2013-04-05 14:08:55 +00:00
Michael J. Spencer a0d5eb3a27 Add support for __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} on x86.
This fixes std::thread with libstdc++.

llvm-svn: 178816
2013-04-04 23:53:43 +00:00
Tom Stellard 7856993228 R600: Add missing Southern Islands GPU to setCPU() function
llvm-svn: 178498
2013-04-01 20:56:49 +00:00
Justin Holewinski 91203e8468 Remove old NVPTX cpus and add new NVPTX cpus
llvm-svn: 178419
2013-03-30 14:38:26 +00:00
Hal Finkel 7d4585973a Add support for gcc-compatible -mfprnd -mno-fprnd PPC options
gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target
feature; support these options as well.

llvm-svn: 178414
2013-03-30 13:47:44 +00:00
Michael Liao ffaae3511a Add RDSEED intrinsic support defined in AVX2 extension
llvm-svn: 178331
2013-03-29 05:17:55 +00:00
Hal Finkel 1fe8b3dd4b Add support for gcc-compatible -mpopcntd -mno-popcntd PPC options
gcc provides -mpopcntd and -mno-popcntd for controlling the popcntd target
feature; support these options as well.

llvm-svn: 178235
2013-03-28 13:51:36 +00:00
Hal Finkel 279ca4d608 Add support for gcc-compatible -mmfcrf -mno-mfcrf PPC options
gcc provides -mmfcrf and -mno-mfcrf for controlling what we call
the mfocrf target feature. Also, PPC is now making use of the
static function AddTargetFeature used by the Mips Driver code.

llvm-svn: 178227
2013-03-28 08:38:53 +00:00
Michael Liao 74f4eaf4dc Add PRFCHW intrinsic support
- Add head 'prfchwintrin.h' to define '_m_prefetchw' which is mapped to
  LLVM/clang prefetch builtin
- Add option '-mprfchw' to enable PRFCHW feature and pre-define '__PRFCHW__'
  macro

llvm-svn: 178041
2013-03-26 17:52:08 +00:00
Matthew Curtis 7808cf1a39 Remove driver support for Hexagon V2 and V3
Driver will now error when trying to compile for V2 or V3.

Removal of V2 and V3 support will allow us to simplify the hexagon
back-end.

llvm-svn: 176859
2013-03-12 11:52:09 +00:00
Guy Benyei 5ea30273a1 Add 'e' to the SPIR data layout - SPIR is little endian for now.
Add 32/64 bit specific target defines for SPIR.

llvm-svn: 176629
2013-03-07 13:06:10 +00:00
Jack Carter beaccddcba Mips specific inline assembler constraint 'R'
'R' An address that can be sued in a non-macro load or store.

Including missing positive test case and fixed typo for r176453.

Thanks to Richard Smith for catching this!

Jack

llvm-svn: 176506
2013-03-05 19:10:54 +00:00
Bob Wilson f643afcd31 Tidy up lists of Cortex-A series processors, adding entries for A7.
Also fix a missing entry for cortex-r5 in one copy of getLLVMArchSuffixForARM.

llvm-svn: 176457
2013-03-04 22:37:46 +00:00
Jack Carter 427b404d0a Mips specific inline assembler constraint 'R'
'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.

llvm-svn: 176453
2013-03-04 21:36:11 +00:00
Tom Stellard c74b1e054c R600: Use the GPU type to determine the correct DataLayout v2
v2:
  - Add R600_DOUBLE_OPS for RV670
  - s/CPU/GPU/

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
llvm-svn: 176440
2013-03-04 17:40:53 +00:00
Simon Atanasyan 0da400cf92 [Mips] Add two new aliases for MIPS ABI names 32 (means o32 abi) and 64
(means n64 abi) to improve compatibility with GNU tools.
Patch by Jia Liu <proljc@gmail.com>.

llvm-svn: 176187
2013-02-27 14:55:49 +00:00
Logan Chien 5a5a96bfdc Implement __builtin_eh_return_data_regno() for ARM and MIPS.
llvm-svn: 175954
2013-02-23 04:24:36 +00:00
Peter Collingbourne 47f9f2d1e6 Revert r175912, "Add support for coldcc to clang" at John's request.
llvm-svn: 175936
2013-02-23 00:06:18 +00:00
Peter Collingbourne f32b3f2c55 Add support for coldcc to clang
llvm-svn: 175912
2013-02-22 19:24:35 +00:00
Jordan Rose 011bda8031 Revert "intmax_t is long long on Darwin, not long."
'long' and 'long long' are different for the purposes of mangling.
This caused <rdar://problem/13254874>.

This reverts commit c2f994d31ec85e9af811af38eb1b28709aef0b2c.

llvm-svn: 175681
2013-02-20 22:28:41 +00:00
Jordan Rose e2b34142c3 intmax_t is long long on Darwin, not long.
<rdar://problem/11540697>

llvm-svn: 175588
2013-02-20 01:56:21 +00:00
Tim Northover 847d2d4549 AArch64: add atomic support parameters to TargetInfo
This allows Clang to detect and deal wih __atomic_* operations properly on
AArch64. Previously we produced an error when encountering them at high
optimisation levels.

llvm-svn: 175438
2013-02-18 12:11:32 +00:00
Bill Schmidt 38378a06dd Add some missing PPC cpus
llvm-svn: 174215
2013-02-01 20:23:10 +00:00
Hal Finkel b58ce85ecc Add -mqpx and -mno-qpx feature flags to toggle use of the PPC QPX vector instruction set
I've renamed the altivec test to ppc-features (because now there is more than one feature to test).

llvm-svn: 174204
2013-02-01 18:44:19 +00:00
Hal Finkel df1e4bfcb2 Add PPC A2Q core and BG/Q preprocessor definitions
The a2q core is the variant of the a2 core used on the BG/Q supercomputers.

llvm-svn: 174151
2013-02-01 05:53:33 +00:00
Bill Schmidt 2fe4c67374 Enable -fno-altivec, -mno-altivec for PowerPC.
Introduces these negation forms explicitly and uses them to control a new
"altivec" target feature for PowerPC.  This allows avoiding generating
Altivec instructions on processors that support Altivec.

The new test case verifies that the Altivec "lvx" instruction is not
used when -fno-altivec is present on the command line.

llvm-svn: 174140
2013-02-01 02:14:03 +00:00
Tim Northover 9bb857a4f1 Add support for AArch64 target.
In cooperation with the LLVM patch, this should implement all scalar front-end
parts of the C and C++ ABIs for AArch64.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

llvm-svn: 174055
2013-01-31 12:13:10 +00:00
John McCall 359b885e12 First pass at abstracting out a class for the target C++ ABI.
llvm-svn: 173514
2013-01-25 22:30:49 +00:00
Adhemerval Zanella 5d874aeea9 PowerPC: fix __builtin_eh_return_data_regno return
llvm-svn: 173188
2013-01-22 20:02:45 +00:00
Akira Hatanaka b2206e71e1 [mips] Enable inlining of atomic ops on mips32 and mips64.
llvm-svn: 172855
2013-01-18 21:58:11 +00:00
Will Dietz f54319c891 [ubsan] Add support for -fsanitize-blacklist
llvm-svn: 172808
2013-01-18 11:30:38 +00:00
Dmitri Gribenko f857950d39 Remove useless 'llvm::' qualifier from names like StringRef and others that are
brought into 'clang' namespace by clang/Basic/LLVM.h

llvm-svn: 172323
2013-01-12 19:30:44 +00:00
Guy Benyei 03e61960c8 Enable intel_ocl_bicc for x86_64 target only. Remove fix from 171969 that enabled this extension for multiple targets.
llvm-svn: 172052
2013-01-10 10:41:05 +00:00
Akira Hatanaka 009173f613 [mips] Fix data layout string. Add 64 to the list of native integer widths
and add stack alignment information.

llvm-svn: 171588
2013-01-05 02:04:34 +00:00
Anshuman Dasgupta 89730ce9ee Correct Hexagon DataLayout string. Fixes bug 14744.
Patch by Krzysztof Parzyszek!

llvm-svn: 171415
2013-01-02 21:25:57 +00:00
Chandler Carruth ffd5551bc7 Rewrite #includes for llvm/Foo.h to llvm/IR/Foo.h as appropriate to
reflect the migration in r171366.

Re-sort the #include lines to reflect the new paths.

llvm-svn: 171369
2013-01-02 11:45:17 +00:00
Richard Smith 2bf7fdb723 s/CPlusPlus0x/CPlusPlus11/g
llvm-svn: 171367
2013-01-02 11:42:31 +00:00
Guy Benyei f0a014bbb7 Add intel_ocl_bicc calling convention as a function attribute to clang. The calling convention is already implemented in LLVM.
llvm-svn: 171056
2012-12-25 08:53:55 +00:00
Quentin Colombet f5a37a3b71 Add ARM cortex-r5 subtarget as available mcpu
llvm-svn: 170909
2012-12-21 17:57:47 +00:00
NAKAMURA Takumi 02f4395df6 Targets.cpp: [cygwin] Add the predefined macro "_X86_", according to newer version of cygwin/w32api.
llvm-svn: 170188
2012-12-14 10:17:26 +00:00
Guy Benyei 41aa1a4b92 Remove little endian specification from SPIR data layout - SPIR doesn't define endiannes in the data layout.
llvm-svn: 170125
2012-12-13 13:22:48 +00:00
Rafael Espindola 0f207edaa5 Initial support for FreeBSD on ARM.
Patch by Andrew Turner.

llvm-svn: 170096
2012-12-13 04:17:14 +00:00
Guy Benyei b798fc9849 Add SPIR32/SPIR64 targets to Clang
llvm-svn: 169917
2012-12-11 21:38:14 +00:00
Aaron Ballman 02df2e0872 Virtual method overrides can no longer have mismatched calling conventions. This fixes PR14339.
llvm-svn: 169705
2012-12-09 17:45:41 +00:00
David Chisnall a87d85994b long double should be 64 bits on FreeBSD/MIPS64. It possibly should be on
Linux too, as I think we inherited it from there.  The ABI spec says 128-bit,
although I think SGI's compiler on IRIX may be the only thing ever to support
this.

llvm-svn: 169674
2012-12-08 09:06:08 +00:00
Eli Bendersky d7c9203938 Adapt to LLVM commit 169291 which streamlines the usage of NaCl/NativeClient
in the triple.

llvm-svn: 169292
2012-12-04 18:38:10 +00:00
Bill Wendling 0517508c00 Don't emit a warning with an input/output parameter. We assume the user knows what they're doing here.
llvm-svn: 169059
2012-11-30 23:46:56 +00:00
Bill Wendling 3c6591d6ea Don't warn if the input size is less than the register size. Also don't warn if
the output size is greater than the register size. No truncation occurs with
those. Reword warning to make it clearer what's the problem is.

llvm-svn: 169054
2012-11-30 23:18:12 +00:00
Quentin Colombet 2e9952ef60 Add ARM cortex-a5 subtarget
llvm-svn: 168958
2012-11-29 23:15:27 +00:00
Quentin Colombet 9b541ff6af Revert commit revision r168953, to change the commit message, which was empty
llvm-svn: 168956
2012-11-29 23:07:08 +00:00
Quentin Colombet 2b14712eca (no commit message)
llvm-svn: 168953
2012-11-29 22:58:40 +00:00
Eli Friedman 4e91899e7b Fix the definition of the vfork() builtin on Haiku. PR14378.
llvm-svn: 168674
2012-11-27 02:58:24 +00:00
Eli Friedman 102dc4e30d Add missing "break". Thanks to Craig for spotting it.
I'm looking at ways to fix the relevant test so it can catch this sort of mistake.

llvm-svn: 168618
2012-11-26 21:57:28 +00:00
Benjamin Kramer 37196de31e Enable inlining of 4 byte atomic ops on ppc32, 8 byte atomic ops on ppc64.
Also fixes a bit/byte mismatch when checking if a target supports atomic ops of a certain size.

llvm-svn: 168260
2012-11-17 17:30:55 +00:00
Eli Friedman 3e94f57a0f Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim.
llvm-svn: 168239
2012-11-17 01:43:10 +00:00
Eli Friedman 1beddcffc3 Clean up X86 target feature translation code slightly. No intended functional change. Patch by Jung-uk Kim.
llvm-svn: 168237
2012-11-17 01:16:19 +00:00
Douglas Gregor f8715de599 Since CreateTargetInfo is taking ownership of the target options, pass
it as a pointer. 

llvm-svn: 168136
2012-11-16 04:24:59 +00:00
Eric Christopher fd081ca50a Remove the cellspu port.
Approved by Chris Lattner.

llvm-svn: 167983
2012-11-14 22:08:59 +00:00
Bill Wendling 3c7fed87d2 The register constraint could mean a 16- or 8-bit register.
llvm-svn: 167735
2012-11-12 18:52:32 +00:00
Bill Wendling 887b485dbe Check that the input size is correct for the given constraint.
The 'a', 'c', and 'd' constraints on i386 mean a 32-bit register. We cannot
place a 64-bit value into the 32-bit register. Error out instead of causing the
compiler to spew general badness.
<rdar://problem/12415959>

llvm-svn: 167717
2012-11-12 06:42:51 +00:00
Michael Liao 625a875f05 Add clang support of RTM from TSX
- New options '-mrtm'/'-mno-rtm' are added to enable/disable RTM feature
- Builtin macro '__RTM__' is defined if RTM feature is enabled
- RTM intrinsic header is added and introduces 3 new intrinsics, namely
  '_xbegin', '_xend', and '_xabort'.
- 3 new builtins are added to keep compatible with gcc, namely
  '__builtin_ia32_xbegin', '__builtin_ia32_xend', and '__builtin_ia32_xabort'.
- Test cases for pre-defined macro and new intrinsic codegen are added.

llvm-svn: 167665
2012-11-10 05:17:46 +00:00
Benjamin Kramer d0b9f090fb Set TLSSupported to false on Haiku.
Haiku does not support this (yet). Leaving it set to true leads to
configure scripts detecting __thread being available and Clang emitting
code for it, resulting in binaries the runtime_loader will refuse to
load.

Patch by Jonathan Schleifer!

llvm-svn: 167576
2012-11-08 12:59:15 +00:00
Richard Smith 43f9d9c6d9 Rename LangOptions members for address sanitizer and thread sanitizer from
*Sanitizer to Sanitize* in preparation for later patches.

llvm-svn: 167405
2012-11-05 21:48:12 +00:00
Bill Schmidt cec4cb151a This patch adds alignment information for long double to the 64-bit PowerPC
ELF subtarget.

The existing description string is moved from PPC64TargetInfo to its
DarwinTargetInfo subclass, to avoid any changes to the Darwin ABI.
PPC64TargetInfo now has two possible description strings: one for FreeBSD,
which requires 8-byte alignment, and a default string that requires
16-byte alignment.

I've added a test for PPC64 Linux to verify the 16-byte alignment.  If
somebody wants to add a separate test for FreeBSD, that would be great.

Note that there is a companion patch to update the alignment information
in LLVM, which I am committing now as well.

llvm-svn: 166927
2012-10-29 14:59:24 +00:00
Bill Wendling 9d1ee1175d Recommit Eric's code to validate ASM string's constraints and modifiers.
This code checks the ASM string to see if the output size is able to fit within
the variable specified as the output. For instance, scalar-to-vector conversions
may not really work. It's on by default, but can be turned off with a flag if
you think you know what you're doing.

This is placed under a flag ('-Wasm-operand-widths') and flag group ('-Wasm').

<rdar://problem/12284092>

llvm-svn: 166737
2012-10-25 23:28:48 +00:00
David Tweed 8f67653d26 Modify the targets to set appropriate calling convention defaults and C variables when using a gnueabihf or aapcs-vfp target.
Tested by me and Wei-Ren Chen.

llvm-svn: 166679
2012-10-25 13:33:01 +00:00
Bill Wendling d75987dde9 Revert r166647 to rethink the patch...
llvm-svn: 166655
2012-10-25 00:32:44 +00:00
Bill Wendling 753c8782df Add some support for diagnosing possibly mismatched constraint, type size and
modifiers. (From an idea by Eric...)
<rdar://problem/12284092>

llvm-svn: 166647
2012-10-25 00:05:55 +00:00
Daniel Dunbar d9debab629 Fix pre-commit refacto failure.
llvm-svn: 166431
2012-10-22 18:56:43 +00:00
Daniel Dunbar f7124da497 driver/Darwin: Follow up to last patch, M-class CPUs are AAPCS but not EABI.
llvm-svn: 166430
2012-10-22 18:51:13 +00:00
Douglas Gregor cb177f15e7 Serialize TargetOptions into an AST file, and make sure that we keep
target options around so they can be accessed at any point (rather
than keeping them transient).

llvm-svn: 166072
2012-10-16 23:40:58 +00:00
Derek Schuff a202096dc0 Add pnaclcall convention to Native Client targets.
Because PNaCl bitcode must be target-independent, it uses some
different bitcode representations from other targets (e.g. byval and
sret for structures). This means that without additional type
information, it cannot meet some native ABI requirements for some
targets (e.g. passing structures containing unions by value on
x86-64). To allow generation of code which uses the correct native
ABIs, we also support triples such as x86_64-nacl, which uses
target-dependent IR (as opposed to le32-nacl, which uses byval and
sret).

To allow interoperation between the two types of code, this patch adds
a calling convention attribute to be used in code compiled with the
target-dependent triple, which will generate code using the le32-style
bitcode. This calling convention does not need to be explicitly
supported in the backend because it determines bitcode representation
rather than native conventions (the backend just needs to undersand
how to handle byval and sret for the Native Client OS).

This patch implements __attribute__((pnaclcall)) to generate calls in
bitcode according to the le32 bitcode conventions, an attribute which
is accepted by any Native Client target, but issues a warning
otherwise.

llvm-svn: 166065
2012-10-16 22:30:41 +00:00
Douglas Gregor bc10b9fbc5 Teach TargetInfo to hold on to the TargetOptions with which it was
created.

llvm-svn: 165943
2012-10-15 16:45:32 +00:00
Eli Friedman d13b41e32a Add TargetInfo for r600.
Patch by Tom Stellard.

llvm-svn: 165850
2012-10-12 23:32:00 +00:00
Derek Schuff 57b7e8f63f Properly factor Native Client defines to support NaCl as an OS
with x86/ARM architecture

llvm-svn: 165722
2012-10-11 16:55:58 +00:00
Derek Schuff c7dd722f0f Make X86_64ABIInfo clean for ABIs with 32 bit pointers, such as X32
and Native Client

llvm-svn: 165715
2012-10-11 15:52:22 +00:00
Manman Ren a45358c284 X86: add F16C support in Clang
Support the following intrinsics:
  _mm_cvtph_ps, _mm256_cvtph_ps, _mm_cvtps_ph, _mm256_cvtps_ph

rdar://12407875

llvm-svn: 165685
2012-10-11 00:59:55 +00:00
Logan Chien 57086ce248 Fix PR 11709: Change the definition of va_list to meet AAPCS requirement
AAPCS ABI Section 7.1.4 [1] specifies that va_list
should be defined as struct __va_list { void *__ap;};
And in C++, it is defined in namespace std.

[1] http://infocenter.arm.com/help/topic
         /com.arm.doc.ihi0042d/IHI0042D_aapcs.pdf

Patch by Weiming Zhao.

llvm-svn: 165609
2012-10-10 06:56:20 +00:00
Aaron Ballman e91c6be01e Allowing individual targets to determine whether a given calling convention is allowed or ignored with warning. This allows for correct name mangling for x64 targets on Windows, which in turn allows for linking against the Win32 APIs.
Fixes PR13782

llvm-svn: 165015
2012-10-02 14:26:08 +00:00
Bob Wilson 6fc8fb8da5 Add ARM VFPv4 feature and enable it by default for Swift.
llvm-svn: 164906
2012-09-29 23:52:52 +00:00
Bob Wilson d7cf104dae Add armv7s and some other arm variants supported by Mach-O files.
llvm-svn: 164905
2012-09-29 23:52:50 +00:00
Alexander Potapenko b4f819086a Disable source fortification on Darwin with AddressSanitizer.
ASan doesn't play well with -D_FORTIFY_SOURCE, which is enabled by default starting at OS X 10.7

llvm-svn: 164299
2012-09-20 10:10:01 +00:00
Hal Finkel f6d6cb0218 Add e500mc and e5500 to the list of valid PPC CPU names.
Patch by Tobias von Koch!

llvm-svn: 164176
2012-09-18 22:25:03 +00:00
Silviu Baranga 157f7c6742 This patch introduces A15 as a target in Clang.
llvm-svn: 163804
2012-09-13 15:06:00 +00:00
Anton Korobeynikov 26b1388293 Do not construct StringRef from NULL argument.
llvm-svn: 163465
2012-09-08 08:22:13 +00:00
Anton Korobeynikov e98c4dbd1e Provide some ACLE C defines. This should fix PR13796
llvm-svn: 163464
2012-09-08 08:08:27 +00:00
Logan Chien c6fd820937 Rename ANDROIDEABI to Android.
Most of the code guarded with ANDROIDEABI are not
ARM-specific, and having no relation with arm-eabi.
Thus, it will be more natural to call this
environment "Android" instead of "ANDROIDEABI".

Note: We are not using ANDROID because several projects
are using "-DANDROID" as the conditional compilation
flag.

llvm-svn: 163088
2012-09-02 09:30:11 +00:00
Simon Atanasyan c6a0be00ab Define __mips64 / __mips64__ macros for MIPS 64-bit targets.
The patch suggested by Brad Smith.

llvm-svn: 162858
2012-08-29 20:50:11 +00:00
Simon Atanasyan 16ee0057ab Use getTargetDefines() virtual function in MipsTargetInfoBase successors
to define all macros for MIPS targets. Remove redundant virtual function
getArchDefines(). Two virtual functions for this task are really too much.

llvm-svn: 162853
2012-08-29 19:59:32 +00:00
Simon Atanasyan 683535bbdd Factor out MIPS macro definitions common for all MIPS targets.
llvm-svn: 162852
2012-08-29 19:14:58 +00:00
Simon Atanasyan 5a0642fdc1 Define _MIPS_ARCH and _MIPS_ARCH_<cpu name> macros for MIPS targets.
The patch suggested by Logan Chien.

llvm-svn: 162840
2012-08-29 15:17:29 +00:00
Eric Christopher c34d391ca2 Remove FIXME, the constraints contain more options than the
current available documentation.

llvm-svn: 162065
2012-08-16 23:50:43 +00:00
Eric Christopher 9e49188a01 Add a missing 'break' to ensure that we reject inline assembly
constraints we don't recognize.

llvm-svn: 162064
2012-08-16 23:50:41 +00:00
Dylan Noblesmith 8d48c8c675 Frontend: define _LP64 in a target-independent way
Instead of adding it to each individual subclass in
Targets.cpp, simply check the appropriate target
values.

Where before it was only on x86_64 and ppc64, it's now
also defined on mips64 and nvptx64.

Also add a bunch of negative tests to ensure it is *not*
defined on any other architectures while we're here.

llvm-svn: 161685
2012-08-10 19:12:37 +00:00
Eli Friedman 9fa2885522 clang support for Bitrig (an OpenBSD fork); patch by David Hill.
llvm-svn: 161546
2012-08-08 23:57:20 +00:00