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Author SHA1 Message Date
Guillaume Chatelet fb94354d2d [llvm-exegesis] Provide a way to handle memory instructions. 
Summary:
And implement memory instructions on X86.

This fixes PR36906.

Reviewers: gchatelet

Reviewed By: gchatelet

Subscribers: lebedev.ri, filcab, mgorny, tschuett, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D48935

llvm-svn: 338567
 2018-08-01 14:41:45 +00:00
Clement Courbet 3d5e08de96 [llvm-exegesis] Disable the tests failing on buildbots while we investigate. 
llvm-svn: 332600
 2018-05-17 11:55:08 +00:00
Clement Courbet 0e69e2d747 reland r332579: [llvm-exegesis] Update to cover latency through another opcode. 
Restructuring the code to measure latency and uops.
The end goal is to have this program spawn another process to deal with SIGILL and other malformed programs. It is not yet the case in this redesign, it is still the main program that runs the code (and may crash).
It now uses BitVector instead of Graph for performance reasons.

https://reviews.llvm.org/D46821

(with fixed ARM tests)

Authored by Guillaume Chatelet

llvm-svn: 332592
 2018-05-17 10:52:18 +00:00