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6 Commits

Author SHA1 Message Date
Vincent Lejeune 91a942b93e R600: 3 op instructions have no write bit but the result are store in PV 
llvm-svn: 183111
 2013-06-03 15:56:12 +00:00
Benjamin Kramer d78bb468bd Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 
llvm-svn: 182594
 2013-05-23 17:10:37 +00:00
Vincent Lejeune 519f21eed3 R600: Relax some vector constraints on Dot4. 
Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register
coalescer to remove some unneeded COPY.
This patch also defines some structures/functions that can be used to handle
every vector instructions (CUBE, Cayman special instructions...) in a similar
fashion.

llvm-svn: 182126
 2013-05-17 16:50:32 +00:00
Vincent Lejeune 0fca91d52e R600: Some factorization 
llvm-svn: 182123
 2013-05-17 16:50:02 +00:00
Vincent Lejeune 2a44ae0053 R600: If previous bundle is dot4, PV valid chan is always X 
llvm-svn: 180959
 2013-05-02 21:52:55 +00:00
Vincent Lejeune 147700b8b4 R600: Packetize instructions 
llvm-svn: 180760
 2013-04-30 00:14:27 +00:00