f6acb34d23
- Refactor the code that resolve basic block references to a TargetJITInfo
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method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
llvm-svn: 29276
2006-07-25 20:40:54 +00:00
f3b5b92e58
Don't pass target name into TargetData anymore, it is never used or needed.
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Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
llvm-svn: 28830
2006-06-16 18:22:52 +00:00
88812b5c0a
Make all of the TargetMachine subclasses use the new string TargetData methods.
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This is part of the on-going work on PR 761.
llvm-svn: 28414
2006-05-20 00:24:56 +00:00
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
3f9c17906f
Disable switch lowering for targets based on the selection dag isel,
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letting the code generator handle them directly.
llvm-svn: 27539
2006-04-08 19:46:55 +00:00
6f95ab7abb
Eliminate IntrinsicLowering from TargetMachine.
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Make the CBE and V9 backends create their own, since they're the only ones that use it.
llvm-svn: 26974
2006-03-23 05:43:16 +00:00
c0bf377f98
bye bye Pattern ISEL
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llvm-svn: 25553
2006-01-23 21:56:07 +00:00
045371a744
make DAG isel the default
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llvm-svn: 25282
2006-01-13 18:49:47 +00:00
6bc51c6f34
prevent latent switch creation
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llvm-svn: 24413
2005-11-18 13:57:03 +00:00
54c8fcf303
unbreak the build
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llvm-svn: 24339
2005-11-13 01:45:23 +00:00
ab72424488
enable LSR by default on alpha
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llvm-svn: 24337
2005-11-12 19:21:08 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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llvm-svn: 24233
2005-11-08 02:11:51 +00:00
5c7d731832
If the module has no t-t and the host is an alpha, default to using the Alpha BE
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llvm-svn: 24110
2005-10-30 16:44:01 +00:00
7b69867052
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
llvm-svn: 23832
2005-10-20 00:28:31 +00:00
a7a83b9255
begining alpha subtarget support
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llvm-svn: 23531
2005-09-29 22:54:56 +00:00
19058c3989
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
llvm-svn: 23192
2005-09-01 21:38:21 +00:00
3a18a39587
Alpha ABI specifies stack is always 16 byte alligned, and gcc does it, so I will too
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llvm-svn: 22634
2005-08-03 22:33:21 +00:00
c32843ed2b
finally found the gcc defined constants
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llvm-svn: 22502
2005-07-22 21:00:30 +00:00
55d045190e
Alpha JIT (beta)
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llvm-svn: 22500
2005-07-22 20:52:16 +00:00
f11f48ba61
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
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interface.
llvm-svn: 22282
2005-06-25 02:48:37 +00:00
89b8c8d215
Remove trailing whitespace
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llvm-svn: 21424
2005-04-21 23:13:11 +00:00
00348ce902
LSR cleanup patch
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llvm-svn: 20422
2005-03-03 19:03:21 +00:00
ed4b6488a7
Added LSR as a beta pass for alpha
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llvm-svn: 20407
2005-03-02 17:21:38 +00:00
8fb0d5002b
try to match alpha pattern
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llvm-svn: 19972
2005-02-01 20:35:11 +00:00
6d1a96bccc
Alpha JIT prune
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llvm-svn: 19815
2005-01-24 18:48:22 +00:00
3c12772190
include prune and JIT prune
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llvm-svn: 19814
2005-01-24 18:45:41 +00:00
a1b5ca2b9d
Let me introduce you to the early stages of the llvm backend for the alpha processor
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llvm-svn: 19764
2005-01-22 23:41:55 +00:00
Evan Cheng