fd7231f1fe
Minor code simplification.
...
llvm-svn: 91653
2009-12-18 01:20:44 +00:00
cb0efecd33
Whitespace cleanups.
...
llvm-svn: 91651
2009-12-18 01:14:11 +00:00
3152b0471b
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
...
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
llvm-svn: 91649
2009-12-18 01:03:29 +00:00
b1924e8a0f
Don't pass const pointers by reference.
...
llvm-svn: 91647
2009-12-18 00:38:08 +00:00
1af1954852
Update a comment.
...
llvm-svn: 91645
2009-12-18 00:28:43 +00:00
eabfd8b155
Pass the error string directly to llvm_unreachable instead of the residual
...
(0 && "error"). Rough consensus seems to be that g++ *should* be diagnosing
this because the pointer makes it not an ICE in c++03. Everyone agrees that
the current standard is silly and null-pointer-ness should not be based on
ICE-ness. Excellent fight scene in Act II, denouement weak, two stars.
llvm-svn: 91644
2009-12-18 00:27:18 +00:00
92c3696524
Reapply LoopStrengthReduce and IVUsers cleanups, excluding the part
...
of 91296 that caused trouble -- the Processed list needs to be
preserved for the livetime of the pass, as AddUsersIfInteresting
is called from other passes.
llvm-svn: 91641
2009-12-18 00:06:20 +00:00
04d8cb74f3
Instruction fixes, added instructions, and AsmString changes in the
...
X86 instruction tables.
Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.
This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.
* X86*.td
Removed tabs and fixed 80-line violations
* X86Instr64bit.td
(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
Added
(CALL, CMOV) Added qualifiers
(JMP) Added PC-relative jump instruction
(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
that it is 64-bit only (ambiguous since it has no
REX prefix)
(MOV) Added rr form going the other way, which is encoded
differently
(MOV) Changed immediates to offsets, which is more correct;
also fixed MOV64o64a to have to a 64-bit offset
(MOV) Fixed qualifiers
(MOV) Added debug-register and condition-register moves
(MOVZX) Added more forms
(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
(as with MOV) are encoded differently
(ROL) Made REX.W required
(BT) Uncommented mr form for disassembly only
(CVT__2__) Added several missing non-intrinsic forms
(LXADD, XCHG) Reordered operands to make more sense for
MRMSrcMem
(XCHG) Added register-to-register forms
(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
Added
* X86InstrFPStack.td
(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
FXRSTOR)
Added
(FCOM, FCOMP) Added qualifiers
(FSTENV, FSAVE, FSTSW) Fixed opcode names
(FNSTSW) Added implicit register operand
* X86InstrInfo.td
(opaque512mem) Added for FXSAVE/FXRSTOR
(offset8, offset16, offset32, offset64) Added for MOV
(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
VMWRITE, VMXOFF, VMXON) Added
(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
JGE, JLE, JG, JCXZ) Added 32-bit forms
(MOV) Changed some immediate forms to offset forms
(MOV) Added reversed reg-reg forms, which are encoded
differently
(MOV) Added debug-register and condition-register moves
(CMOV) Added qualifiers
(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
(BT) Uncommented memory-register forms for disassembler
(MOVSX, MOVZX) Added forms
(XCHG, LXADD) Made operand order make sense for MRMSrcMem
(XCHG) Added register-register forms
(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
change
* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier
llvm-svn: 91638
2009-12-18 00:01:26 +00:00
753100cef3
Sundry dependent-name fixes flagged by clang++.
...
llvm-svn: 91636
2009-12-17 23:49:16 +00:00
3c13667d14
Revert accidental commit.
...
llvm-svn: 91635
2009-12-17 23:45:18 +00:00
819c356a09
Turn off critical edge splitting for landing pads. The introduction of a
...
non-landing pad basic block as the successor to a block that ends in an
unconditional jump will cause block folding to remove the added block as a
successor. Thus eventually removing it AND the landing pad entirely. Critical
edge splitting is an optimization, so we can safely turn it off when dealing
with landing pads.
llvm-svn: 91634
2009-12-17 23:42:32 +00:00
0de0ce11d8
Revert r91623 to unbreak the buildbots.
...
llvm-svn: 91632
2009-12-17 22:44:34 +00:00
250b119d98
Allow instcombine to combine "sext(a) >u const" to "a >u trunc(const)".
...
llvm-svn: 91631
2009-12-17 22:42:29 +00:00
2b73a4e90f
Don't codegen available_externally functions. Fixes http://llvm.org/PR5735 .
...
llvm-svn: 91626
2009-12-17 21:35:29 +00:00
7cc86b4cc6
Make the ptrtoint comparison simplification work if one side is a global.
...
llvm-svn: 91624
2009-12-17 21:27:47 +00:00
e43b403c87
Remove an unused option.
...
llvm-svn: 91623
2009-12-17 21:23:58 +00:00
5842c9968a
Slightly generalize transformation of memmove(a,a,n) so that it also applies
...
to memcpy. (Such a memcpy is technically illegal, but in practice is safe
and is generated by struct self-assignment in C code.)
llvm-svn: 91621
2009-12-17 21:07:31 +00:00
5908f1e27b
Make Path use StringRef instead of std::string where possible.
...
llvm-svn: 91620
2009-12-17 21:02:39 +00:00
03b5aed7d8
Temporarily revert 91337. It's causing testcase failures.
...
$ svn merge -c -91337 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91337 into '.':
U lib/CodeGen/AsmPrinter/DwarfException.cpp
llvm-svn: 91618
2009-12-17 20:41:01 +00:00
df5561db78
Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() in
...
LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple
type by one, getHalfSizedIntegerVT() searches for the smallest simple integer
type that is at least half the size of the type it is called on. This approach
has the advantage that it will continue working if a new value type (such as
i24) is added to MVT.
Also, in preparation for new value types, remove the assertions that
non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and
truncstore operations.
llvm-svn: 91614
2009-12-17 20:09:43 +00:00
50272752fa
finish cleaning up StructLayoutMap.
...
llvm-svn: 91612
2009-12-17 20:00:21 +00:00
28f244863e
This fixes a memory leak in OpaqueType found by Google's internal heapchecker.
...
llvm-svn: 91611
2009-12-17 19:55:06 +00:00
f3927b7994
Re-revert 91459. It's breaking the x86_64 darwin bootstrap.
...
llvm-svn: 91607
2009-12-17 18:34:24 +00:00
ece104a0e1
Remove debugging code.
...
llvm-svn: 91604
2009-12-17 18:03:12 +00:00
798493285c
In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of
...
incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.
llvm-svn: 91602
2009-12-17 15:31:52 +00:00
090ac0865a
Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently introduced a non-deterministic behavior in the optimizer somewhere.
...
llvm-svn: 91598
2009-12-17 09:39:49 +00:00
e67cae33e1
Aggressively flip compare constant expressions where appropriate; constant
...
folding in particular expects null to be on the RHS.
llvm-svn: 91587
2009-12-17 06:07:04 +00:00
1c00b6964f
Fix a comment grammaro.
...
llvm-svn: 91584
2009-12-17 05:07:36 +00:00
aadf060b92
Revert this dag combine change:
...
Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
llvm-svn: 91574
2009-12-17 00:40:05 +00:00
7f30b64dce
Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.
...
llvm-svn: 91571
2009-12-16 23:36:52 +00:00
30f2ac714b
Silence a clang warning about the deprecated (but perfectly reasonable in
...
context) increment-of-bool idiom.
llvm-svn: 91564
2009-12-16 20:31:50 +00:00
b827e52638
Reapply r91392, it was only unmasking the bug, and since TOT is still broken having it reverted does no good.
...
llvm-svn: 91560
2009-12-16 20:10:05 +00:00
ab42d42390
Reapply r91459, it was only unmasking the bug, and since TOT is still broken having it reverted does no good.
...
llvm-svn: 91559
2009-12-16 20:09:53 +00:00
69461f50c1
Mark STREX* as earlyclobber for the success result register.
...
llvm-svn: 91555
2009-12-16 19:44:06 +00:00
2a282f2f86
Add @earlyclobber TableGen constraint
...
llvm-svn: 91554
2009-12-16 19:43:02 +00:00
ec20a88a57
Reuse lowered phi nodes.
...
Tail duplication produces lots of identical phi nodes in different basic
blocks. Teach PHIElimination to reuse the join registers when lowering a phi
node that is identical to an already lowered node. This saves virtual
registers, and more importantly it avoids creating copies the the coalescer
doesn't know how to eliminate.
Teach LiveIntervalAnalysis about the phi joins with multiple uses.
This patch significantly reduces code size produced by -pre-regalloc-taildup.
llvm-svn: 91549
2009-12-16 18:55:53 +00:00
133efc317e
Revert "Reapply 91184 with fixes and an addition to the testcase to cover the
...
problem", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.
This reverts commit db22309800b224a9f5f51baf76071d7a93ce59c9.
llvm-svn: 91534
2009-12-16 10:56:17 +00:00
df45b70c1e
Revert "Initial work on disabling the scheduler. This is a work in progress, and
...
this", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.
llvm-svn: 91533
2009-12-16 10:56:02 +00:00
f278addbdc
reapply my strstr optimization. I have reproduced the x86-64 bootstrap
...
miscompile (i386.o miscompares) but it happens both with and without
this patch.
llvm-svn: 91532
2009-12-16 09:32:05 +00:00
4ea86c460a
now that libsystem no longer uses SmallVector, we can move
...
SmallVectorBase::grow_pod out of line, finally satisfying PR3758.
llvm-svn: 91529
2009-12-16 08:44:24 +00:00
a6fc9de9fc
remove use of SmallVector from Path::makeUnique. Path::makeUnique
...
is not used by anything performance sensitive, so just use std::string.
llvm-svn: 91528
2009-12-16 08:40:44 +00:00
e6be85661d
eliminate an extraneous use of SmallVector in a case where
...
a fixed size buffer is perfectly fine.
llvm-svn: 91527
2009-12-16 08:35:54 +00:00
2003b90807
Use different name for argument and field
...
llvm-svn: 91524
2009-12-16 08:10:57 +00:00
dd7418ae3f
MDNodes that refer to an instruction are local to a function; in that case, explicitly keep track of the function they are local to
...
llvm-svn: 91497
2009-12-16 02:52:09 +00:00
466231ab92
Add encoding bits for some Thumb instructions. Plus explicitly set the top two
...
bytes of Inst to 0x0000 for the benefit of the Thumb decoder.
llvm-svn: 91496
2009-12-16 02:32:54 +00:00
1be6286028
Re-enable 91381 with fixes.
...
llvm-svn: 91489
2009-12-16 00:53:11 +00:00
177be32334
revert my strstr optimization, I'm told it breaks x86-64 bootstrap.
...
Will reapply with a fix when I get a chance.
llvm-svn: 91486
2009-12-16 00:46:02 +00:00
56f041406d
Do better with physical reg operands (typically, from inline asm)
...
in local register allocator. If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg. If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.
Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also). This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted. However, there should normally be
no spilling within inline asm blocks. The patch here goes a long way
towards making this actually be true.
llvm-svn: 91485
2009-12-16 00:29:41 +00:00
826ca5630e
Every anonymous namespace is different. Caught by clang++.
...
llvm-svn: 91481
2009-12-16 00:15:28 +00:00
323c30c5f4
Explicit template instantiations must happen in the template's immediately
...
enclosing namespace. Caught by clang++.
llvm-svn: 91480
2009-12-16 00:13:24 +00:00
2d5967d005
Helpful comment added. Some code cleanup. No functional change.
...
llvm-svn: 91479
2009-12-16 00:08:36 +00:00
3766491eee
Initialize uninitialized variables.
...
llvm-svn: 91477
2009-12-16 00:01:27 +00:00
776ef4dd32
Initialize uninitialized variables.
...
llvm-svn: 91475
2009-12-16 00:00:18 +00:00
e0d8e14e11
Change indirect-globals to use a dedicated allocIndirectGV. This lets us
...
remove start/finishGVStub and the BufferState helper class from the
MachineCodeEmitter interface. It has the side-effect of not setting the
indirect global writable and then executable on ARM, but that shouldn't be
necessary.
llvm-svn: 91464
2009-12-15 22:42:46 +00:00
e44756d7c2
Reapply 91184 with fixes and an addition to the testcase to cover the problem
...
found last time. Instead of trying to modify the IR while iterating over it,
I've change it to keep a list of WeakVH references to dead instructions, and
then delete those instructions later. I also added some special case code to
detect and handle the situation when both operands of a memcpy intrinsic are
referencing the same alloca.
llvm-svn: 91459
2009-12-15 22:00:51 +00:00
a3aef788ec
Fix GetConstantStringInfo to not look into MDString (it works on
...
real data, not metadata) and fix DbgInfoPrinter to not abuse
GetConstantStringInfo.
llvm-svn: 91444
2009-12-15 19:34:20 +00:00
1f4690c624
Add support to emit debug info for C++ namespaces.
...
llvm-svn: 91440
2009-12-15 19:16:48 +00:00
26ab363361
optimize strstr, PR5783
...
llvm-svn: 91438
2009-12-15 19:14:40 +00:00
c28e629c2d
Added encoding bits for the Thumb ISA. Initial checkin.
...
llvm-svn: 91434
2009-12-15 17:24:14 +00:00
265ce318b8
Delete an unused function.
...
llvm-svn: 91432
2009-12-15 16:30:09 +00:00
24aba42d04
add some other xforms that should be done as part of PR5783
...
llvm-svn: 91428
2009-12-15 09:05:13 +00:00
45d040bd85
Remove isPod() from DenseMapInfo, splitting it out to its own
...
isPodLike type trait. This is a generally useful type trait for
more than just DenseMap, and we really care about whether something
acts like a pod, not whether it really is a pod.
llvm-svn: 91421
2009-12-15 07:26:43 +00:00
b3032962ef
Fix an encoding bug.
...
llvm-svn: 91417
2009-12-15 06:49:02 +00:00
792f0913ee
For fastcc on x86, let ECX be used as a return register after EAX and EDX
...
llvm-svn: 91410
2009-12-15 03:27:52 +00:00
fcb5453dc7
Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
...
llvm-svn: 91405
2009-12-15 03:07:11 +00:00
852c486946
Make 91378 more conservative.
...
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
llvm-svn: 91399
2009-12-15 03:00:32 +00:00
4ea24f19f5
You can't use typedefs to declare template member specializations, and
...
clang enforces it.
llvm-svn: 91397
2009-12-15 02:35:24 +00:00
07beddceb7
Initial work on disabling the scheduler. This is a work in progress, and this
...
stuff isn't used just yet.
We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2'
flags. The hypothesis is that the people who use these flags know what they are
doing, and have hand-optimized the C code to reduce latencies and other
conflicts.
The idea behind our scheme to turn off scheduling is to create a map "on the
side" during DAG generation. It will order the nodes by how they appeared in the
code. This map is then used during scheduling to get the ordering.
llvm-svn: 91392
2009-12-15 01:54:51 +00:00
45430bbfaa
Tail duplication should zap a copy it inserted for SSA update if the copy is the only use of its source.
...
llvm-svn: 91390
2009-12-15 01:44:10 +00:00
0e8b9e32d1
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
...
llvm-svn: 91381
2009-12-15 00:53:42 +00:00
d1521ef40c
Fold (zext (and x, cst)) -> (and (zext x), cst).
...
llvm-svn: 91380
2009-12-15 00:52:11 +00:00
ca7c690d3b
Propagate zest through logical shift.
...
llvm-svn: 91378
2009-12-15 00:41:36 +00:00
d5218331f7
Formatting.
...
llvm-svn: 91377
2009-12-15 00:40:55 +00:00
e8a525a196
Revert these. They may have been causing 483_xalancbmk to fail:
...
$ svn merge -c -91161 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91161 into '.':
U lib/CodeGen/BranchFolding.cpp
U lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91113 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91113 into '.':
G lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91101 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91101 into '.':
U include/llvm/CodeGen/MachineBasicBlock.h
G lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91092 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91092 into '.':
G include/llvm/CodeGen/MachineBasicBlock.h
G lib/CodeGen/MachineBasicBlock.cpp
llvm-svn: 91376
2009-12-15 00:39:24 +00:00
ea8f6e31a0
nand atomic requires opposite operand ordering
...
llvm-svn: 91371
2009-12-15 00:12:35 +00:00
cecad35728
Fix integer cast code to handle vector types.
...
llvm-svn: 91362
2009-12-14 23:40:38 +00:00
6453a4e2ab
Fix this to properly clear the FastISel debug location. Thanks to
...
Bill for spotting this!
llvm-svn: 91355
2009-12-14 23:08:09 +00:00
bee6f16fed
Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate
...
between BR_JTr and STREXD.
llvm-svn: 91339
2009-12-14 21:51:34 +00:00
1bdf5d6f75
The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,
...
but we need it to actually be 4-bytes in the FDE.
llvm-svn: 91337
2009-12-14 21:49:44 +00:00
3974a80307
v6 sync insn copy/paste error
...
llvm-svn: 91333
2009-12-14 21:33:32 +00:00
3c4f04112a
Add ARMv6 memory and sync barrier instructions
...
llvm-svn: 91329
2009-12-14 21:24:16 +00:00
acba3b0ae2
Fixed encoding bits typo of ldrexd/strexd.
...
llvm-svn: 91327
2009-12-14 21:01:46 +00:00
57ccc19617
Thumb2 atomic operations
...
llvm-svn: 91321
2009-12-14 20:14:59 +00:00
1cfbfc86cf
Move several function bodies which are rarely inlined out of line.
...
llvm-svn: 91319
2009-12-14 19:43:09 +00:00
726e452ccb
fix an obvious bug found by clang++ and collapse a redundant if.
...
Here's the diagnostic from clang:
/Volumes/Data/dgregor/Projects/llvm/lib/Target/CppBackend/CPPBackend.cpp:989:23: warning: 'gv' is always NULL in this context
printConstant(gv);
^
1 diagnostic generated.
llvm-svn: 91318
2009-12-14 19:34:32 +00:00
fd5de58ec1
Micro-optimize these functions in the case where they are not inlined.
...
llvm-svn: 91316
2009-12-14 19:32:31 +00:00
fed3d088ce
correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics
...
llvm-svn: 91313
2009-12-14 19:24:11 +00:00
20ac87de13
add Thumb2 atomic and memory barrier instruction definitions
...
llvm-svn: 91310
2009-12-14 18:56:47 +00:00
3cdb555e0f
whitespace
...
llvm-svn: 91307
2009-12-14 18:36:32 +00:00
5e0d2a2df6
ARM memory barrier instructions are not predicable
...
llvm-svn: 91305
2009-12-14 18:31:20 +00:00
2a07fd94f1
Clear the Processed set when it is no longer used, and clear the
...
IVUses list in releaseMemory().
llvm-svn: 91296
2009-12-14 17:35:17 +00:00
fbeec7270c
Fix a thinko; isNotAlreadyContainedIn had a built-in negative, so the
...
condition was inverted when the code was converted to contains().
llvm-svn: 91295
2009-12-14 17:31:01 +00:00
416d5b7361
Remove unnecessary #includes.
...
llvm-svn: 91293
2009-12-14 17:19:06 +00:00
163fb26927
Instead of having a ScalarEvolution pointer member in BasedUser, just pass
...
the ScalarEvolution pointer into the functions which need it.
llvm-svn: 91289
2009-12-14 17:12:51 +00:00
8dbd4e3d16
Don't bother cleaning up if there's nothing to clean up.
...
llvm-svn: 91288
2009-12-14 17:10:44 +00:00
88c7e61c5b
Delete an unused variable.
...
llvm-svn: 91287
2009-12-14 17:08:09 +00:00
57eb6cda7a
Drop Loop::isNotAlreadyContainedIn in favor of Loop::contains. The
...
former was just exposing a LoopInfoBase implementation detail.
llvm-svn: 91286
2009-12-14 17:06:50 +00:00
9d6410d040
add ldrexd/strexd instructions
...
llvm-svn: 91284
2009-12-14 17:02:55 +00:00
838f604543
LSR itself doesn't need LoopInfo.
...
llvm-svn: 91283
2009-12-14 17:02:34 +00:00
273e692952
LSR itself doesn't need DominatorTree.
...
llvm-svn: 91282
2009-12-14 16:57:08 +00:00
c3513095cf
Remove the code in LSR that manually hoists expansions out of loops;
...
SCEVExpander does this automatically.
llvm-svn: 91281
2009-12-14 16:52:55 +00:00
ec2a7c58e8
Minor code cleanups.
...
llvm-svn: 91280
2009-12-14 16:37:29 +00:00
525dda05a0
Use DW_AT_specification to point to DIE describing function declaration.
...
llvm-svn: 91278
2009-12-14 16:18:45 +00:00
022336adf7
Add "generic" fallback.
...
gcc warned that the function may not have a return value, indeed
for non-intel and non-amd X86 CPUs it is right (VIA, etc.).
llvm-svn: 91276
2009-12-14 12:38:18 +00:00
c73ca2baca
Added CalcSpillWeights to CMakeLists.
...
llvm-svn: 91275
2009-12-14 07:43:25 +00:00
277381f69a
Whitespace changes, comment clarification. No functional changes.
...
llvm-svn: 91274
2009-12-14 06:51:19 +00:00
d17e296301
Moved spill weight calculation out of SimpleRegisterCoalescing and into its own pass: CalculateSpillWeights.
...
llvm-svn: 91273
2009-12-14 06:49:42 +00:00
aaa6ac10a6
revert r91184, because it causes a crash on a .bc file I just
...
sent to Bob.
llvm-svn: 91268
2009-12-14 05:11:02 +00:00
8f3c70e909
atomic binary operations up to 32-bits wide.
...
llvm-svn: 91260
2009-12-14 04:22:04 +00:00
8c17e6de2b
Reinstate r91208 to fix available_externally linkage for globals, with
...
nlewycky's fix to add -rdynamic so the JIT can look symbols up in Linux builds
of the JITTests binary.
llvm-svn: 91250
2009-12-13 20:30:32 +00:00
abdc1c274b
Using _MSC_VER there was wrong, better just use the already existing ifdefs for
...
x86 CPU detection for the X86 getHostCPUName too, and create a simple
getHostCPUName that returns "generic" for all else.
llvm-svn: 91240
2009-12-13 08:59:40 +00:00
dcf5dacb2c
Don't leave pointers uninitialized in the default constructor. GCC complains
...
about the potential use of these uninitialized members under certain conditions.
llvm-svn: 91239
2009-12-13 07:04:45 +00:00
94b6310136
Fix weird typo which leads to unallocated memory access for nodes with 4 results.
...
llvm-svn: 91233
2009-12-13 01:00:59 +00:00
45800ce646
Do not allow uninitialize access during debug printing
...
llvm-svn: 91232
2009-12-13 01:00:32 +00:00
96cf7f42b0
More info on this transformation.
...
llvm-svn: 91230
2009-12-12 23:23:43 +00:00
8eada9f580
Remove some stuff that's already implemented. Also, remove the note about
...
merging x >u 5 and x <s 20 because it's impossible to implement.
llvm-svn: 91228
2009-12-12 21:41:48 +00:00
26fdd7265b
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
...
llvm-svn: 91223
2009-12-12 20:03:14 +00:00
d8f320947f
Implement variable-width shifts.
...
No testcase yet - it seems we're exposing generic codegen bugs.
llvm-svn: 91221
2009-12-12 18:55:37 +00:00
3974c8de51
Add comment about potential partial register stall.
...
llvm-svn: 91220
2009-12-12 18:55:26 +00:00
6d6eaafa8c
Fix an obvious bug. No test case since LEA16r is not being used.
...
llvm-svn: 91219
2009-12-12 18:51:56 +00:00
5c9429fa47
Enable CPU detection when using MS VS 2k8 too.
...
MSVS2k8 doesn't define __i386__, hence all the CPU detection code was disabled.
Enable it by looking for _MSC_VER.
llvm-svn: 91217
2009-12-12 12:42:31 +00:00
9ad6ba3766
Revert r91208. Something on Linux prevents the JIT from looking up a symbol
...
defined in the test, and I don't have time tonight to figure it out.
llvm-svn: 91209
2009-12-12 06:18:46 +00:00
2d2dcdcbf7
Fix available_externally linkage for globals. It's probably still not
...
supported by emitGlobals, but I don't have a test case for that.
llvm-svn: 91208
2009-12-12 05:58:14 +00:00
8f9a3ac12c
Framework for atomic binary operations. The emitter for the pseudo instructions
...
just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
llvm-svn: 91200
2009-12-12 01:40:06 +00:00
895f364ae6
Revise scalar replacement to be more flexible about handle bitcasts and GEPs.
...
While scanning through the uses of an alloca, keep track of the current offset
relative to the start of the alloca, and check memory references to see if
the offset & size correspond to a component within the alloca. This has the
nice benefit of unifying much of the code from isSafeUseOfAllocation,
isSafeElementUse, and isSafeUseOfBitCastedAllocation. The code to rewrite
the uses of a promoted alloca, after it is determined to be safe, is
reorganized in the same way.
Also, when rewriting GEP instructions, mark them as "in-bounds" since all the
indices are known to be safe.
llvm-svn: 91184
2009-12-11 23:47:40 +00:00
619a78bd59
Delete an unnecessary line. The VTSDNode on a SIGN_EXTEND_REG is never
...
a vector type.
llvm-svn: 91181
2009-12-11 23:26:08 +00:00
e27e028cdd
Lower setcc branchless, if this is profitable.
...
Based on the patch by Brian Lucas!
llvm-svn: 91175
2009-12-11 23:01:29 +00:00
b87b9925be
Don't try to move a MBB into the fall-through position if it's a landing pad or
...
branches only to a landing pad. Without this check, the compiler would go into
an infinite loop because the branch to a landing pad is an "abnormal" edge which
wasn't being taken into account.
This is the meat of that fix:
if (!PrevBB.canFallThrough() && !MBB->BranchesToLandingPad(MBB)) {
The other stuff is simplification of the "branches to a landing pad" code.
llvm-svn: 91161
2009-12-11 21:47:36 +00:00
b314bd688a
Construct CompileUnits lazily.
...
llvm-svn: 91159
2009-12-11 21:37:07 +00:00
1d459e4937
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
...
llvm-svn: 91158
2009-12-11 21:31:27 +00:00
22a4ea8690
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
...
llvm-svn: 91150
2009-12-11 20:29:53 +00:00
84ba039cf2
Make getUniqueExitBlocks's precondition assert more precise, to
...
avoid spurious failures. This fixes PR5758.
llvm-svn: 91147
2009-12-11 20:05:23 +00:00
6d306bb32b
Fix the result type of SELECT nodes lowered from Select instructions with
...
aggregate return values. This fixes PR5754.
llvm-svn: 91145
2009-12-11 19:50:50 +00:00
fc51282cbe
Honour setHasCalls() set from isel.
...
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
llvm-svn: 91144
2009-12-11 19:39:55 +00:00
098bd1bbea
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
...
llvm-svn: 91143
2009-12-11 19:37:26 +00:00
afdddaed55
Update properties.
...
llvm-svn: 91140
2009-12-11 18:52:41 +00:00
9f13fc7d63
Revert part of r91101 which was causing an infinite loop in the self-hosting
...
build bots.
llvm-svn: 91113
2009-12-11 10:43:41 +00:00
5d96f3fcb6
Add utility method for determining whether a function argument
...
has the 'nest' attribute.
llvm-svn: 91109
2009-12-11 08:36:17 +00:00
766a73fb04
Add support to 3-addressify 16-bit instructions.
...
llvm-svn: 91104
2009-12-11 06:01:48 +00:00
c9a41c8b03
Coalesce insert_subreg undef, x first to avoid phase ordering issue.
...
llvm-svn: 91103
2009-12-11 06:01:00 +00:00
a1bce0c42e
Address comments on last patch:
...
- Loosen the restrictions when checking of it branches to a landing pad.
- Make the loop more efficient by checking the '.insert' return value.
- Do cheaper checks first.
llvm-svn: 91101
2009-12-11 03:14:18 +00:00
a581aacdce
A machine basic block may end in an unconditional branch, however it may have
...
more than one successor. Normally, these extra successors are dead. However,
some of them may branch to exception handling landing pads. If we remove those
successors, then the landing pads could go away if all predecessors to it are
removed. Before, it was checking if the direct successor was the landing
pad. But it could be the result of jumping through multiple basic blocks to get
to it. If we were to only check for the existence of an EH_LABEL in the basic
block and not remove successors if it's in there, then it could stop actually
dead basic blocks from being removed.
llvm-svn: 91092
2009-12-11 01:49:14 +00:00
5c4e99fca6
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
...
llvm-svn: 91090
2009-12-11 01:42:04 +00:00
2eec32d944
If VariableDIe is not created (may be because global was optimzed away) then do not try to use the variable die.
...
llvm-svn: 91077
2009-12-10 23:25:41 +00:00
4986588ddb
It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.:
...
%reg16404:1<def> = MOV8rr %reg16412:2<kill>
llvm-svn: 91061
2009-12-10 20:59:45 +00:00
2b75ed2c3d
Refactor code that finds context for a given die.
...
Create global variable DIEs after creating subprogram DIEs. This allows function level static variable's to find their context at the time of DIE creation.
llvm-svn: 91055
2009-12-10 19:14:49 +00:00
fed78ccfb5
Add instruction encoding for DMB/DSB
...
llvm-svn: 91053
2009-12-10 18:35:32 +00:00
b5b60ea4f9
Refactor.
...
llvm-svn: 91051
2009-12-10 18:05:33 +00:00
497161c40b
Also attempt trivial coalescing for live intervals that end in a copy.
...
The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.
The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.
This patch is more conservative than r90502, and does not break
483.xalancbmk/i686. It still breaks the PowerPC bootstrap, so it is disabled
by default, and can be enabled with the -trivial-coalesce-ends option.
llvm-svn: 91049
2009-12-10 17:48:32 +00:00
12b8a63e13
Comparing std::string with NULL is a bad idea, so just check whether its empty.
...
This code was crashing always with oprofile enabled, since it tried to create a StringRef
out of NULL, which run strlen on NULL.
llvm-svn: 91046
2009-12-10 10:01:47 +00:00
22889c049d
Make sure the immediate dominator isn't NULL through iterations
...
of the loop. We could get to this condition via indirect
branches.
llvm-svn: 91009
2009-12-10 00:25:41 +00:00
9ccc879006
Fix PR5744, a case where we were getting the pointer size instead of the
...
value size. This only manifested when memdep inprecisely returns clobber,
which is do to a caching issue in the PR5744 testcase. We can 'efficiently
emulate' this by using '-no-aa'
llvm-svn: 91004
2009-12-10 00:11:45 +00:00
53e8854443
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
...
llvm-svn: 91003
2009-12-10 00:11:09 +00:00
3ddf804f78
allow this to build when the #if 0's are enabled. No functionality change.
...
llvm-svn: 90999
2009-12-10 00:04:46 +00:00
72c367fb52
Dereference loopHeader after checking for null rather than before.
...
llvm-svn: 90990
2009-12-09 22:55:01 +00:00
493b882f80
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
...
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
llvm-svn: 90984
2009-12-09 21:00:30 +00:00
220b196c94
Reuse the Threshold value to size these containers because it's
...
currently somewhat convenient for them to have the same value.
llvm-svn: 90980
2009-12-09 18:48:53 +00:00
9ccfb641d1
Reapply r90858, a cleanup patch.
...
llvm-svn: 90979
2009-12-09 18:24:21 +00:00
ca5f9cb18b
fix hte last remaining known (by me) phi translation bug. When we reanalyze
...
clobbers to forward pieces of large stores to small loads, we need to consider
the properly phi translated pointer in the store block.
llvm-svn: 90978
2009-12-09 18:21:46 +00:00
f8ba1253f1
change GetStoreValueForLoad to use IRBuilder, which is cleaner and
...
implicitly constant folds.
llvm-svn: 90977
2009-12-09 18:13:28 +00:00
1c5a6fb299
Fix a comment.
...
llvm-svn: 90975
2009-12-09 18:05:27 +00:00
9f9010ef47
Add a minor optimization: if we haven't changed the operands of an
...
add, there is no need to scan the world to find the same add again.
This invalidates the previous testcase, which wasn't wonderful anyway,
because it needed a run of instcombine to permute the use-lists in
just the right way to before GVN was run (so it was really fragile).
Not a big loss.
llvm-svn: 90973
2009-12-09 17:27:45 +00:00
fa2e536831
fix PR5733, a case where we'd replace an add with a lexically identical
...
binary operator that wasn't an add. In this case, a xor. Whoops.
llvm-svn: 90971
2009-12-09 17:18:49 +00:00
a45fe67667
<rdar://problem/7453528>. Track only physical registers that are valid for the target.
...
llvm-svn: 90970
2009-12-09 17:18:22 +00:00
07df9efb35
change AnalyzeLoadFromClobberingMemInst/AnalyzeLoadFromClobberingStore
...
to require the load ty/ptr to be passed in, no functionality change.
llvm-svn: 90960
2009-12-09 07:37:07 +00:00
0def861ee9
change AnalyzeLoadFromClobberingWrite and clients to pass in type
...
and pointer instead of the load. No functionality change.
llvm-svn: 90959
2009-12-09 07:34:10 +00:00
eea0f58393
enhance NonLocalDepEntry to keep the per-block phi translated address
...
of the query.
llvm-svn: 90958
2009-12-09 07:31:04 +00:00
d333139411
DeltaAlgorithm: Add a virtual destructor and home.
...
llvm-svn: 90957
2009-12-09 07:19:48 +00:00
0c31547168
change NonLocalDepEntry from being a typedef for an std::pair to be its
...
own small class. No functionality change.
llvm-svn: 90956
2009-12-09 07:08:01 +00:00
1ab2b49e6d
Added a new "splitting" spiller.
...
When a call is placed to spill an interval this spiller will first try to
break the interval up into its component values. Single value intervals and
intervals which have already been split (or are the result of previous splits)
are spilled by the default spiller.
Splitting intervals as described above may improve the performance of generated
code in some circumstances. This work is experimental however, and it still
miscompiles many benchmarks. It's not recommended for general use yet.
llvm-svn: 90951
2009-12-09 05:39:12 +00:00
5ea6200d06
Remove spurious extern.
...
llvm-svn: 90937
2009-12-09 03:26:33 +00:00
946b58dd90
add some aborts to #if 0's.
...
llvm-svn: 90929
2009-12-09 02:41:54 +00:00
972e6d8d00
Switch GVN and memdep to use PHITransAddr, which correctly handles
...
phi translation of complex expressions like &A[i+1]. This has the
following benefits:
1. The phi translation logic is all contained in its own class with
a strong interface and verification that it is self consistent.
2. The logic is more correct than before. Previously, if intermediate
expressions got PHI translated, we'd miss the update and scan for
the wrong pointers in predecessor blocks. @phi_trans2 is a testcase
for this.
3. We have a lot less code in memdep.
We can handle phi translation across blocks of things like @phi_trans3,
which is pretty insane :).
This patch should fix the miscompiles of 255.vortex, and I tested it
with a bootstrap of llvm-gcc, llvm-test and dejagnu of course.
llvm-svn: 90926
2009-12-09 01:59:31 +00:00
d938faff4b
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
...
llvm-svn: 90925
2009-12-09 01:53:58 +00:00
f5938d5d27
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
...
llvm-svn: 90922
2009-12-09 01:36:00 +00:00
9af9d0f74e
fix a nasty variable that was shadowing the real CurBB but with the wrong value.
...
llvm-svn: 90920
2009-12-09 01:19:16 +00:00
2d412f0cb8
Infer alignment for non-fixed stack object.
...
llvm-svn: 90919
2009-12-09 01:17:24 +00:00
1750009f38
Add const qualifier.
...
llvm-svn: 90918
2009-12-09 01:10:37 +00:00
34a23ea371
Refactor InferAlignment out of DAGCombine.
...
llvm-svn: 90917
2009-12-09 01:04:59 +00:00
11da6b0050
fix many input tracking bugs.
...
llvm-svn: 90915
2009-12-09 00:56:14 +00:00
56a5f19c70
Fix a typo in a comment, and adjust SmallSet and SmallVector sizes,
...
that Chris noticed.
llvm-svn: 90910
2009-12-09 00:28:42 +00:00
37251f8375
fix PHI translation to take the PHI out of the instinputs set and add
...
the translated value back to it if an instruction.
llvm-svn: 90909
2009-12-09 00:18:13 +00:00
cfd76375e3
instructions defined in CurBB may be intermediate nodes of the computation.
...
llvm-svn: 90908
2009-12-09 00:10:55 +00:00
0aa75680d6
add dumping and sanity checking support.
...
llvm-svn: 90906
2009-12-09 00:01:00 +00:00
2d27b191d9
Put a threshold on the number of users PointerMayBeCaptured
...
examines; fall back to a conservative answer if there are
more. This works around some several compile time problems
resulting from BasicAliasAnalysis calling PointerMayBeCaptured.
The value has been chosen arbitrarily.
This fixes rdar://7438917 and may partially address PR5708.
llvm-svn: 90905
2009-12-08 23:59:12 +00:00
5cf4b74b45
make sure that PHITransAddr keeps its 'InstInputs' list up to
...
date when instsimplify kicks in.
llvm-svn: 90901
2009-12-08 23:42:51 +00:00
512001ac7d
Revert 90858 90875 and 90805 for now.
...
llvm-svn: 90898
2009-12-08 23:21:45 +00:00
0c2544fd6b
- Support inline asm 'w' constraint for 128-bit vector types.
...
- Also support the 'q' NEON registers asm code.
llvm-svn: 90894
2009-12-08 23:06:22 +00:00
c5d082fd5d
Some superficial cleanups.
...
llvm-svn: 90866
2009-12-08 18:27:03 +00:00
2029ea04f9
Clean up dead operands left around after SROA replaces a mem intrinsic.
...
I'm not aware that this does anything significant on its own, but it's
needed for another patch that I'm working on.
llvm-svn: 90864
2009-12-08 18:22:03 +00:00
24c0bb1ca1
Cleanup.
...
There is no need to supply ModuleCU to addType() as a parameter.
llvm-svn: 90858
2009-12-08 15:31:31 +00:00
7d723ec70d
Do not try to push dead variable's debug info into namespace info.
...
llvm-svn: 90857
2009-12-08 15:01:35 +00:00
dfcc285902
Remove useless calls to c_str().
...
llvm-svn: 90855
2009-12-08 13:07:38 +00:00
6a3df7b0c7
Teach GlobalOpt to delete aliases with internal linkage (after
...
forwarding any uses). GlobalDCE can also do this, but is only
run at -O3.
llvm-svn: 90850
2009-12-08 10:10:20 +00:00
6425a23c8c
fix a typo (and -> add) and fix GetAvailablePHITranslatedSubExpr to not
...
side-effect the current object.
llvm-svn: 90837
2009-12-08 06:06:26 +00:00
8bca014d7f
Remove unnecessary #include "llvm/LLVMContext.h".
...
llvm-svn: 90836
2009-12-08 05:45:41 +00:00
ff09559a8f
whitespace cleanup
...
llvm-svn: 90834
2009-12-08 05:31:46 +00:00
dd2b2f8cba
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
...
llvm-svn: 90819
2009-12-08 01:03:04 +00:00
fb1654d467
Watch out for duplicated PHI instructions.
...
llvm-svn: 90816
2009-12-07 23:11:03 +00:00
5c668a2259
Follow up to 90488. Turn a check into an assertion.
...
llvm-svn: 90815
2009-12-07 23:10:34 +00:00
Dan Gohman