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5 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa 40f1e7e804 [VE] Support f128 
Support f128 using VE instructions.  Update regression tests.
I've noticed there is no load or store i128 test, so I add them too.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D86035
 2020-08-17 17:26:52 +09:00
Kazushi (Jam) Marukawa 1952055892 [VE] Support symbol with offset value 
Summary: Support symbol with offset value as a VEMCExpr.

Reviewers: simoll, k-ishizaka

Reviewed By: simoll

Subscribers: hiraditya, llvm-commits

Tags: #llvm, #ve

Differential Revision: https://reviews.llvm.org/D82734
 2020-07-01 23:55:27 +09:00
Kazushi (Jam) Marukawa 3ed12232b0 [VE] half fptrunc+store&load+fpext 
Summary:
fp16 (half) load+fpext and fptrunc+store isel legalization and tests.
Also, ExternalSymbolSDNode operand printing (tested by fp16 lowering).

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73899
 2020-02-04 17:16:09 +01:00
Kazushi (Jam) Marukawa 0fca35c652 [VE] global variable isel patterns 
Summary: Asm expr fixups, isel patterns and tests for global variables addresses.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73355
 2020-01-24 17:35:14 +01:00
Kazushi (Jam) Marukawa 064859bde7 [VE] Minimal codegen for empty functions 
Summary:
This patch implements minimal VE code generation for empty function bodies (no args, no value return).

Contents

* empty function code generation test.
* Minimal function prologue & epilogue emission
* Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue.
* I64 register class definitions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D72598
 2020-01-15 09:55:16 +01:00