llvm-project

Commit Graph

Author	SHA1	Message	Date
Kazushi (Jam) Marukawa	e981a46a77	[VE] Update lea/load/store instructions Summary: Modify lea/load/store instructions to accept `disp(index, base)` style addressing mode (called ASX format). Also, uniform the number of DAG nodes to have 3 operands for this ASX format instructions, and update selectADDR functions to lower appropriate MI. Reviewers: arsenm, simoll, k-ishizaka Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D76822	2020-04-06 11:49:46 +02:00
Kazushi (Jam) Marukawa	5526786a56	[VE] TLS codegen Summary: Codegen and tests for thread-local storage. This implements only the general dynamic model due to limitations in nld 2.26. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D74718	2020-02-18 16:09:12 +01:00

Author

SHA1

Message

Date

Kazushi (Jam) Marukawa

e981a46a77

[VE] Update lea/load/store instructions

Summary:
Modify lea/load/store instructions to accept `disp(index, base)`
style addressing mode (called ASX format).  Also, uniform the
number of DAG nodes to have 3 operands for this ASX format
instructions, and update selectADDR functions to lower
appropriate MI.

Reviewers: arsenm, simoll, k-ishizaka

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D76822

2020-04-06 11:49:46 +02:00

Kazushi (Jam) Marukawa

5526786a56

[VE] TLS codegen

Summary:
Codegen and tests for thread-local storage.
This implements only the general dynamic model due to limitations in nld 2.26.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74718

2020-02-18 16:09:12 +01:00

2 Commits