Commit Graph

377110 Commits

Author SHA1 Message Date
Muhammad Omair Javaid b9993fcbf5 DynamicRegisterInfo calculate offsets in separate function
This patch pull offset calculation logic out of DynamicRegisterInfo::Finalize
into a separate function. We are going to call this function whenever we
update SVE register sizes.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D94008
2021-01-15 16:21:18 +05:00
Muhammad Omair Javaid 4fd77668b2 [LLDB] Add per-thread register infos shared pointer in gdb-remote
In gdb-remote process we have register infos defind as a refernce object of
GDBRemoteDynamicRegisterInfo class. In past register infos have remained
constant througout the life time of a process.

This has changed after AArch64 SVE support where register infos will have
per-thread configuration. SVE registers will have per-thread size and can
be updated while running. This patch aims to build up for that support by
changing GDBRemoteDynamicRegisterInfo reference to a shared pointer deinfed
per-thread.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82857
2021-01-15 16:11:17 +05:00
Ilya Golovenko 9cc221b99b [clangd] exclude symbols from document outline which do not originate from the main file
Differential Revision: https://reviews.llvm.org/D94753
2021-01-15 13:23:12 +03:00
Georgii Rymar 45ef053bd7 [llvm-readobj][test] - Remove excessive YAML fields from tests.
This removes excessive YAML keys from `SHT_GNU_verdef` sections.
Those keys are set by default.

Differential revision: https://reviews.llvm.org/D94660
2021-01-15 12:46:39 +03:00
Georgii Rymar d9afe8588e [yaml2obj/obj2yaml] - Refine handling of SHT_GNU_verdef sections.
This patch:
1) Makes `Version`, `Flags`, `VersionNdx` and `Hash` fields to be `Optional<>`.
2) Disallows dumping version definitions that have `vd_version != 1`.
   `vd_version` identifies the version of the structure itself.
   (https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/symversion.html,
    https://docs.oracle.com/cd/E19683-01/816-7777/chapter6-80869/index.html)
3) Stops dumping default values for `Version`, `Flags`, `VersionNdx` and `Hash` fields.
4) Refines testing.

Differential revision: https://reviews.llvm.org/D94659
2021-01-15 12:40:42 +03:00
Oliver Stannard 3676ef1053 [ARM][GISel] Treat calls as variadic even if only fixed arguments provided
For the ARM hard-float calling convention, calls to variadic functions
need to be treated diffrently, even if only the fixed arguments are
provided.

This fixes GCC-C-execute-pr68390 in the test-suite, which is failing on
the ARM GlobaISel bot.
2021-01-15 09:37:01 +00:00
Georgii Rymar 021ea78a97 [llvm-nm] - Simplify the code in dumpSymbolNamesFromObject. NFC.
It is possible to simplify the logic that extracts symbol names.

D94667 made the `NMSymbol::Name` to be `std::string`,
what allowed this simplification.

Differential revision: https://reviews.llvm.org/D94669
2021-01-15 12:29:49 +03:00
Guillaume Chatelet a10300a2b2 [libc] Allow customization of memcpy via flags.
- Adds LLVM_LIBC_IS_DEFINED macro to libc/src/__support/common.h
 - Adds a few knobs to memcpy to help with experimentations:
   - LLVM_LIBC_MEMCPY_X86_USE_ONLY_REPMOVSB replaces the implementation with a single call to rep;movsb
   - LLVM_LIBC_MEMCPY_X86_USE_REPMOVSB_FROM_SIZE customizes where the usage of rep;movsb

Differential Revision: https://reviews.llvm.org/D94692
2021-01-15 09:26:45 +00:00
Georgii Rymar bfb8f45ef3 [llvm-nm] - Move MachO specific logic out from the dumpSymbolNamesFromObject(). NFC.
`dumpSymbolNamesFromObject` is the method that dumps symbol names.

It has 563 lines, mostly because of huge piece of MachO specific code.
In this patch I move it to separate helper method.

The new size of `dumpSymbolNamesFromObject` is 93 lines. With it it becomes
much easier to maintain it.

I had to change the type of 2 name fields to `std::string`, because MachO logic
uses temporarily buffer strings (e.g `ExportsNameBuffer`, `BindsNameBuffer` etc):

```
  std::string ExportsNameBuffer;
  raw_string_ostream EOS(ExportsNameBuffer);
```

these buffers were moved to `dumpSymbolsFromDLInfoMachO` by this patch and
invalidated after return. Technically, before this patch we had a situation
when local pointers (symbol names) were assigned to members of global static `SymbolList`,
what is dirty by itself.

Differential revision: https://reviews.llvm.org/D94667
2021-01-15 12:18:37 +03:00
Alok Kumar Sharma 104a9f99cc [Debuginfo][DW_OP_implicit_pointer] (1/7) Support for DW_OP_LLVM_implicit_pointer
New dwarf operator DW_OP_LLVM_implicit_pointer is introduced (present only in LLVM IR)
This operator is required as it is different than DWARF operator
DW_OP_implicit_pointer in representation and specification (number
and types of operands) and later can not be used as multiple level.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D84113
2021-01-15 14:45:04 +05:30
Igor Kudrin 7803636057 [libcxx testing] Fix UB in tests for std::lock_guard
If mutex::try_lock() is called in a thread that already owns the mutex,
the behavior is undefined. The patch fixes the issue by creating another
thread, where the call is allowed.

Differential Revision: https://reviews.llvm.org/D94656
2021-01-15 16:11:45 +07:00
Amara Emerson 89e84dec18 [AArch64][GlobalISel] Fix fallbacks introduced for G_SITOFP in 8f283cafdd
If we have an integer->fp convert that has differing sizes, e.g. s32 to s64,
then don't try to convert it to AArch64::G_SITOF since it won't select.
2021-01-15 01:10:49 -08:00
Georgii Rymar 1185d3f43d [llvm-readobj] - Fix the compilation with GCC < 7.0.
This addressed post commit comments for D93900.

GCC had an issue and requires placing a specialization of
`printUnwindInfo` to a namespace to compile:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56480
2021-01-15 11:58:04 +03:00
Qiu Chaofan 168be42083 [Clang] Mutate long-double math builtins into f128 under IEEE-quad
Under -mabi=ieeelongdouble on PowerPC, IEEE-quad floating point semantic
is used for long double. This patch mutates call to related builtins
into f128 version on PowerPC. And in theory, this should be applied to
other targets when their backend supports IEEE 128-bit style libcalls.

GCC already has these mutations except nansl, which is not available on
PowerPC along with other variants (nans, nansf).

Reviewed By: RKSimon, nemanjai

Differential Revision: https://reviews.llvm.org/D92080
2021-01-15 16:56:20 +08:00
Nikita Popov 33be50daa9 Revert "Reapply "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert""
This reverts commit 260a856c2a.
This reverts commit 3043e5a5c3.
This reverts commit 49142991a6.

This change had a larger than anticipated compile-time impact,
possibly because the small value optimization is not working as
intended. See D93779.
2021-01-15 09:28:42 +01:00
Andy Wingo 38dfce706f [WebAssembly] Add support for table linking to wasm-ld
This patch adds support to wasm-ld for linking multiple table references
together, in a manner similar to wasm globals. The indirect function
table is synthesized as needed.

To manage the transitional period in which the compiler doesn't yet
produce TABLE_NUMBER relocations and doesn't residualize table symbols,
the linker will detect object files which have table imports or
definitions, but no table symbols. In that case it will synthesize
symbols for the defined and imported tables.

As a change, relocatable objects are now written with table symbols,
which can cause symbol renumbering in some of the tests. If no object
file requires an indirect function table, none will be written to the
file. Note that for legacy ObjFile inputs, this test is conservative: as
we don't have relocs for each use of the indirecy function table, we
just assume that any incoming indirect function table should be
propagated to the output.

Differential Revision: https://reviews.llvm.org/D91870
2021-01-15 09:21:52 +01:00
KAWASHIMA Takahiro b54337070b [AArch64] Add Fujitsu A64FX scheduling model
Basic support of A64FX was added in D75594 but its scheduling model
was missing. This commit adds the scheduling model. Also, this commit
amends/adds some subtarget parameters of A64FX.

The A64FX Microarchitecture Manual, which is source information of
this commit, is on GitHub.

https://github.com/fujitsu/A64FX/

Differential Revision: https://reviews.llvm.org/D93791
2021-01-15 17:14:04 +09:00
Jan Svoboda b6575bfd0e [clang][cli] Specify KeyPath prefixes via TableGen classes
It turns out we need to handle `LangOptions` separately from the rest of the options. `LangOptions` used to be conditionally parsed only when `!(DashX.getFormat() == InputKind::Precompiled || DashX.getLanguage() == Language::LLVM_IR)` and we need to restore this order (for more info, see D94682).

We could do this similarly to how `DiagnosticOptions` are handled: via a counterpart to the `IsDiag` mix-in (e.g. `IsLang`). These mix-ins would prefix the option key path with the appropriate `CompilerInvocation::XxxOpts` member. However, this solution would be problematic, as we'd now have two kinds of options (`Lang` and `Diag`) with seemingly incomplete key paths in the same file. To understand what `CompilerInvocation` member an option affects, one would need to read the whole option definition and notice the `IsDiag` or `IsLang` class.

Instead, this patch introduces more robust way to handle different kinds of options separately: via the `KeyPathAndMacroPrefix` class. We have one specialization of that class per `CompilerInvocation` member (e.g. `LangOpts`, `DiagnosticOpts`, etc.). Now, instead of specifying a key path with `"LangOpts->UndefPrefixes"`, we use `LangOpts<"UndefPrefixes">`. This keeps the readability intact (you don't have to look for the `IsLang` mix-in, the key path is complete on its own) and allows us to specify a custom macro prefix within `LangOpts`.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D94676
2021-01-15 08:42:59 +01:00
Jan Svoboda 1a49944b59 [clang][cli] NFC: Decrease the scope of ParseCodeGenArgs parameters
Instead of passing the whole `TargetOptions` and `FrontendOptions` to `ParseCodeGenArgs` give it only the necessary members.
This makes tracking the dependencies between various parsers and option groups easier.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D94675
2021-01-15 08:42:30 +01:00
Jan Svoboda c495dfe026 [clang][cli] NFC: Decrease the scope of ParseLangArgs parameters
Instead of passing the whole `TargetOptions` and `PreprocessorOptions` to `ParseLangArgs` give it only the necessary members.
This makes tracking the dependencies between various parsers and option groups easier.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D94674
2021-01-15 08:41:50 +01:00
Aart Bik 5508516b06 [mlir][sparse] retry sparse-only for cyclic iteration graphs
This is a very minor improvement during iteration graph construction.
If the first attempt considering the dimension order of all tensors fails,
a second attempt is made using the constraints of sparse tensors only.
Dense tensors prefer dimension order (locality) but provide random access
if needed, enabling the compilation of more sparse kernels.

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D94709
2021-01-14 22:39:29 -08:00
Yashaswini 39665d9aab Add Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop restrictions on single directive and firstprivate clause.
Semantic checks added to check the worksharing 'single' region closely nested inside a worksharing 'do' region. And also to check whether the 'do' iteration variable is a variable in 'Firstprivate' clause.

Files:
check-directive-structure.h
check-omp-structure.h
check-omp-structure.cpp

Testcases:
omp-do01-positivecase.f90
omp-do01.f90
omp-do05-positivecase.f90
omp-do05.f90

Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement @clementval

Differential Revision: https://reviews.llvm.org/D93205
2021-01-15 11:16:25 +05:30
Kazu Hirata 7dc3575ef2 [llvm] Remove redundant return and continue statements (NFC)
Identified with readability-redundant-control-flow.
2021-01-14 20:30:34 -08:00
Kazu Hirata 2efcbe24a7 [llvm] Use llvm::drop_begin (NFC) 2021-01-14 20:30:33 -08:00
Kazu Hirata 9bcc0d1040 [CodeGen, Transforms] Use llvm::sort (NFC) 2021-01-14 20:30:31 -08:00
Cheng Wang 2423ec5837 [libc] Add memmove implementation.
Use `memcpy` rather than copying bytes one by one, for there might be large
size structs to move.

Reviewed By: gchatelet, sivachandra

Differential Revision: https://reviews.llvm.org/D93195
2021-01-15 12:08:25 +08:00
Amara Emerson 8f283cafdd [AArch64][GlobalISel] Add selection support for fpr bank source variants of G_SITOFP and G_UITOFP.
In order to import patterns for these, we need to define new ops that can map to
the AArch64ISD::[SU]ITOF nodes. We then transform fpr->fpr variants of the generic
opcodes to these custom opcodes in preisel-lowering. We have to do it here and
not the PostLegalizer combiner because this has to run after regbankselect.

Differential Revision: https://reviews.llvm.org/D94702
2021-01-14 19:31:19 -08:00
Yitzhak Mandelbaum 1fabe6e519 [libTooling] Change `addInclude` to use expansion locs.
This patch changes the default range used to anchor the include insertion to use
an expansion loc.  This ensures that the location is valid, when the user relies
on the default range.

Driveby: extend a FIXME for a problem that was emphasized by this change; fix some spellings.

Differential Revision: https://reviews.llvm.org/D93703
2021-01-15 03:08:56 +00:00
Jon Chesterfield 214387c2c6 [libomptarget][nvptx] Reduce calls to cuda header
[libomptarget][nvptx] Reduce calls to cuda header

Remove use of clock_t in favour of a builtin. Drop a preprocessor branch.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94731
2021-01-15 02:16:33 +00:00
Jian Cai 9dfeec8530 Reland "[AsmParser] make .ascii support spaces as separators"
This relands commit e0963ae274, which was
reverted on commit 82c4153e66 due to a
test failure, which turned out to be a false positive.
2021-01-14 17:51:47 -08:00
Amara Emerson 036bc798f2 [AArch64][GlobalISel] Assign FPR banks to loads which are used by integer->float conversions.
G_[US]ITOFP users of loads on AArch64 can operate on both gpr and fpr banks for scalars.
Because of this, if their source is a load, then that load can be assigned to an fpr
bank and therefore avoid having to do a cross bank copy via a gpr->fpr conversion.

Differential Revision: https://reviews.llvm.org/D94701
2021-01-14 16:33:34 -08:00
Tim Keith d6acf3c201 [flang] Fix use-associated procedure in generic
When a use-associated procedure was included in a generic, we weren't
correctly recording that fact. The ultimate symbol was added rather than
the local symbol.

Also, improve the message emitted for the specific procedure by
mentioning the module it came from.

This fixes one of the problems in https://bugs.llvm.org/show_bug.cgi?id=48648.

Differential Revision: https://reviews.llvm.org/D94696
2021-01-14 16:31:52 -08:00
Jon Chesterfield 6e7094c14b [libomptarget][nvptx][nfc] Move target_impl functions out of header
[libomptarget][nvptx][nfc] Move target_impl functions out of header

This removes most of the differences between the two target_impl.h.

Also change name mangling from C to C++ for __kmpc_impl_*_lock.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D94728
2021-01-15 00:19:48 +00:00
MaheshRavishankar 42444d0cf0 [mlir][Linalg] NFC: Verify tiling on linalg.generic operation on tensors.
With the recent changes to linalg on tensor semantics, the tiling
operations works out-of-the-box for generic operations. Add a test to
verify that and some minor refactoring.

Differential Revision: https://reviews.llvm.org/D93077
2021-01-14 16:17:08 -08:00
MaheshRavishankar 774c9c6ef3 [mlir][Linalg] Add canonicalization of linalg op -> dim op.
Add canonicalization to replace use of the result of a linalg
operation on tensors in a dim operation, to use one of the operands of
the linalg operations instead. This allows the linalg op itself to be
deleted when all its non-dim uses are removed (say through tiling, etc.)

Differential Revision: https://reviews.llvm.org/D93076
2021-01-14 16:17:08 -08:00
Shilei Tian 547b032ccc [OpenMP] Remove omptarget-nvptx from deps as it is no longer a valid target
`omptarget-nvptx` is still a dependence for `check-libomptarget-nvtpx`
although it has been removed by D94573.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D94725
2021-01-14 19:16:11 -05:00
Sanjay Patel b21905dfe3 [SLP] remove unnecessary state in matching reductions
This is NFC-intended. I'm still trying to figure out
how the loop where this is used works. It does not
seem like we require this data at all, but it's
hard to confirm given the complicated predicates.
2021-01-14 18:32:37 -05:00
MaheshRavishankar 722ae10907 [mlir][Linalg] Add canonicalization to remove no-op linalg operations.
linalg.generic/indexed_generic operations on tensors whose body is
just yielding the (non-induction variable) arguments of the operation
can be canonicalized by replacing uses of the result with the
corresponding arguments.

Differential Revision: https://reviews.llvm.org/D94581
2021-01-14 14:59:24 -08:00
Sam McCall 4183999e0f [clangd] Reduce logspam for CDB scanning 2021-01-14 23:55:02 +01:00
Andrew Young a55a0a3056
[mlir] Remove over specified memory effects
The standard and gpu dialect both have `alloc` operations which use the
memory effect `MemAlloc`.  In both cases, it is specified on both  the
operation itself and on the result.  This results in two memory effects
being created for these operations.  When `MemAlloc` is defined on an
operation, it represents some background effect which the compiler
cannot reason about, and  inhibits the ability of the compiler to
remove dead `std.alloc` operations.  This change removes the uneeded
`MemAlloc` effect from these operations and leaves the effect on the
result, which allows dead allocs to be erased.

There is the same problem, but to a lesser extent, with MemFree, MemRead
and MemWrite. Over-specifying these traits is not currently inhibiting
any optimization.

Differential Revision: https://reviews.llvm.org/D94662
2021-01-14 14:49:41 -08:00
Sam Elliott 8a53a7375a [RISCV][NFC] Regenerate Calling Convention Tests
This regenerates these tests using utils/update_llc_test_checks.py so
that future changes in this area don't have the noise of lots of `@plt`
lines being added.

I also removed the `nounwind`s from the stack-realignment.ll test to
increase coverage on the generated call frame information.
2021-01-14 22:35:17 +00:00
Teresa Johnson 5b42fd8dd4 [LTO] Test format fix (NFC)
As requested in D91583, use ';;' instead of ';' to preceed comments in
lld test. I did this in the equivalent gold test as well.
2021-01-14 14:09:50 -08:00
Alexandre Ganea 4fcb25583c Re-land [Support] On Windows, take the affinity mask into account
The number of hardware threads available to a ThreadPool can be limited if setting an affinity mask.
For example:

    > start /B /AFFINITY 0xF lld-link.exe ...

Would let LLD only use 4 hyper-threads.

Previously, there was an outstanding issue on Windows Server 2019 on dual-CPU machines, which was preventing from using both CPU sockets. In normal conditions, when no affinity mask was set, ProcessorGroup::AllThreads was different from ProcessorGroup::UsableThreads. The previous code in llvm/lib/Support/Windows/Threading.inc L201 was improperly assuming those two values to be equal, and consequently was limiting the execution to only one CPU socket.

Differential Revision: https://reviews.llvm.org/D92419
2021-01-14 17:03:22 -05:00
Craig Topper b894a9fb23 [RISCV] Optimize select_cc after fp compare expansion
Some FP compares expand to a sequence ending with (xor X, 1) to invert the result. If
the consumer is a select_cc we can likely get rid of this xor by fixing
up the select_cc condition.

This patch combines (select_cc (xor X, 1), 0, setne, trueV, falseV) -
(select_cc X, 0, seteq, trueV, falseV) if we can prove X is 0/1.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D94546
2021-01-14 13:41:40 -08:00
Douglas Yung f85b153166 Add -fexceptions to test as it uses them and fails on platforms where it is not on by default (like the PS4). 2021-01-14 13:27:06 -08:00
Roland McGrath e7228062b2 [libc] Use #undef isascii in specific header
Standard C allows all standard headers to declare macros for all
their functions.  So after possibly including any standard header
like <ctype.h>, it's perfectly normal for any and all of the
functions it declares to be defined as macros.  Standard C requires
explicit `#undef` before using that identifier in a way that is not
compatible with function-like macro definitions.

The C standard's rules for this are extended to POSIX as well for
the interfaces it defines, and it's the expected norm for
nonstandard extensions declared by standard C library headers too.

So far the only place this has come up for llvm-libc's code is with
the isascii function in Fuchsia's libc.  But other cases can arise
for any standard (or common extension) function names that source
code in llvm-libc is using in nonstandard ways, i.e. as C++
identifiers.

The only correct and robust way to handle the possible inclusion of
standard C library headers when building llvm-libc source code is to
use `#undef` explicitly for each identifier before using it.  The
easy and obvious place to do that is in the per-function header.
This requires that all code, such as test code, that might include
any standard C library headers, e.g. via utils/UnitTest/Test.h, make
sure to include those *first* before the per-function header.

This change does that for isascii and its test.  But it should be
done uniformly for all the code and documented as a consistent
convention so new implementation files are sure to get this right.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94642
2021-01-14 13:25:05 -08:00
Nico Weber 0975604cc0 [gn build] (manually) port 387d3c2479 2021-01-14 16:19:25 -05:00
Jinsong Ji 0f588ac03e [PowerPC] Only use some extend mne if assembler is modern enough
Legacy AIX assembly might not support all extended mnes,
add one feature bit to control the generation in MC,
and avoid generating them by default on AIX.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D94458
2021-01-14 20:36:10 +00:00
Sean Silva e2d7d3cb0e [mlir][docs] Bring bufferization docs up to date.
This spilts out BufferDeallocationInternals.md, since buffer
deallocation is not part of bufferization per se.

Differential Revision: https://reviews.llvm.org/D94351
2021-01-14 12:28:35 -08:00
Adam Czachorowski a71877edfb [clang] Do not crash when CXXRecordDecl has a non-CXXRecordDecl base.
This can happen on some invalid code, like the included test case.

Differential Revision: https://reviews.llvm.org/D94704
2021-01-14 21:20:06 +01:00