Jakob Stoklund Olesen
b50cf8b30f
Mark X86::RET and RETI instructions as variadic.
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There is special magic happening when returning floating point values on
the x87 stack. The RET instructions get extra f80 operands.
llvm-svn: 162592
2012-08-24 20:52:44 +00:00
Jakob Stoklund Olesen
8ff666fcb6
Remove more mayLoad workarounds.
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llvm-svn: 162556
2012-08-24 14:43:22 +00:00
Craig Topper
663d160adb
Custom lower FMA intrinsics to target specific nodes and remove the patterns.
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llvm-svn: 162534
2012-08-24 04:03:22 +00:00
Jakob Stoklund Olesen
d3511235d1
Remove some spurious mayLoad = 0 flags.
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They were inserted to silence TableGen's warning about
redundant properties. That warning is now gone.
llvm-svn: 162517
2012-08-24 00:31:20 +00:00
Jakob Stoklund Olesen
df1faa0503
X86MemBarrier has unmodeled side effects.
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llvm-svn: 162514
2012-08-24 00:31:10 +00:00
Jakob Stoklund Olesen
7030427623
Preserve operand flags in convertToThreeAddress() by copying operands.
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No test case, this is a generalization of r160260.
llvm-svn: 162485
2012-08-23 22:36:31 +00:00
Craig Topper
4a4634d6de
Favor FMA3 over FMA4 if both are enabled.
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llvm-svn: 162454
2012-08-23 18:14:30 +00:00
Craig Topper
f911597494
Use a switch statement instead of a bunch of if-else checks and pull out the common function call.
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llvm-svn: 162428
2012-08-23 04:57:36 +00:00
Chad Rosier
cf172e5e28
[ms-inline asm] Avoid a false positive assertion
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Assertion failed: (Start.isValid() == End.isValid() && "Start and end should
either both be valid or both be invalid!")
when parsing inline asm. SMLoc assumes that the first char * in the source is
invalid. However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.
llvm-svn: 162381
2012-08-22 19:14:29 +00:00
Craig Topper
a538d831e6
Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.
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llvm-svn: 162347
2012-08-22 06:07:19 +00:00
Craig Topper
056dfcccb7
Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int.
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llvm-svn: 162344
2012-08-22 05:59:59 +00:00
Craig Topper
455bcafa3b
Mark a function as static since it doesn't use anything in the class.
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llvm-svn: 162342
2012-08-22 05:36:44 +00:00
Richard Smith
13473857a7
Fix unaligned memory accesses when performing relocations in X86 JIT. There's
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no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.
llvm-svn: 162311
2012-08-21 20:48:36 +00:00
Chad Rosier
3d4bc62a5c
[ms-inline asm] Do not report a Parser error when matching inline assembly.
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llvm-svn: 162306
2012-08-21 19:36:59 +00:00
Chad Rosier
79e766c38e
[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,
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this is the index of the operand that failed to match.
Note: This may cause a buildbot failure due to an API mismatch in clang. Should
recover with my next commit to clang.
llvm-svn: 162295
2012-08-21 18:14:59 +00:00
Craig Topper
bab0c76674
Fix up indentation and remove a couple else's after returns.
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llvm-svn: 162270
2012-08-21 08:29:51 +00:00
Craig Topper
bfcfdeb563
Use uint16_t for tables of opcodes.
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llvm-svn: 162267
2012-08-21 08:23:21 +00:00
Craig Topper
a0cabf19f8
Fix up indentation. No functional change.
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llvm-svn: 162264
2012-08-21 08:17:07 +00:00
Craig Topper
4bc3e5a1bf
Add a couple llvm_unreachables. Add a message to several others.
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llvm-svn: 162263
2012-08-21 08:16:16 +00:00
Craig Topper
653e759046
Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change.
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llvm-svn: 162261
2012-08-21 07:32:16 +00:00
Craig Topper
384fae2f0d
Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms.
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llvm-svn: 162260
2012-08-21 07:11:11 +00:00
Craig Topper
4f3879dfa7
Merge FMA3 instructions with and without patterns into single classes using null_frag.
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llvm-svn: 162257
2012-08-21 05:56:45 +00:00
Michael Liao
10ff96ce8c
fix a case where all operands of BUILD_VECTOR are undefined
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llvm-svn: 162214
2012-08-20 17:59:18 +00:00
Craig Topper
b58eec4eaf
Remove FMA3 intrinsic instructions in favor of patterns.
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llvm-svn: 162194
2012-08-20 06:21:25 +00:00
Craig Topper
37eca54912
Use correct intrinsic for 256-bit VFMSUBADDPS.
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llvm-svn: 162193
2012-08-20 06:03:04 +00:00
Craig Topper
5122e9f194
Remove trailing white space and tab characters. No functional change.
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llvm-svn: 162192
2012-08-19 23:37:46 +00:00
Nadav Rotem
178250ad87
When unsafe math is used, we can use commutative FMAX and FMIN. In some cases
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this allows for better code generation.
Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and
FMINC, which are commutative.
For example:
movaps %xmm0, %xmm1
movsd LC(%rip), %xmm0
minsd %xmm1, %xmm0
becomes:
minsd LC(%rip), %xmm0
llvm-svn: 162187
2012-08-19 13:06:16 +00:00
Nadav Rotem
a136939fa9
Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.
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llvm-svn: 162172
2012-08-18 17:53:03 +00:00
Craig Topper
0128f9bad7
Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended.
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llvm-svn: 162166
2012-08-18 06:39:34 +00:00
Nadav Rotem
c324af609e
Revert r162160 because it made a few buildbots fail.
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llvm-svn: 162164
2012-08-18 05:02:36 +00:00
Nadav Rotem
2cb14a5c4b
The X86 backend has a number of optimizations for SETCC nodes which use
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arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.
Before:
xorl %esi, %edi
testb %dil, %dil
setne %al
ret
After:
xorb %dil, %sil
setne %al
ret
rdar://12081007
llvm-svn: 162160
2012-08-18 02:43:28 +00:00
Craig Topper
31625574db
Use nested switch to select arguments to reduce calls to EmitPCMP.
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llvm-svn: 162089
2012-08-17 07:15:56 +00:00
Craig Topper
602e1abe0d
Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
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llvm-svn: 162088
2012-08-17 06:55:11 +00:00
Anitha Boyapati
af3e98347f
Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
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llvm-svn: 162012
2012-08-16 04:04:02 +00:00
Anitha Boyapati
426feb61b9
(no commit message)
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llvm-svn: 162010
2012-08-16 03:50:04 +00:00
Michael Liao
06f6fe875a
minor fix of X86ISD::VSEXT_MOVL dump
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llvm-svn: 161902
2012-08-14 22:53:17 +00:00
Michael Liao
34107b9177
fix PR11334
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- FP_EXTEND only support extending from vectors with matching elements.
This results in the scalarization of extending to v2f64 from v2f32,
which will be legalized to v4f32 not matching with v2f64.
- add X86-specific VFPEXT supproting extending from v4f32 to v2f64.
- add BUILD_VECTOR lowering helper to recover back the original
extending from v4f32 to v2f64.
- test case is enhanced to include different vector width.
llvm-svn: 161894
2012-08-14 21:24:47 +00:00
Craig Topper
925a281b00
Factor duplicate calls to getUNDEF in several functions.
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llvm-svn: 161860
2012-08-14 08:18:43 +00:00
Craig Topper
d0d4b11f66
Re-factor intrinsic lowering to combine common parts of similar intrinsics. Reduces compiled code size a little bit.
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llvm-svn: 161859
2012-08-14 07:43:25 +00:00
Manman Ren
959acb106b
X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr from
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OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed
to a memory operand.
PR13576
llvm-svn: 161769
2012-08-13 18:29:41 +00:00
Manman Ren
e90e94f117
X86: when auto-detecting the subtarget features, make sure use IsIntel to detect
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Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6.
llvm-svn: 161763
2012-08-13 17:26:46 +00:00
Craig Topper
4e5eb72735
Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and putting an a couple if conditions in a better order.
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llvm-svn: 161746
2012-08-13 03:42:38 +00:00
Craig Topper
5145a0d967
Refactor code a bit to share commonalities. No functional change intended.
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llvm-svn: 161745
2012-08-13 02:34:03 +00:00
Craig Topper
ff6e4d1928
Fix an unused variable warning from r161742.
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llvm-svn: 161743
2012-08-13 01:26:45 +00:00
Craig Topper
a7aaa62d54
Remove the LowerMMXCONCAT_VECTORS function. It could never execute because there are no legal 64-bit vector types that could be used as inputs to a 128-bit concat_vectors. Remove a target specific SDNode and its patterns that become unused as a result.
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llvm-svn: 161742
2012-08-13 01:23:55 +00:00
Craig Topper
3d2b271362
Remove call to setOperationAction for SETCC of v4f32. SETCC returns an integer type not an FP type.
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llvm-svn: 161738
2012-08-12 05:31:32 +00:00
Craig Topper
498228d089
Remove unnecessary call to setOperationAction for SETCC of v2i64 under SSE42. It was already called for the same under SSE2.
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llvm-svn: 161737
2012-08-12 05:15:16 +00:00
Craig Topper
10a8bf3b8c
Make replace many calls to getSizeInBits() with is128BitVector/is256BitVector
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llvm-svn: 161734
2012-08-12 02:23:29 +00:00
Craig Topper
03d2787275
Use MVT.isXBitVector instead of EVT.isXBitVector when setting up operation actions. Compiles to smaller code.
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llvm-svn: 161733
2012-08-12 00:34:56 +00:00
Michael Liao
e7e828fd64
fix PR13577, an issue introduced by r161687
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- FCMOV only supports a subset of X86 conditions. Skip boolean
simplification if X86 condition is not valid for FCMOV.
- add a minimal test case for PR13577.
llvm-svn: 161732
2012-08-11 23:47:06 +00:00