Commit Graph

226 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 19be2ab320 Switch to ArrayRef<CodeGenRegisterClass*>.
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

llvm-svn: 140816
2011-09-29 22:28:37 +00:00
Jim Grosbach d152e2cc00 Prefer diagnostics from target predicate in asm matcher.
llvm-svn: 137742
2011-08-16 20:12:35 +00:00
Jim Grosbach 120a96a721 MCTargetAsmParser target match predicate support.
Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.

llvm-svn: 137675
2011-08-15 23:03:29 +00:00
Jim Grosbach b59abbd4fd Move MatchResultTy enum into base class definition.
No need for it to be redefined as part of every derived target asm parser
class.

llvm-svn: 137649
2011-08-15 20:53:08 +00:00
David Greene af8ee2cdee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531
2011-07-29 22:43:06 +00:00
David Greene 1aa0e3e118 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

llvm-svn: 136485
2011-07-29 19:07:05 +00:00
Evan Cheng 1142444565 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
llvm-svn: 136027
2011-07-26 00:24:13 +00:00
Kevin Enderby 1b87c80678 Have tblgen produce code that tolerates operands that return an invalid match class.
llvm-svn: 135287
2011-07-15 18:30:43 +00:00
Eric Christopher 71520a867d Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.

llvm-svn: 134936
2011-07-11 23:06:52 +00:00
David Greene af973b4f36 [AVX] Make Inits Foldable
Manage Inits in a FoldingSet.  This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
  of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen.  This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

llvm-svn: 134907
2011-07-11 18:25:51 +00:00
Eli Friedman 71123fc422 Fix dangling pointer.
llvm-svn: 134725
2011-07-08 20:07:05 +00:00
Evan Cheng 1a6d551f7f Fix a dangling reference. Patch by Dave Abrahams. pr10311
llvm-svn: 134709
2011-07-08 18:04:22 +00:00
Evan Cheng 4d1ca96bfc Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".

llvm-svn: 134678
2011-07-08 01:53:10 +00:00
Owen Anderson a84be6c96b Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.

llvm-svn: 133940
2011-06-27 21:06:21 +00:00
Jim Grosbach 797cff0504 Consolidate some TableGen diagnostic helper functions.
TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.

llvm-svn: 133568
2011-06-21 22:55:50 +00:00
Jakob Stoklund Olesen 8e188be035 Store CodeGenRegisters as pointers so they won't be reallocated.
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.

llvm-svn: 133333
2011-06-18 04:26:06 +00:00
Jakob Stoklund Olesen d7bc5c26ab Give CodeGenRegisterClass a real sorted member set.
Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.

Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.

llvm-svn: 133040
2011-06-15 04:50:36 +00:00
Jim Grosbach e6ce2053e7 Tidy up. Add missing newline to generated file.
llvm-svn: 130779
2011-05-03 19:09:56 +00:00
Chris Lattner 0ab5e2cded Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!

llvm-svn: 129558
2011-04-15 05:18:47 +00:00
Daniel Dunbar 5f74b39764 tlbgen/MC: StringRef's to temporary objects considered harmful.
llvm-svn: 128735
2011-04-01 20:23:52 +00:00
Joerg Sonnenberger 07cbde967f Check that MnemonicAlias doesn't map back to the same string.
llvm-svn: 125792
2011-02-17 23:22:19 +00:00
Jim Grosbach 861e49ce3b AsmMatcher custom operand parser failure enhancements.
Teach the AsmMatcher handling to distinguish between an error custom-parsing
an operand and a failure to match. The former should propogate the error
upwards, while the latter should continue attempting to parse with
alternative matchers.

Update the ARM asm parser accordingly.

llvm-svn: 125426
2011-02-12 01:34:40 +00:00
Jim Grosbach 860a84d65a Tidy out asm matcher .inc output.
llvm-svn: 125408
2011-02-11 21:31:55 +00:00
Bill Wendling 5f3a39e79a Don't return before calling the post-processing function(s).
llvm-svn: 125256
2011-02-10 01:28:26 +00:00
Jim Grosbach 6e2e29bd11 Do AsmMatcher operand classification per-opcode.
When matching operands for a candidate opcode match in the auto-generated
AsmMatcher, check each operand against the expected operand match class.
Previously, operands were classified independently of the opcode being
handled, which led to difficulties when operand match classes were
more complicated than simple subclass relationships.

llvm-svn: 125245
2011-02-10 00:08:28 +00:00
Bruno Cardoso Lopes 2315beba24 Implement support for custom target specific asm parsing of operands.
Motivation: Improve the parsing of not usual (different from registers or
immediates) operand forms.

This commit implements only the generic support. The ARM specific modifications
will come next.

A table like the one below is autogenerated for every instruction
containing a 'ParserMethod' in its AsmOperandClass

static const OperandMatchEntry OperandMatchTable[20] = {
 /* Mnemonic, Operand List Mask, Operand Class, Features */
 { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 },
 { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM },

A matcher function very similar (but lot more naive) to
MatchInstructionImpl scans the table. After the mnemonic match, the
features are checked and if the "to be parsed" operand index is
present in the mask, there's a real match. Then, a switch like the one
below dispatch the parsing to the custom method provided in
'ParseMethod':

 case MCK_Coproc:
   return TryParseCoprocessorOperandName(Operands);

llvm-svn: 125030
2011-02-07 19:38:32 +00:00
Daniel Dunbar 191524e8a5 MC/AsmMatcher: Sink ConvertToMCInst into the TargetAsmParser instance, which
implicitly allows custom conversions to be member functions.

llvm-svn: 124908
2011-02-04 23:17:40 +00:00
Daniel Dunbar 6619340462 MC/AsmParser: Add support for allowing the conversion process to fail (via
custom conversion functions).

llvm-svn: 124872
2011-02-04 17:12:23 +00:00
Daniel Dunbar 77b7c3f1e6 MC/AsmMatcher: Add support for custom conversion functions.
llvm-svn: 124870
2011-02-04 17:12:15 +00:00
Kevin Enderby 96f6e379e2 Changed the TableGen created MatchInstructionImpl() setting of ErrorInfo.
The algorithm for identifying which operand is invalid will now always point to
some operand and not the mnemonic sometimes.  The change is now that ErrorInfo
is the index of the highest operand that does not match for any of the matching
mnemonics records.  And no longer the ~0U value when the mnemonic matches and
not every record with a matching mnemonic has the same mismatching operand
index.

llvm-svn: 124734
2011-02-02 18:20:55 +00:00
Bob Wilson 770681d7b6 Add a MnemonicIsValid method to the asm matcher.
Patch by Bill Wendling.

llvm-svn: 124328
2011-01-26 21:43:46 +00:00
Bob Wilson 2c1562ebd3 Fix spelling of CouldMatchAmbiguouslyWith method name.
llvm-svn: 124324
2011-01-26 21:26:21 +00:00
Bob Wilson f4ee9e515c Whitespace and 80-column fixes.
llvm-svn: 124323
2011-01-26 21:26:19 +00:00
Bob Wilson b9b2422e89 Improve the AsmMatcher's ability to handle suboperands.
When an operand class is defined with MIOperandInfo set to a list of
suboperands, the AsmMatcher has so far required that operand to also define
a custom ParserMatchClass, and InstAlias patterns have not been able to
set the individual suboperands separately.  This patch removes both of those
restrictions.  If a "compound" operand does not override the default
ParserMatchClass, then the AsmMatcher will now parse its suboperands
separately.  If an InstAlias operand has the same class as the corresponding
compound operand, then it will be handled as before; but if that check fails,
TableGen will now try to match up a sequence of InstAlias operands with the
corresponding suboperands.

llvm-svn: 124314
2011-01-26 19:44:55 +00:00
Daniel Dunbar 83381d001b tblgen/AsmMatcherEmitter: Fix alias handling to honor -match-prefix.
llvm-svn: 124154
2011-01-24 23:26:31 +00:00
Bill Wendling a01ea89fb6 ARM uses '.' in their tokens. Give it a name instead of a numeric value.
llvm-svn: 124026
2011-01-22 09:44:32 +00:00
Bob Wilson 266d2ba124 Tidy comment.
llvm-svn: 123933
2011-01-20 18:38:07 +00:00
Bob Wilson f3f2835b01 Precompute InstAlias operand mapping to result instruction operand indices.
There should be no functional change from this, but I think it's simpler this
way.

llvm-svn: 123931
2011-01-20 18:38:02 +00:00
Owen Anderson dac7a0174e When matching asm operands, always try to match the most restricted type first.
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous.  This
is tricky to resolve since neither is a subset of the other.

XFAIL the test for now.  The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.

llvm-svn: 123786
2011-01-18 23:01:21 +00:00
Daniel Dunbar e46bc4cec5 Formatting tweak.
llvm-svn: 123718
2011-01-18 01:59:30 +00:00
Bob Wilson 03912aba9a Fix some tablegen issues to allow using zero_reg for InstAlias definitions.
This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

llvm-svn: 123490
2011-01-14 22:58:09 +00:00
Daniel Dunbar 4035383937 MC/AsmMatcher: Fix indirect 80-col viola.
llvm-svn: 123174
2011-01-10 15:26:11 +00:00
Chris Lattner 89dcb687bc various cleanups to tblgen, patch by Garrison Venn!
llvm-svn: 121837
2010-12-15 04:48:22 +00:00
Chris Lattner 77d369c8eb eliminate the Records global variable, patch by Garrison Venn!
llvm-svn: 121659
2010-12-13 00:23:57 +00:00
Bill Wendling 4a08e563d7 Give the exclamation point a name instead of a number.
llvm-svn: 119759
2010-11-18 23:36:54 +00:00
Chris Lattner d6746d5b46 pass literals like $$1 through to the asm matcher. This isn't right yet, but doesn't hurt.
llvm-svn: 118359
2010-11-06 22:06:03 +00:00
Chris Lattner 4869d346e3 add (and document) the ability for alias results to have
fixed physical registers.  Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).

llvm-svn: 118352
2010-11-06 19:57:21 +00:00
Chris Lattner b6f8e8248d generalize alias support to allow the result of an alias to
add fixed immediate values.  Move the aad and aam aliases to
use this, and document it.

llvm-svn: 118350
2010-11-06 19:25:43 +00:00
Chris Lattner db6f90c61c fix a bug where we had an implicit assumption that the
result instruction operand numbering matched the result pattern.

Fixing this allows us to move the xchg/test aliases to the .td file.

llvm-svn: 118334
2010-11-06 08:20:59 +00:00
Chris Lattner 8188fb264f fix some bugs in the alias support, unblocking changing of "clr" aliases
from c++ hacks to proper .td InstAlias definitions.  Change them!

llvm-svn: 118330
2010-11-06 07:31:43 +00:00
Chris Lattner fecdad6237 Reimplement BuildResultOperands to be in terms of the result instruction's
operand list instead of the operand list redundantly declared on the alias
or instruction.

With this change, we finally remove the ins/outs list on the alias.  Before:
  def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
                  "movsx $src, $dst",
                  (MOVSX16rr8W GR16:$dst, GR8:$src)>;
After:
  def : InstAlias<"movsx $src, $dst",
                  (MOVSX16rr8W GR16:$dst, GR8:$src)>;

This also makes the alias mechanism more general and powerful, which will
be exploited in subsequent patches.

llvm-svn: 118329
2010-11-06 07:14:44 +00:00
Chris Lattner b625dd2d87 implement more checking to reject things like:
(someinst GR16:$foo, GR32:$foo)

Reimplement BuildAliasOperandReference to be correctly
based on the names of operands in the result pattern,
instead of on the instruction operand definitions.

llvm-svn: 118328
2010-11-06 07:06:09 +00:00
Chris Lattner 23064cb4e5 simplify
llvm-svn: 118326
2010-11-06 06:45:08 +00:00
Chris Lattner 9f093815fa fix another fixme, replacing a string with a semantic pointer.
llvm-svn: 118325
2010-11-06 06:43:11 +00:00
Chris Lattner 8ffd129950 disolve a hack, having CodeGenInstAlias decode the alias in the .td
file instead of the asmmatcher.

llvm-svn: 118324
2010-11-06 06:39:47 +00:00
Chris Lattner 4efe13d8d4 partition operand processing between aliases and instructions.
Right now the code is partitioned but the behavior is the same.
This should be improved in the near future.   This removes some
uses of TheOperandList.

llvm-svn: 118232
2010-11-04 02:11:18 +00:00
Chris Lattner ccde463250 pull name slicing out of BuildInstructionOperandReference so
it doesn't do any lexical stuff anymore.

llvm-svn: 118230
2010-11-04 01:58:23 +00:00
Chris Lattner 897a140e2a cleanups.
llvm-svn: 118228
2010-11-04 01:55:23 +00:00
Chris Lattner 7108dad130 replace SrcOpNum with SrcOpName, eliminating a numering dependency
on the incoming operand list.  This also makes the code simpler.

llvm-svn: 118225
2010-11-04 01:42:59 +00:00
Chris Lattner 4779e3e94a strength reduce some code, resolving a fixme.
llvm-svn: 118219
2010-11-04 00:57:06 +00:00
Chris Lattner 743081d097 take a big step to making aliases more general and less of a hack:
now matchables contain an explicit list of how to populate each
operand in the result instruction instead of having them somehow
magically be correlated to the input inst.

llvm-svn: 118217
2010-11-04 00:43:46 +00:00
Chris Lattner 896cf04885 rename Operand -> AsmOperand for clarity.
llvm-svn: 118190
2010-11-03 19:47:34 +00:00
Chris Lattner cc5dce89d4 Completely reject instructions that have an operand in their
ins/outs list that isn't specified by their asmstring.  Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right.  Mark a bunch of ARM instructions that use this as 
isCodeGenOnly.  Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).

llvm-svn: 118119
2010-11-02 23:40:41 +00:00
Chris Lattner 4d23eb2f0e make MatchableInfo::Validate reject instructions (like LDR_PRE in ARM)
that have complicated tying going on.

llvm-svn: 118112
2010-11-02 23:18:43 +00:00
Chris Lattner e032dbfd9e rewrite EmitConvertToMCInst to iterate over the MCInst operands,
filling them in one at a time.  Previously this iterated over the
asmoperands, which left the problem of "holes".  The new approach
simplifies things.

llvm-svn: 118104
2010-11-02 22:55:03 +00:00
Chris Lattner 5cf8a4a909 merge two large parallel loops in EmitConvertToMCInst, no change
in the generated .inc files.

llvm-svn: 118083
2010-11-02 21:49:44 +00:00
Chris Lattner 77d3ead281 a bunch of random cleanup, move a helper to CGT where it belongs.
llvm-svn: 118031
2010-11-02 18:10:06 +00:00
Chris Lattner a7a903e706 add and update comments.
llvm-svn: 118025
2010-11-02 17:34:28 +00:00
Chris Lattner 28ea9b18cf refactor/cleanup MatchableInfo by eliminating the Tokens array,
merging it into a Token field in Operand, and moving the first
token to an explicit mnemonic field.  These were parallel
arrays before (except for the mnemonic) which kept confusing me.

llvm-svn: 118024
2010-11-02 17:30:52 +00:00
Chris Lattner d64b7c0685 rename operands -> asmoperands to be more descriptive.
llvm-svn: 117993
2010-11-02 01:03:43 +00:00
Chris Lattner e3c48deff5 fix computation of ambiguous instructions to not ignore the mnemonic.
FWIW, X86 has 254 ambiguous instructions.

llvm-svn: 117979
2010-11-01 23:57:23 +00:00
Chris Lattner c28e1db284 give MatchableInfo::Operand a constructor
llvm-svn: 117968
2010-11-01 23:08:02 +00:00
Chris Lattner dd3b09c234 Implement enough of the missing instalias support to get
aliases installed and working.  They now work when the
matched pattern and the result instruction have exactly
the same operand list.

This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.

Note that we do not accept instructions like:
  movzx 0(%rsp), %rsi

GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand.  It could be 8/16/32 bits.

llvm-svn: 117901
2010-11-01 05:34:34 +00:00
Chris Lattner ad77681253 rename InstructionInfo -> MatchableInfo since it now
represents InstAliases as well.  Rename 
isAssemblerInstruction -> Validate since that is what
it does (modulo the ARM $lane hack).

llvm-svn: 117899
2010-11-01 05:06:45 +00:00
Chris Lattner ba465f9a8a refactor initialization of InstructionInfo to be sharable between
instructions and InstAliases.  Start creating InstructionInfo's
for Aliases.

llvm-svn: 117898
2010-11-01 04:53:48 +00:00
Chris Lattner 178f4bb62d make the asm matcher emitter reject instructions that have comments
in their asmstring.  Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.

llvm-svn: 117897
2010-11-01 04:44:29 +00:00
Chris Lattner 39bc53b33a refactor InstructionInfo to not have a pointer to CodeGenInstruction
member, and make isAssemblerInstruction() a method (pushing some code
around inside it).

llvm-svn: 117895
2010-11-01 04:34:44 +00:00
Chris Lattner 488c201bb7 define a new CodeGenInstAlias. It has an asmstring and operand list for now,
todo: the result field.

llvm-svn: 117894
2010-11-01 04:05:41 +00:00
Chris Lattner d8adec70f3 factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class.  No functionality change.

llvm-svn: 117893
2010-11-01 04:03:32 +00:00
Chris Lattner 86e1c9484f avoid needless throw/catch/rethrow, stringref'ize some simple stuff.
llvm-svn: 117892
2010-11-01 03:19:09 +00:00
Chris Lattner a397716081 eliminate the old InstFormatName which is always "AsmString",
simplify CodeGenInstruction. No functionality change.

llvm-svn: 117891
2010-11-01 02:15:23 +00:00
Chris Lattner 517dc95d47 all predicates on an MnemonicAlias must be AssemblerPredicates.
llvm-svn: 117890
2010-11-01 02:09:21 +00:00
Chris Lattner f7a01e9f46 change the singleton register handling code to be based on Record*'s
instead of strings, simplifying it.

llvm-svn: 117889
2010-11-01 01:47:07 +00:00
Chris Lattner b80ab36179 Give AsmMatcherInfo a CodeGenTarget, which simplifies a bunch of
argument passing.  Consolidate all SingletonRegister detection
and handling into a new 
InstructionInfo::getSingletonRegisterForToken method instead of
having it scattered about.  No change in generated .inc files.

llvm-svn: 117888
2010-11-01 01:37:30 +00:00
Chris Lattner 25d9c7fa2e move FlattenVariants out of AsmMatcherEmitter into a shared
CodeGenInstruction::FlattenAsmStringVariants method.  Use it
to simplify the code in AsmWriterInst, which now no longer 
needs to worry about variants.

llvm-svn: 117886
2010-11-01 01:07:14 +00:00
Chris Lattner 40dd3f0939 add a FIXME, $lane in ARM is an issue that needs to be resolved before
this can start rejecting instructions.

llvm-svn: 117885
2010-11-01 00:51:32 +00:00
Chris Lattner 941c19b7ba reject instructions that contain a \n in their asmstring. Mark
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.

llvm-svn: 117884
2010-11-01 00:46:16 +00:00
Chris Lattner 7ff334687d fix the !eq operator in tblgen to return a bit instead of an int.
Use this to make the X86 and ARM targets set isCodeGenOnly=1 
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.

llvm-svn: 117862
2010-10-31 19:22:57 +00:00
Chris Lattner 9492c17baf two changes: make the asmmatcher generator ignore ARM pseudos properly,
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.

llvm-svn: 117861
2010-10-31 19:15:18 +00:00
Chris Lattner 33fc3e095b reapply r117858 with apparent editor malfunction fixed (somehow I
got a dulicated line).

llvm-svn: 117860
2010-10-31 19:10:56 +00:00
Chris Lattner e59eef3dd1 revert r117858 while I check out a failure I missed.
llvm-svn: 117859
2010-10-31 19:05:32 +00:00
Chris Lattner 9293008e90 the asm matcher can't handle operands with modifiers (like ${foo:bar}).
Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the 
instruction 'isCodeGenOnly'.

Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are 
doing this.

llvm-svn: 117858
2010-10-31 18:48:12 +00:00
Chris Lattner 43690071cf have GetAliasRequiredFeatures get its features from
AsmMatcherInfo so we don't have two places that know the
feature -> enum mapping.  No functionality change.

llvm-svn: 117845
2010-10-30 20:15:02 +00:00
Chris Lattner a0e871901b simplify code that creates SubtargetFeatureInfo, ensuring that features
that are only used by MnemonicAliases will be found.

llvm-svn: 117844
2010-10-30 20:07:57 +00:00
Chris Lattner f9ec2fb34a fix typos and some serious bugs in feature handling (but not for
cases that are currently exercised).  Thanks to Frits van Bommel for
the great review!

llvm-svn: 117840
2010-10-30 19:47:49 +00:00
Chris Lattner aac142cc06 Resolve a terrible hack in tblgen: instead of hardcoding
"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.

llvm-svn: 117831
2010-10-30 19:38:20 +00:00
Chris Lattner 2cb092dc55 Implement (and document!) support for MnemonicAlias's to have Requires
directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.

llvm-svn: 117830
2010-10-30 19:23:13 +00:00
Chris Lattner ec56397eb4 fix build problem
llvm-svn: 117828
2010-10-30 18:57:07 +00:00
Chris Lattner cf9b6e3107 diagnose targets that define two alises with the same 'from' mnemonic
with a useful error message instead of having tblgen explode with an 
assert.

llvm-svn: 117827
2010-10-30 18:56:12 +00:00
Chris Lattner 477fba4f54 emit the mnemonic aliases in their own helper function instead of
inline into MatchInstructionImpl.

llvm-svn: 117826
2010-10-30 18:48:18 +00:00