b63501397b
Clean up includes.
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llvm-svn: 160852
2012-07-27 06:44:02 +00:00
e6aed139f0
Write llvm-tblgen backends as functions instead of sub-classes.
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The TableGenBackend base class doesn't do much, and will be removed
completely soon.
Patch by Sean Silva!
llvm-svn: 158311
2012-06-11 15:37:55 +00:00
efe653f973
Revert "Replace some uses of std:map<std::string,...> with StringMap."
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StringMap iterators are not deterministic, and that's more important
here than speed or memory.
llvm-svn: 155039
2012-04-18 20:24:49 +00:00
2bed0f974f
Replace some uses of std:map<std::string,...> with StringMap.
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llvm-svn: 155037
2012-04-18 19:13:59 +00:00
dba3f5be00
Use SmallVector for the requirements on an InstAlias.
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llvm-svn: 155034
2012-04-18 19:02:43 +00:00
f4e6708c7a
Tidy up. Formatting.
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llvm-svn: 155032
2012-04-18 18:56:33 +00:00
34487838bf
Convert assert(false) followed by a return to llvm_unreachable
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llvm-svn: 153997
2012-04-04 04:55:46 +00:00
9c252ebe4c
Tidy up spacing in some tablegen outputs.
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llvm-svn: 153937
2012-04-03 06:52:47 +00:00
22d093e4f1
Emit the asm writer's mnemonic table with SequenceToOffsetTable.
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This way we can get AVX v-prefixed instructions tail merged with the normal insns.
llvm-svn: 153869
2012-04-02 09:13:46 +00:00
dab9e35ad0
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
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llvm-svn: 153863
2012-04-02 07:01:04 +00:00
7a2cea1814
Use SequenceToOffsetTable to generate instruction name table for AsmWriter.
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llvm-svn: 153857
2012-04-02 00:47:39 +00:00
682de39f2d
Rip out emission of the regIsInRegClass function for the asm printer.
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It's slow, bloated and completely redundant with MCRegisterClass::contains.
llvm-svn: 153782
2012-03-30 23:13:40 +00:00
892f48058b
Use SequenceToOffsetTable in emitRegisterNameString.
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This allows suffix sharing in register names. (AX is a suffix of EAX).
llvm-svn: 153777
2012-03-30 21:12:52 +00:00
e3084895d2
Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."
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We cannot limit the concatenated instruction names to 64K. ARM is
already at 32K, and it is easy to imagine a target with more
instructions.
llvm-svn: 152817
2012-03-15 18:05:57 +00:00
e99d26c68b
Revert r152105: "Use uint16_t to store indices into string table"
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This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.
If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.
llvm-svn: 152816
2012-03-15 18:05:54 +00:00
d31658d44c
Re-commit r152202 hopefully fixing the MSVC linker error.
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Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
llvm-svn: 152296
2012-03-08 06:55:27 +00:00
3048107bc1
Revert r152202 as it's causing internal buildbot failures.
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Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect
all 16-bit string table offsets. Also make sure the string to offset table
string is not larger than 65536 characters since larger string literals aren't
portable.
llvm-svn: 152233
2012-03-07 17:06:40 +00:00
8d68422121
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
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llvm-svn: 152202
2012-03-07 05:17:23 +00:00
93d65c785e
Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that.
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llvm-svn: 152105
2012-03-06 06:04:39 +00:00
c4965bce14
Convert assert(0) to llvm_unreachable
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llvm-svn: 149814
2012-02-05 07:21:30 +00:00
edbb58c577
Remove unnecessary default cases in switches that cover all enum values.
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llvm-svn: 147855
2012-01-10 16:47:17 +00:00
29cdcda80d
ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.
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rdar://10435076
llvm-svn: 144606
2011-11-15 01:46:57 +00:00
bd92dc608d
TableGen: Privatize CodeGenRegisterClass::TheDef and Name.
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When TableGen starts creating its own register classes, the synthesized
classes won't have a Record reference. All register classes must have a
name, though.
llvm-svn: 141081
2011-10-04 15:28:08 +00:00
84c287e33c
Move TableGen's parser and entry point into a library
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This is the first step towards splitting LLVM and Clang's tblgen executables.
llvm-svn: 140951
2011-10-01 16:41:13 +00:00
19be2ab320
Switch to ArrayRef<CodeGenRegisterClass*>.
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This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.
llvm-svn: 140816
2011-09-29 22:28:37 +00:00
4d806e2830
Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.
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llvm-svn: 134457
2011-07-06 02:02:33 +00:00
2ac15f4a5d
Change AsmName's type from StringRef to std::string. AsmName was pointing to a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it.
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This fixes over 300+ failing tests on MSVC.
Credit for this fix goes to chapuni.
llvm-svn: 134064
2011-06-29 11:25:34 +00:00
a84be6c96b
Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
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Patch by Jim Grosbach.
llvm-svn: 133940
2011-06-27 21:06:21 +00:00
797cff0504
Consolidate some TableGen diagnostic helper functions.
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TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.
llvm-svn: 133568
2011-06-21 22:55:50 +00:00
8e188be035
Store CodeGenRegisters as pointers so they won't be reallocated.
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Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.
llvm-svn: 133333
2011-06-18 04:26:06 +00:00
d7bc5c26ab
Give CodeGenRegisterClass a real sorted member set.
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Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.
Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.
llvm-svn: 133040
2011-06-15 04:50:36 +00:00
36c0c6db3f
Improve the heuristic to emit the alias if the number of hard-coded registers
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are also greater than the alias.
llvm-svn: 133038
2011-06-15 04:31:19 +00:00
e712449688
Heuristic: If the number of operands in the alias are more than the number of
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operands in the aliasee, don't print the alias.
llvm-svn: 132963
2011-06-14 03:17:20 +00:00
f5199debc0
Use a more efficient data structure for the "operand map". The number of
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operands to an instruction aren't great, so an iterative search is fairly quick
and doesn't have the overhead of std::map.
llvm-svn: 131886
2011-05-23 00:18:33 +00:00
2e3fbaab39
Invert the meaning of printAliasInstr's return value. It now returns
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true on success and false on failure. Update callers.
llvm-svn: 129722
2011-04-18 21:28:11 +00:00
6dd69d9241
Add an option to not print the alias of an instruction. It defaults to "print
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the alias".
llvm-svn: 129485
2011-04-13 23:36:21 +00:00
33984c6973
Only emit the AvailableFeatures variable if it's used.
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llvm-svn: 129124
2011-04-08 04:08:57 +00:00
bc3f79044a
Replace the old algorithm that emitted the "print the alias for an instruction"
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with the newer, cleaner model. It uses the IAPrinter class to hold the
information that is needed to match an instruction with its alias. This also
takes into account the available features of the platform.
There is one bit of ugliness. The way the logic determines if a pattern is
unique is O(N**2), which is gross. But in reality, the number of items it's
checking against isn't large. So while it's N**2, it shouldn't be a massive time
sink.
llvm-svn: 129110
2011-04-07 21:20:06 +00:00
1cd7bd62e4
Call static functions so that they aren't left unused.
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llvm-svn: 128020
2011-03-21 21:08:27 +00:00
7e570b5ed8
A WIP commit of the InstAlias printing cleanup. This code will soon replace the
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code below it. Even though it looks very similar, it will match more precisely
and geneate better functions in the long run.
llvm-svn: 127991
2011-03-21 08:59:17 +00:00
5d3174c102
Add the IAPrinter class.
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This is a helper class that will make it easier to say which InstAliases can be
printed and which cannot (because of ambiguity).
llvm-svn: 127990
2011-03-21 08:40:31 +00:00
7e5771d7ce
* Add classes that support the "feature" information.
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* Move the code that emits the reg in reg class matching into its own function.
llvm-svn: 127988
2011-03-21 08:31:53 +00:00
31ca7efa04
A new TableGen feature! (Not turned on just yet.)
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InstAlias<{alias}, {aliasee}>;
The InstAlias instruction should be able to go from the MCInst to the
{alias}. All of the information is there to match the MCInst with the
{aliasee}. From there, it's a simple matter to emit the {alias}, with the
correct operands from the {aliasee}.
The code this patch generates can be used by the InstPrinter to automatically
print out the alias without having to write special C++ code to handle the
situation.
This is a WIP, and therefore are several limitations. For instance, it cannot
handle AsmOperands at the moment. It also doesn't know what to do when two
{alias}es match the same {aliasee}. (Currently, it just ignores those two cases
and allows the printInstruction method to handle them.)
llvm-svn: 126538
2011-02-26 03:09:12 +00:00
77d369c8eb
eliminate the Records global variable, patch by Garrison Venn!
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llvm-svn: 121659
2010-12-13 00:23:57 +00:00
4a57b76eea
Let a target specify whether it wants an assembly printer to be the MC version
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or not. TableGen needs to generate the printInstruction() function as taking
an MCInstr* or a MachineInstr*, depending. Default to the old non-MC
version so that everything not yet using MC continues to just work without
fidding.
llvm-svn: 115126
2010-09-30 01:29:54 +00:00
a5497345ad
trailing whitespace
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llvm-svn: 115096
2010-09-29 22:32:50 +00:00
a573d19662
Handle the odd case where we only have one instruction.
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llvm-svn: 114293
2010-09-18 18:50:27 +00:00
004d772558
Update comment.
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llvm-svn: 108571
2010-07-16 23:10:00 +00:00
76c564b1bb
change a ton of code to not implicitly use the "O" raw_ostream
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member of AsmPrinter. Instead, pass it in explicitly.
llvm-svn: 100306
2010-04-04 04:47:45 +00:00
4763dbeaf6
make inst_begin/inst_end iterate over InstructionsByEnumValue.
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Use CodeGenTarget::getInstNamespace in one place and fix it.
llvm-svn: 98915
2010-03-19 01:00:55 +00:00
Craig Topper