Commit Graph

10 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen e6aed139f0 Write llvm-tblgen backends as functions instead of sub-classes.
The TableGenBackend base class doesn't do much, and will be removed
completely soon.

Patch by Sean Silva!

llvm-svn: 158311
2012-06-11 15:37:55 +00:00
Evan Cheng 630a7f3064 Reserve number of MI operands to accom,odate complex patterns.
llvm-svn: 153125
2012-03-20 21:07:51 +00:00
Craig Topper c4965bce14 Convert assert(0) to llvm_unreachable
llvm-svn: 149814
2012-02-05 07:21:30 +00:00
David Blaikie edbb58c577 Remove unnecessary default cases in switches that cover all enum values.
llvm-svn: 147855
2012-01-10 16:47:17 +00:00
Peter Collingbourne 84c287e33c Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.

llvm-svn: 140951
2011-10-01 16:41:13 +00:00
David Greene af8ee2cdee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531
2011-07-29 22:43:06 +00:00
David Greene 1aa0e3e118 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

llvm-svn: 136485
2011-07-29 19:07:05 +00:00
Eric Christopher 71520a867d Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.

llvm-svn: 134936
2011-07-11 23:06:52 +00:00
David Greene af973b4f36 [AVX] Make Inits Foldable
Manage Inits in a FoldingSet.  This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
  of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen.  This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

llvm-svn: 134907
2011-07-11 18:25:51 +00:00
Jim Grosbach bcb36be8e3 TableGen'erated MC lowering for simple pseudo-instructions.
This allows the (many) pseudo-instructions we have that map onto a single
real instruction to have their expansion during MC lowering handled
automatically instead of the current cumbersome manual expansion required.
These sorts of pseudos are common when an instruction is used in situations
that require different MachineInstr flags (isTerminator, isBranch, et. al.)
than the generic instruction description has. For example, using a move
to the PC to implement a branch.

llvm-svn: 134704
2011-07-08 17:36:35 +00:00