62ac5ca22d
80-col.
...
llvm-svn: 109407
2010-07-26 17:53:07 +00:00
1e5d7c6e82
Get rid of exceptions in llvmc.
...
llvmc can be now compiled with llvm-gcc on Windows.
llvm-svn: 109215
2010-07-23 03:42:55 +00:00
bebb8c5f86
Hack around extracts that aren't easy to process.
...
llvm-svn: 109043
2010-07-21 22:07:19 +00:00
394f1c2a27
remove option from tablegen for building static header.
...
llvm-svn: 108893
2010-07-20 19:45:21 +00:00
9de0ca73d4
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
...
llvm-svn: 108769
2010-07-19 23:32:44 +00:00
1432699cb2
Remove code duplication.
...
llvm-svn: 108718
2010-07-19 17:17:22 +00:00
4fc84a0dcd
Better error reporting for switch_list.
...
llvm-svn: 108714
2010-07-19 17:17:10 +00:00
eefe8616be
TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
...
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.
llvm-svn: 108677
2010-07-19 05:44:09 +00:00
303838d69f
llvmc: Add a new option type (switch_list).
...
llvm-svn: 108673
2010-07-19 03:16:25 +00:00
004d772558
Update comment.
...
llvm-svn: 108571
2010-07-16 23:10:00 +00:00
499f797cdd
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
...
thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
41b4a6b36a
Convert some tab stops into spaces.
...
llvm-svn: 108130
2010-07-12 08:16:59 +00:00
4a52e2f6a7
Replace copyRegToReg with COPY in FastISelEmitter.
...
llvm-svn: 108071
2010-07-11 03:53:50 +00:00
d7b5ce3312
Reapply bottom-up fast-isel, with several fixes for x86-32:
...
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
llvm-svn: 108039
2010-07-10 09:00:22 +00:00
792e906bef
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
...
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
llvm-svn: 107996
2010-07-09 18:27:43 +00:00
6586e9b203
--- Reverse-merging r107947 into '.':
...
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
llvm-svn: 107987
2010-07-09 16:37:18 +00:00
cc40c76382
These changes should have accompanied r107943.
...
llvm-svn: 107947
2010-07-09 00:59:16 +00:00
e2289285ae
Changes to ARM tail calls, mostly cosmetic.
...
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.
llvm-svn: 107851
2010-07-08 01:18:23 +00:00
e75704369d
Revert 107840 107839 107813 107804 107800 107797 107791.
...
Debug info intrinsics win for now.
llvm-svn: 107850
2010-07-08 01:00:56 +00:00
ac5881295c
Implement the major chunk of PR7195: support for 'callw'
...
in the integrated assembler. Still some discussion to be
done.
llvm-svn: 107825
2010-07-07 22:27:31 +00:00
ffe64b1ee5
Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
...
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.
llvm-svn: 107791
2010-07-07 16:47:08 +00:00
676a15bdf5
Add a new target independent COPY instruction and code to lower it.
...
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.
COPY is lowered to native register copies by LowerSubregs.
llvm-svn: 107529
2010-07-02 22:29:50 +00:00
3b1657b777
Clean up TargetOpcodes.h a bit, and limit the number of places where the full
...
list of predefined instructions appear. Add some consistency checks.
Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.
llvm-svn: 107520
2010-07-02 21:44:22 +00:00
cfdaac1cb0
Remove unused variables.
...
llvm-svn: 106834
2010-06-25 09:35:33 +00:00
99f28dad6e
Change array references to match my previous change to use the public type
...
names for the array fields.
llvm-svn: 106803
2010-06-24 22:21:19 +00:00
e26d710335
Fix up some comments.
...
llvm-svn: 106795
2010-06-24 22:04:30 +00:00
3808684055
Use the struct tags mandated by ARM's ABI. Also use the public type names for
...
the array fields in these structs.
llvm-svn: 106794
2010-06-24 22:03:41 +00:00
337e8db712
Add support for the x86 instructions "pusha" and "popa".
...
llvm-svn: 106671
2010-06-23 20:00:58 +00:00
30a28d6588
Fix a tblgen bug.
...
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
(mem_frag addr:$src2))))];
The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
(mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
(mem_frag addr:$src2))))];
Fix this by passing the right name when creating a new DagInit node.
llvm-svn: 106670
2010-06-23 19:50:39 +00:00
99d71d1e7a
Don't link against libm and libpthread which don't exist in BeOS/Haiku. Also,
...
Haiku like Linux provides <regex.h>, so use it. Patch by Paul Davey!
llvm-svn: 106620
2010-06-23 06:48:34 +00:00
dc883cf45a
Fix a subtle multiclass bug: when using class inheritance on
...
a toplevel 'defm', make sure to properly resolve references.
llvm-svn: 106570
2010-06-22 20:30:50 +00:00
75d4ecb9c3
Remove isTwoAddress from llvm.
...
llvm-svn: 106470
2010-06-21 20:35:09 +00:00
4713628816
Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work.
...
llvm-svn: 106406
2010-06-20 21:09:52 +00:00
a06c2f79fc
An attempt to fix the problem Anton reported with
...
ARM tail calls. Don't know if it works, but it
doesn't break Darwin.
llvm-svn: 106309
2010-06-18 20:44:28 +00:00
23f8321cbc
Teach tablegen how to inherit from classes in 'defm' definitions.
...
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.
llvm-svn: 106305
2010-06-18 19:53:41 +00:00
882bb2984e
Start TargetRegisterClass indices at 0 instead of 1, so that
...
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.
llvm-svn: 106296
2010-06-18 18:13:55 +00:00
deb2002cee
In case Rec is a definition and not a class, do the proper comparison!
...
llvm-svn: 106246
2010-06-17 23:00:16 +00:00
256b5a2bff
Modify tablegen to support generating all NEON code used by clang at once.
...
llvm-svn: 106207
2010-06-17 04:15:13 +00:00
7f4235d1ba
Fix the handling of !if result, avoiding null results for non 'int'.
...
llvm-svn: 106201
2010-06-17 01:50:39 +00:00
4d1d798736
For a tablegen expression such as !if(a,b,c), let 'a'
...
be evaluated for 'bit' operators
llvm-svn: 106185
2010-06-17 00:31:36 +00:00
0f184c0328
Fix the typo in my previous one-line commit.
...
llvm-svn: 106179
2010-06-17 00:10:16 +00:00
873f7aff62
Make sure CMake can build the files added by my previous commit.
...
llvm-svn: 106178
2010-06-16 23:52:37 +00:00
842eb0905e
Add preliminary clang attribute generation support.
...
The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.
llvm-svn: 106174
2010-06-16 23:45:50 +00:00
77a4a56251
let the '!eq' expression support 'int' and 'bit' types
...
llvm-svn: 106171
2010-06-16 23:24:12 +00:00
26cefa5e11
Make VC++ happy
...
llvm-svn: 106054
2010-06-15 22:10:31 +00:00
44f9dfc9cf
Next round of tail call changes. Register used in a tail
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call must not be callee-saved; following x86, add a new
regclass to represent this. Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.
llvm-svn: 106053
2010-06-15 22:08:33 +00:00
24fdd22766
generate better code in CheckComplexPattern
...
llvm-svn: 105970
2010-06-14 22:33:34 +00:00
ac2aac1860
Add the last of the SemaChecking-gen code.
...
llvm-svn: 105929
2010-06-14 05:17:23 +00:00
444e9f0a35
Add a helping of comments
...
Add code for generating bits of semachecking
llvm-svn: 105907
2010-06-13 04:47:03 +00:00
05466ef7eb
declare a class with 'class' instead of struct to avoid tag mismatch
...
warnings, and don't shift by a bool. Patch by Rizky Herucakra!
llvm-svn: 105886
2010-06-12 15:46:56 +00:00
b90b010a2d
Add generic vector support for bitselect & element byteswap
...
llvm-svn: 105874
2010-06-12 03:09:49 +00:00
fd5458d4bd
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
...
Introduce the VEX_X field
llvm-svn: 105859
2010-06-11 23:50:47 +00:00
6eae520de9
Add instruction encoding for the Neon VMOV immediate instruction. This changes
...
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction. This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed. Testcase for the encoding will follow later when MC has
more support for ARM.
llvm-svn: 105836
2010-06-11 21:34:50 +00:00
0e915300e3
Add support for polynomial type, for polynomial multiply
...
llvm-svn: 105792
2010-06-10 18:06:07 +00:00
5f2adccc1b
Teach tablegen to allow "let" expressions inside multiclasses,
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providing more ways to factor out commonality from the records.
llvm-svn: 105776
2010-06-10 02:42:59 +00:00
46e9dc4e6b
NEON support for _lane ops, and multiplies by scalar.
...
llvm-svn: 105769
2010-06-10 00:16:56 +00:00
add2aa009c
Further refine types for operations which take scalars.
...
This will be used primarily by NEON shift intrinsics.
llvm-svn: 105733
2010-06-09 18:02:26 +00:00
223c481b1c
How about ULL...
...
llvm-svn: 105726
2010-06-09 16:16:48 +00:00
8fc7823e4d
Specialize I-Class instructions better so that we have less work to do in codegen.
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Parenthesize macro args
llvm-svn: 105682
2010-06-09 05:11:55 +00:00
86a67bb573
Handle instructions which need to be #defines for the purpose of capturing constant arguments
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Handle extract hi/lo with common code
llvm-svn: 105666
2010-06-09 01:09:00 +00:00
c2f87b7bb2
Reapply r105521, this time appending "LLU" to 64 bit
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immediates to avoid breaking the build.
llvm-svn: 105652
2010-06-08 22:51:23 +00:00
d80ce4f861
Fix a valgrind error.
...
llvm-svn: 105600
2010-06-08 07:11:17 +00:00
8615667bac
Refine BuiltinsARM.def types a bit, we should do a better job of this to save some c++ code in CGBuiltins.
...
llvm-svn: 105598
2010-06-08 06:01:16 +00:00
fe123268a9
ARM NEON:
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fix vcvt naming
handle vdup, vcombine with generic vector code
llvm-svn: 105588
2010-06-08 00:14:42 +00:00
12d1f62f6c
clang codegen support
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llvm-svn: 105531
2010-06-07 16:00:37 +00:00
fdd2614330
revert r105521, which is breaking the buildbots with stuff like this:
...
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
llvm-svn: 105524
2010-06-05 04:17:30 +00:00
594fa26317
Initial AVX support for some instructions. No patterns matched
...
yet, only assembly encoding support.
llvm-svn: 105521
2010-06-05 03:53:24 +00:00
c4f614870f
Teach tablegen to support 'defm' inside multiclasses.
...
llvm-svn: 105519
2010-06-05 02:11:52 +00:00
7090e5be2b
Handle multi-vector returns and args.
...
llvm-svn: 105496
2010-06-04 22:53:30 +00:00
0d081df3f2
Additional fixes to BuiltinsARM.def generator, on to clang codegen.
...
llvm-svn: 105488
2010-06-04 21:36:00 +00:00
878bdccea6
Progress on generating BuiltinsARM.def, still some duplicates to work out.
...
llvm-svn: 105461
2010-06-04 07:11:25 +00:00
1ca8dba557
BuiltinsARM.def emitter, still needs a substantial bit of tweaking to lighten the load on clang.
...
llvm-svn: 105456
2010-06-04 01:26:15 +00:00
03d6e4961c
Mangle __builtin_neon_* names appropriately.
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Add skeleton of support for emitting the list of prototypes for BuiltinsARM.def
llvm-svn: 105443
2010-06-04 00:21:41 +00:00
64b76bd4f7
Add some additional capabilities to the neon emitter
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llvm-svn: 105416
2010-06-03 21:35:22 +00:00
d679ff7330
Early implementation of tail call for ARM.
...
A temporary flag -arm-tail-calls defaults to off,
so there is no functional change by default.
Intrepid users may try this; simple cases work
but there are bugs.
llvm-svn: 105413
2010-06-03 21:09:53 +00:00
11d56c55c4
arm_neon.h now makes it through clang and generates appropriate code for those functions which can use
...
generic vector operators rather than __builtin_neon_*
llvm-svn: 105380
2010-06-03 04:04:09 +00:00
7db953e396
arm_neon.h emitter now mostly complete for the purposes of initial testing.
...
llvm-svn: 105349
2010-06-02 21:53:00 +00:00
9242162bb1
Pacify recent gcc: remove a pointless const qualifier.
...
llvm-svn: 105318
2010-06-02 08:37:30 +00:00
68d0518b92
Checkpoint; handle 'int' and 'void' correctly
...
llvm-svn: 105316
2010-06-02 07:14:28 +00:00
d86d60f91d
Emit full function prototypes. Definitions & typedefs to come.
...
llvm-svn: 105315
2010-06-02 06:17:19 +00:00
469bb2be2c
Checkpoint arm_neon.h generation with tablegen
...
llvm-svn: 105307
2010-06-02 00:34:55 +00:00
6e1690bdd8
Fix comment
...
llvm-svn: 105297
2010-06-01 23:29:39 +00:00
c943c52073
Allow for creation of clang DeclNodes tables.
...
The StmtNodes generator has been generalized to allow for the
creation of DeclNodes tables as well, and another emitter was
added for DeclContexts.
llvm-svn: 105164
2010-05-30 07:21:42 +00:00
417fc5e434
Emit TargetRegisterInfo::composeSubRegIndices().
...
Also verify that all subregister indices compose unambiguously.
llvm-svn: 105064
2010-05-28 23:48:31 +00:00
2c3a196d16
Comment out some code in prep for actual .td file checkpoint.
...
llvm-svn: 104927
2010-05-28 02:19:08 +00:00
48be842592
Fix build breakage.
...
llvm-svn: 104912
2010-05-28 01:15:28 +00:00
dd5904687f
Add support to tablegen for auto-generating arm_neon.h from a tablegen description
...
of the intrinsics. The goal is to auto-generate both support for GCC-style (vector)
and ARM-style (struct of vector) intrinsics.
This is work in progress, but will be completed soon.
llvm-svn: 104910
2010-05-28 01:08:32 +00:00
c6e5a4c68f
Simplify raw_ostream usage.
...
llvm-svn: 104874
2010-05-27 19:48:08 +00:00
388fa73f03
Minor code simplification.
...
llvm-svn: 104845
2010-05-27 16:25:05 +00:00
97ac3afac2
AsmMatcher: Ensure classes are totally ordered, so we can std::sort them reliably.
...
llvm-svn: 104806
2010-05-27 05:31:32 +00:00
731440b62b
Check that inherited subregisters all have a direct SubRegIndex.
...
llvm-svn: 104755
2010-05-26 22:15:07 +00:00
d1d7ed63ff
Add StringRef::compare_numeric and use it to sort TableGen register records.
...
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...
llvm-svn: 104745
2010-05-26 21:47:28 +00:00
3113970675
Suppress emmission of empty subreg/superreg/alias sets.
...
llvm-svn: 104741
2010-05-26 21:35:55 +00:00
7de379467e
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104704
2010-05-26 17:27:12 +00:00
50eec620f4
Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
...
This reverts commit 104654.
llvm-svn: 104660
2010-05-26 01:21:14 +00:00
0b0274524c
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104654
2010-05-26 00:28:19 +00:00
66c939a2ca
Drop the SuperregHashTable. It is essentially the same as SubregHashTable.
...
llvm-svn: 104650
2010-05-25 23:43:18 +00:00
1ad0d5e25b
Print symbolic SubRegIndex names on machine operands.
...
llvm-svn: 104628
2010-05-25 19:49:38 +00:00
3b59e0601e
Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.
...
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.
Then I'll remove NumberHack entirely.
llvm-svn: 104615
2010-05-25 17:21:04 +00:00
fdb25de17e
Switch SubRegSet to using symbolic SubRegIndices
...
llvm-svn: 104571
2010-05-24 23:03:18 +00:00
76b3de92f2
diaggroup categories should take precedence over diag-specific groups.
...
llvm-svn: 104567
2010-05-24 21:55:47 +00:00
edab242488
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
...
structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
llvm-svn: 104563
2010-05-24 21:46:58 +00:00
1c69646e99
Add the SubRegIndex TableGen class.
...
This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.
llvm-svn: 104492
2010-05-24 14:48:12 +00:00
346782c12c
tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.
...
llvm-svn: 104452
2010-05-22 21:02:29 +00:00
5661c0c755
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
...
it.
llvm-svn: 104270
2010-05-20 20:20:32 +00:00
7dfbb1faf1
Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro
...
Also rename ABSTRACT to ABSTRACT_STMT
llvm-svn: 104018
2010-05-18 06:22:50 +00:00
cd67c21407
Added a QQQQ register file to model 4-consecutive Q registers.
...
llvm-svn: 103760
2010-05-14 02:13:41 +00:00
670a4104a9
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
...
llvm-svn: 103746
2010-05-13 23:55:47 +00:00
89e5635a7c
Update tablegen to generate shorts instead of chars for subgroup arrays.
...
llvm-svn: 103704
2010-05-13 07:43:47 +00:00
1a1b51ff59
Add initial kill flag support to FastISel.
...
llvm-svn: 103529
2010-05-11 23:54:07 +00:00
6739a89117
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
...
llvm-svn: 103457
2010-05-11 06:17:44 +00:00
e7e1cf9fbd
Eliminated the classification of control registers into %ecr_
...
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.
llvm-svn: 103196
2010-05-06 20:59:00 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
31cdcd46d6
Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.
...
llvm-svn: 103172
2010-05-06 06:36:08 +00:00
41e9f77628
Fix some stylistic issues with my last commit.
...
llvm-svn: 103164
2010-05-06 05:24:38 +00:00
e8282890ec
Add newline to end of file to avoid warning
...
when building llvm with clang
llvm-svn: 103084
2010-05-05 13:56:46 +00:00
40dde1ac92
Include the right header for toupper
...
llvm-svn: 103073
2010-05-05 04:31:44 +00:00
f4cdc84160
Add an emitter to handle the list of clang statement nodes.
...
llvm-svn: 103071
2010-05-05 04:13:08 +00:00
b3d221964b
add the ability to associate 'category' names with clang diagnostics
...
and diagnostic groups. This allows the compiler to group
diagnostics together (e.g. "Logic Warning",
"Format String Warning", etc) like the static analyzer does.
This is not exposed through anything in the compiler yet.
llvm-svn: 103050
2010-05-04 20:44:23 +00:00
9989417f33
MC/Matcher: Add support for over-riding the default MatchInstruction function
...
name (for example, to allow targets to interpose the actual MatchInstruction
function).
llvm-svn: 102987
2010-05-04 00:33:13 +00:00
66561537f5
Add a pseudo instruction REG_SEQUENCE that takes a list of registers and
...
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.
This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.
This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.
Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
= use v1024
= use v1028
But this adds pseudo live interval overlap between v1024 and v1025.
We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
= use v1024
= use v1026
After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
= use v1026<3>
= use v1026
llvm-svn: 102815
2010-05-01 00:28:44 +00:00
85d70594f0
Fixes to edis that mark x86 call targets as
...
memory operands rather than immediate operands.
llvm-svn: 102217
2010-04-23 22:17:17 +00:00
d7209d2d56
When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
...
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.
llvm-svn: 101929
2010-04-20 18:45:24 +00:00
5debc33168
stop computing InstImpInputs, it is dead
...
llvm-svn: 101881
2010-04-20 06:30:25 +00:00
9dc68d31fd
DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.
...
llvm-svn: 101880
2010-04-20 06:28:43 +00:00
7d62e33291
Make processor FUs unique for given itinerary. This extends the limit of 32
...
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
b29cda9b3c
Fix a bunch of namespace polution.
...
llvm-svn: 101376
2010-04-15 17:08:50 +00:00
a050255103
EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways.
...
llvm-svn: 101241
2010-04-14 13:56:38 +00:00
814e69b171
Fixed a nasty layering violation in the edis source
...
code. It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.
Also removed hacky #define-controlled initialization
of targets in edis. If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.
llvm-svn: 101179
2010-04-13 21:21:57 +00:00
4e8bd58001
If all the bit positions are not specified; do not decode the instructions.
...
We are bound to fail! For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.
This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.
llvm-svn: 100899
2010-04-09 21:01:02 +00:00
0106063556
Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets
...
such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.
llvm-svn: 100892
2010-04-09 20:41:18 +00:00
298a122fb4
ARM decoder emitter should print out useful information unconditionally when it
...
encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro.
llvm-svn: 100886
2010-04-09 19:31:33 +00:00
75f82345c4
Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code
...
to avoid memcpy() call is no longer necessary.
llvm-svn: 100811
2010-04-08 21:23:54 +00:00
53dd088b58
Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free.
...
llvm-svn: 100767
2010-04-08 15:25:57 +00:00
634d9ff7c0
Use errs instead of fprintf.
...
llvm-svn: 100754
2010-04-08 09:42:29 +00:00
03549ee5af
Added support for ARM disassembly to edis.
...
I also added a rule to the ARM target's Makefile to
build the ARM-specific instruction information table
for the enhanced disassembler.
I will add the test harness for all this stuff in
a separate commit.
llvm-svn: 100735
2010-04-08 00:48:21 +00:00
2104b8d36e
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
1efe661b46
Fixed a bug where the disassembler would allow an immediate
...
argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter. Now, the
disassembler rejects instructions with out-of-range values
for that immediate.
llvm-svn: 100694
2010-04-07 21:42:19 +00:00
978d33a937
Fix typo and correct comment somewhat.
...
llvm-svn: 100691
2010-04-07 20:58:16 +00:00
4e2f8722c4
Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in
...
ARMDecoderEmitter.cpp, with FIXME comment.
llvm-svn: 100690
2010-04-07 20:53:12 +00:00
0bdc6345e8
Initial support for different kinds of FU reservation.
...
llvm-svn: 100645
2010-04-07 18:19:32 +00:00
b93331f3be
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
...
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
llvm-svn: 100384
2010-04-05 03:10:20 +00:00
76c564b1bb
change a ton of code to not implicitly use the "O" raw_ostream
...
member of AsmPrinter. Instead, pass it in explicitly.
llvm-svn: 100306
2010-04-04 04:47:45 +00:00
77074b1378
Fix a warning in GCC about a pointless typedef.
...
llvm-svn: 100268
2010-04-03 04:45:24 +00:00
89c787b906
Add the new ARMDecodeEmitter to CMake build.
...
llvm-svn: 100267
2010-04-03 04:36:43 +00:00
dbdd3f8b09
Move variable "Bits" declaration/definition into the DEBUG block where its usage
...
is expected.
llvm-svn: 100247
2010-04-02 23:13:52 +00:00
7d363b63fd
Fixed build warning.
...
llvm-svn: 100244
2010-04-02 22:51:04 +00:00
88a7b5a724
Change from .../Support/DataTypes.h to .../System/DataTypes.h.
...
(Fix build failure)
llvm-svn: 100243
2010-04-02 22:41:06 +00:00
7b999ea7b7
Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
...
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.
Reviewed by Chris Latter and Bob Wilson.
llvm-svn: 100233
2010-04-02 22:27:38 +00:00
f91869b619
Switch pattern sorting predicate from stable sort -> sort, it
...
doesn't need to be stable because the patterns are fully ordered.
Add a first level sort predicate that orders patterns in this
order: 1) scalar integer operations 2) scalar floating point
3) vector int 4) vector float. This is a trivial sort on their
top level pattern type so it is nice and transitive. The
benefit of doing this is that simple integer operations are
much more common than insane vector things and isel was trying
to match the big complex vector patterns before the simple
ones because the complexity of the vector operations was much
higher. Since they can't both match, it is best (for compile
time) to try the simple integer ones first.
This cuts down the # failed match attempts on real code by
quite a bit, for example, this reduces backtracks on crafty
(as a random example) from 228285 -> 188369.
llvm-svn: 99797
2010-03-29 02:02:45 +00:00
41a15141c9
revert 99795, as mentioned, it is disabled anyway.
...
llvm-svn: 99796
2010-03-29 01:58:15 +00:00
a79260151f
Check in a (disabled) failed attempt to improve the ordering of
...
patterns within the generated matcher. This works great except
that the sort fails because the relation defined isn't
transitive. I have a much simpler solution coming next, but want
to archive the code.
llvm-svn: 99795
2010-03-29 01:56:19 +00:00
05925fe1fe
print the complexity of the pattern being matched in the
...
comment in the generated table.
llvm-svn: 99794
2010-03-29 01:40:38 +00:00
135091bd9d
improve type checking of SDNode operand count. This rejects all cases
...
where an incorrect number of operands is provided to an sdnode instead
of just a few cases.
llvm-svn: 99761
2010-03-28 08:48:47 +00:00
6642118e83
finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
...
and those derived from them. These are obnoxious because
they were written as: PatLeaf<(bitconvert). Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)
llvm-svn: 99759
2010-03-28 08:43:23 +00:00
a787c9e23a
teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4),
...
transforming it into (add (i32 GPR), 4). This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align. This allows us to fold an extra load
in the changed testcase.
llvm-svn: 99756
2010-03-28 08:38:32 +00:00
2e9eae1fa2
validate that input sdnodes don't exist in an output pattern.
...
llvm-svn: 99747
2010-03-28 06:57:56 +00:00
adf7ecf9d3
eliminate a bunch of code duplication in ParseTreePattern
...
by rotating it.
llvm-svn: 99746
2010-03-28 06:50:34 +00:00
ffdac7b76a
SDTCisVT<0, isVoid> is not valid, reject it.
...
llvm-svn: 99744
2010-03-28 06:04:39 +00:00
49e2773dd8
add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and
...
1, 1 cases which are by-far the most frequent. This shrinks the X86
isel table from 77014 -> 74657 bytes.
llvm-svn: 99740
2010-03-28 05:50:16 +00:00
725d3f6219
fix a long standing fixme, which required fixing a bunch of other
...
issues to get here. We now trim the result type list of the
CompleteMatch or MorphNodeTo operation to be the same size as the
thing we're matching. this means that if you match (add GPR, GPR)
with an instruction that produces a normal result and a flag that
we now trim the result in tblgen instead of having to do it
dynamically. This exposed a bunch of inconsistencies in result
counting that happened to be getting lucky since the days of the
old isel.
llvm-svn: 99728
2010-03-27 20:45:15 +00:00
4a5f7be077
fix CodeGenTarget::getRegisterVTs to not return the
...
same vt multiple times for a register. For example,
ECX is in 5 different i32 reg classes, just return
1 i32 instead of 5.
llvm-svn: 99727
2010-03-27 20:32:26 +00:00
7bc5d9b576
hoist some funky logic into CodeGenInstruction
...
from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.
llvm-svn: 99726
2010-03-27 20:09:24 +00:00
d44966f26d
continue pushing tblgen's support for nodes with multiple
...
results forward. We can now handle an instruction that
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.
llvm-svn: 99725
2010-03-27 19:15:02 +00:00
e7e9f06d3b
fix a bug in my recent patch that increased opcode size to 2 bytes:
...
the index comments nested under OPC_SwitchOpcode were off by one.
This fixes the comments.
llvm-svn: 99722
2010-03-27 18:49:33 +00:00
dcc8cd96f2
Remove an unnecessary #include.
...
llvm-svn: 99714
2010-03-27 16:33:36 +00:00
5c2182ef77
remove parallel support.
...
llvm-svn: 99703
2010-03-27 02:53:27 +00:00
f8d7eda663
Teach TableGen to understand X.Y notation in the TSFlagsFields strings.
...
Remove much horribleness from X86InstrFormats as a result. Similar
simplifications are probably possible for other targets.
llvm-svn: 99539
2010-03-25 18:52:01 +00:00
552dddc51c
Change tblgen to emit FOOISD opcode names as two
...
bytes instead of one byte. This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse. This just bites the
bullet and bloats out the table. In practice, this
increases the size of the x86 isel table from 74.5K
to 76K. I think we'll cope :)
This fixes rdar://7791648
llvm-svn: 99494
2010-03-25 06:33:05 +00:00
0e45762250
Fix evil TableGen bug in template parameters with defaults.
...
If a TableGen class has an initializer expression containing an X.Y subexpression,
AND X depends on template parameters,
AND those template parameters have defaults,
AND some parameters with defaults are beyond position 1,
THEN parts of the initializer expression are evaluated prematurely with the default values when the first explicit template parameter is substituted, before the remaining explicit template parameters have been substituted.
llvm-svn: 99492
2010-03-25 06:23:34 +00:00
6c2d178957
add plumbing for handling multiple result nodes
...
in some more places.
llvm-svn: 99366
2010-03-24 00:41:19 +00:00
38c99662ff
implement SDTCisVTSmallerThanOp with EnforceSmallerThan
...
instead of reimplementing it wrong and poorly.
llvm-svn: 99357
2010-03-24 00:06:46 +00:00
57ebf63da7
bring sanity to EnforceVectorEltType
...
llvm-svn: 99354
2010-03-24 00:01:16 +00:00
6070ee2a58
Cleanup getImplicitType
...
llvm-svn: 99353
2010-03-23 23:50:31 +00:00
b424faa09c
reject void in intrinsic type lists.
...
llvm-svn: 99347
2010-03-23 23:46:27 +00:00
2109cb461c
Change intrinsic result type for void to store it as an empty list
...
instead of as a single element list with VoidTy. Now with a fix
for the verifier.
llvm-svn: 99206
2010-03-22 20:56:36 +00:00
d177edf361
Fix suggested parentheses warning.
...
llvm-svn: 99111
2010-03-21 01:38:21 +00:00
3e2bb702db
Revert r99009 temporarily it seems to be breaking the bots.
...
llvm-svn: 99011
2010-03-19 23:04:23 +00:00
933b2cf9a8
Change intrinsic result type for void to store it as an empty list
...
instead of as a single element list with VoidTy.
llvm-svn: 99009
2010-03-19 22:40:56 +00:00
2db7abaa44
make getOperandNum a static function (since it's just used by
...
ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
2010-03-19 21:56:21 +00:00
f144725ebc
major surgery on tblgen: generalize TreePatternNode
...
to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
2010-03-19 21:37:09 +00:00
6d765ebc0d
make FillWithPossibleTypes take a predicate to filter types so that
...
we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
2010-03-19 17:41:26 +00:00
bb34b4e10f
resolve fixme: we now infer the instruction-level 'isvariadic' bit
...
from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
2010-03-19 05:34:15 +00:00
83aeaab462
add a new SDNPVariadic SDNP node flag, and use it in
...
dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
2010-03-19 05:07:09 +00:00
be6b17f927
rewrite EnforceSmallerThan to be less bone headed.
...
llvm-svn: 98933
2010-03-19 04:54:36 +00:00
ec71ba25e5
Fix -Asserts warning.
...
llvm-svn: 98927
2010-03-19 03:18:20 +00:00
da5b4ad03e
eliminate the last use of EEVT::isUnknown
...
llvm-svn: 98918
2010-03-19 01:14:27 +00:00
1802b17b65
Finally change the instruction looking map to be a densemap from
...
record* -> instrinfo instead of std::string -> instrinfo.
This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).
llvm-svn: 98916
2010-03-19 01:07:44 +00:00
4763dbeaf6
make inst_begin/inst_end iterate over InstructionsByEnumValue.
...
Use CodeGenTarget::getInstNamespace in one place and fix it.
llvm-svn: 98915
2010-03-19 01:00:55 +00:00
2d822ab185
revert 98912
...
llvm-svn: 98914
2010-03-19 00:50:47 +00:00
45e2fc5ac1
make inst_begin/inst_end iterate over InstructionsByEnumValue.
...
llvm-svn: 98912
2010-03-19 00:40:22 +00:00
918be520dc
change Target.getInstructionsByEnumValue to return a reference
...
to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
2010-03-19 00:34:35 +00:00
c9ae94c793
factor copy and paste code.
...
llvm-svn: 98908
2010-03-19 00:23:20 +00:00
70eb897d7c
don't go through getInstructions().
...
llvm-svn: 98906
2010-03-19 00:18:23 +00:00
9aec14b560
look up instructions by record, not by name.
...
llvm-svn: 98904
2010-03-19 00:07:20 +00:00
63a627cd88
expand tblgen's support for instructions with implicit defs.
...
llvm-svn: 98900
2010-03-18 23:57:40 +00:00
fdc20711e8
infer results of a pattern from implicit defs. This allows you to do something
...
like this:
def : Pat<(add ...),
(FOOINST)>;
When fooinst only has a single implicit def (e.g. to R1). This will be handled
as if written as (set R1, (FOOINST ...))
llvm-svn: 98897
2010-03-18 23:15:10 +00:00
2130a3e0af
capture implicit uses and defs in CodeGenInstruction
...
llvm-svn: 98879
2010-03-18 21:42:03 +00:00
13590892e7
simplify this code, the # of sets in the pattern for an instruction
...
shouldn't change this.
llvm-svn: 98872
2010-03-18 21:15:05 +00:00
81fd1f20ba
disallow concatenation of two dags with different operators.
...
llvm-svn: 98871
2010-03-18 21:07:51 +00:00
1f22d278f3
rewrite this to not artificially force concat the ins/outs list.
...
llvm-svn: 98870
2010-03-18 21:07:39 +00:00
0f03747577
eliminate support for "ops" in the input/output list of an
...
instruction. Instructions must use 'ins' and 'outs' now.
llvm-svn: 98868
2010-03-18 20:56:35 +00:00
5f418eafdc
remove some code that was working around old sparc v9 backend bugs.
...
Add checking that the input/output operand list in spelled right.
llvm-svn: 98865
2010-03-18 20:50:52 +00:00
451a435473
MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,
...
to allow custom post-processing of matched instructions.
llvm-svn: 98857
2010-03-18 20:05:56 +00:00
dae75defc8
Add an extra newline to separate PP directives from the contents
...
llvm-svn: 98820
2010-03-18 13:16:38 +00:00
1b4e8cc69c
--- Reverse-merging r98637 into '.':
...
U test/CodeGen/ARM/tls2.ll
U test/CodeGen/ARM/arm-negative-stride.ll
U test/CodeGen/ARM/2009-10-30.ll
U test/CodeGen/ARM/globals.ll
U test/CodeGen/ARM/str_pre-2.ll
U test/CodeGen/ARM/ldrd.ll
U test/CodeGen/ARM/2009-10-27-double-align.ll
U test/CodeGen/Thumb2/thumb2-strb.ll
U test/CodeGen/Thumb2/ldr-str-imm12.ll
U test/CodeGen/Thumb2/thumb2-strh.ll
U test/CodeGen/Thumb2/thumb2-ldr.ll
U test/CodeGen/Thumb2/thumb2-str_pre.ll
U test/CodeGen/Thumb2/thumb2-str.ll
U test/CodeGen/Thumb2/thumb2-ldrh.ll
U utils/TableGen/TableGen.cpp
U utils/TableGen/DisassemblerEmitter.cpp
D utils/TableGen/RISCDisassemblerEmitter.h
D utils/TableGen/RISCDisassemblerEmitter.cpp
U Makefile.rules
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/Makefile
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D lib/Target/ARM/Disassembler
U lib/Target/ARM/ARMInstrFormats.td
U lib/Target/ARM/ARMAddressingModes.h
U lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm-svn: 98640
2010-03-16 16:59:47 +00:00
3d9327bd06
Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend
...
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.
We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60.
And modified test cases to not expect '+' in +reg or #+num. For example,
; CHECK: ldr.w r9, [r7, #28 ]
llvm-svn: 98637
2010-03-16 16:36:54 +00:00
f57437abb1
don't form a RecordChild or CheckChildType for child #'s over 7, we don't
...
have enums for them.
llvm-svn: 98597
2010-03-16 00:35:11 +00:00
0db1d6500a
eliminate some #if 0 code I added in r96905, type inference
...
now enforces that input/output named values have hte same type.
llvm-svn: 98535
2010-03-15 06:03:22 +00:00
cabe037b2d
Completely rewrite tblgen's type inference mechanism,
...
changing the primary datastructure from being a
"std::vector<unsigned char>" to being a new TypeSet class
that actually has (gasp) invariants!
This changes more things than I remember, but one major
innovation here is that it enforces that named input
values agree in type with their output values.
This also eliminates code that transparently assumes (in
some cases) that SDNodeXForm input/output types are the
same, because this is wrong in many case.
This also eliminates a bug which caused a lot of ambiguous
patterns to go undetected, where a register class would
sometimes pick the first possible type, causing an
ambiguous pattern to get arbitrary results.
With all the recent target changes, this causes no
functionality change!
llvm-svn: 98534
2010-03-15 06:00:16 +00:00
44be5362d6
Check in tablegen changes to fix disassembler related failures caused by r98465.
...
llvm-svn: 98468
2010-03-14 05:15:39 +00:00
e96802e6ed
Node arguments to type casts can have names too. This code
...
needs to be majorly refactored, but this spot bugfix allows
things like:
def vmrghw_shuffle : PatFrag<(ops node:$lhs, node:$rhs),
(vector_shuffle (v4i32 node:$lhs), node:$rhs), [{
...
llvm-svn: 97952
2010-03-08 18:36:19 +00:00
c95d58d31a
turn off debug spew
...
llvm-svn: 97912
2010-03-07 07:21:24 +00:00
a160389290
more factoring.
...
llvm-svn: 97911
2010-03-07 07:20:49 +00:00
b9071a2d5d
teach tblgen to be more aggressive when factoring CheckType nodes.
...
Now it will factor things like this:
CheckType i32
...
CheckOpcode ISD::AND
CheckType i64
...
into:
SwitchType:
i32: ...
i64:
CheckOpcode ISD::AND
...
This shrinks hte table by a few bytes, nothing spectacular.
llvm-svn: 97908
2010-03-07 07:01:28 +00:00
9c791d872a
add some helper functions and implement isContradictory
...
for CheckValueTypeMatcher. The isContradictory implementation
helps us factor better, shrinking x86 table from 79144 -> 78896
bytes.
llvm-svn: 97905
2010-03-07 06:29:26 +00:00
a764083db3
Make it not an error to specify -O* options several times.
...
As in 'llvmc -O2 -O2 test.c'.
llvm-svn: 97787
2010-03-05 04:46:39 +00:00
127b8c9e53
so hey, it turns out that the histogram was completely wrong, because
...
we sometimes emit nodes multiple times to string buffers to size them.
Compute the histogram correctly.
llvm-svn: 97708
2010-03-04 01:34:29 +00:00
3f0f71955d
zap fixme.
...
llvm-svn: 97705
2010-03-04 01:26:00 +00:00
0e2cedb762
now that complexpatterns are all emitted at the end of the match
...
sequence, just emit instruction predicates right before them. This
exposes yet more factoring opportunitites, shrinking the X86 table
to 79144 bytes.
llvm-svn: 97704
2010-03-04 01:25:36 +00:00
0acbb71bad
change the new isel matcher to emit ComplexPattern matches
...
as the very last thing before node emission. This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time. This also improves comments
in the tables and shrinks the table a bit, now down to
80506 bytes for x86.
llvm-svn: 97703
2010-03-04 01:23:08 +00:00
90e1c5fa44
enhance comment output to specify what recorded slot
...
numbers a ComplexPat will match into.
llvm-svn: 97696
2010-03-04 00:28:05 +00:00
3e1ffd06fc
introduce a new SwitchTypeMatcher node (which is analogous to
...
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it. This
speeds up selection, particularly for X86 which has lots of
variants of instructions with only type differences.
llvm-svn: 97645
2010-03-03 06:28:15 +00:00
fb8c2b2f57
the sorting predicate should work for comparing an element
...
to itself, even though this isn't wildly useful.
llvm-svn: 97574
2010-03-02 18:15:02 +00:00
58811e7732
eliminate CodeGen/DAGISelHeader.h, it is empty now.
...
llvm-svn: 97556
2010-03-02 06:36:28 +00:00
b884fe867e
Rewrite chain handling validation and input TokenFactor handling
...
stuff now that we don't care about emulating the old broken
behavior of the old isel. This eliminates the
'CheckChainCompatible' check (along with IsChainCompatible) which
did an incorrect and inefficient scan *up* the chain nodes which
happened as the pattern was being formed and does the validation
at the end in HandleMergeInputChains when it forms a structural
pattern. This scans "down" the graph, which means that it is
quickly bounded by nodes already selected. This also handles
token factors that get "trapped" in the dag.
Removing the CheckChainCompatible nodes also shrinks the
generated tables by about 6K for X86 (down to 83K).
There are two pieces remaining before I can nuke PreprocessRMW:
1. I xfailed a test because we're now producing worse code in a
case that has nothing to do with the change: it turns out that
our use of MorphNodeTo will leave dead nodes in the graph
which (depending on how the graph is walked) end up causing
bogus uses of chains and blocking matches. This is really
bad for other reasons, so I'll fix this in a follow-up patch.
2. CheckFoldableChainNode needs to be improved to handle the TF.
llvm-svn: 97539
2010-03-02 02:22:10 +00:00
4b07568a56
add some missing \n's
...
llvm-svn: 97527
2010-03-02 00:13:03 +00:00
3144e66377
fixme resolved.
...
llvm-svn: 97517
2010-03-01 23:08:51 +00:00
bd6e193f54
remove a little hack I did for the old isel, not needed
...
now that it is gone.
llvm-svn: 97516
2010-03-01 22:51:11 +00:00
3d869722b6
resolve some fixmes
...
llvm-svn: 97515
2010-03-01 22:49:06 +00:00
281827286e
resolve a fixme and simplify code by moving insertion of the
...
EmitMergeInputChainsMatcher node up into EmitResultCode. This
doesn't have much of an effect on the generated code, the X86
table is exactly the same size.
llvm-svn: 97514
2010-03-01 22:46:42 +00:00
1e634e31de
resolve a fixme by having the .td file parser reject thigns like
...
(set GPR, somecomplexpattern)
if somecomplexpattern doesn't declare what it can match.
llvm-svn: 97513
2010-03-01 22:29:19 +00:00
00f2e4b6d6
remove dead code, simplify.
...
llvm-svn: 97510
2010-03-01 22:19:47 +00:00
d39f75ba39
Fix PR2590 by making PatternSortingPredicate actually be
...
ordered correctly. Previously it would get in trouble when
two patterns were too similar and give them nondet ordering.
We force this by using the record ID order as a fallback.
The testsuite diff is due to alpha patterns being ordered
slightly differently, the change is a semantic noop afaict:
< lda $0,-100($16)
---
> subq $16,100,$0
llvm-svn: 97509
2010-03-01 22:09:11 +00:00
664ac989ff
tolerate factoring the *last* node for CellSPU.
...
llvm-svn: 97508
2010-03-01 22:04:33 +00:00
33758dcad2
optimize tblgen compile time by eliminating the old isel.
...
llvm-svn: 97504
2010-03-01 21:49:54 +00:00
94fd3388b0
don't emit the old sdnodexform stuff for the new isel.
...
llvm-svn: 97486
2010-03-01 19:39:15 +00:00
2563e83759
Turn on the new isel by default. Here are some fun numbers
...
with a release-asserts build on x86-64-darwin10:
LLC Size:
Old: 15,426,852
New: 12,759,140 (down 2.7M)
LLI Size:
Old: 9,926,876
New: 8,864,292 (down 1.1M)
X86ISelDAGToDAG.o size:
Old: 1,401,232
New: 162,868 (down 1.3M)
Time to build X86ISelDAGToDAG.o:
Old: 67.147u 2.060s 1:09.78
New: 4.234u 0.387s 0:04.77
llvm-svn: 97475
2010-03-01 19:05:25 +00:00
04a0eab01b
Missed a \n in previous commit.
...
llvm-svn: 97472
2010-03-01 19:00:55 +00:00
12b02282d9
Add command-line flag to tblgen to turn off generating comments for the new
...
isel (defaults it to generate comments).
This reduces the size of the generated source file.
llvm-svn: 97470
2010-03-01 18:49:10 +00:00
86878b4a1e
Emit type checks late instead of early, this encourages
...
structural matching code to be factored and shared this
shrinks the X86 isel table from 86537 to 83890 bytes.
llvm-svn: 97442
2010-03-01 07:54:59 +00:00
a44697c394
Emit a redundant check for immediates at root context, e.g. (imm 0).
...
This allows formation of OpcodeSwitch for top level patterns, in
particular on X86. This saves about 1K of data space in the x86
table and makes the dispatch much more efficient.
llvm-svn: 97440
2010-03-01 07:27:07 +00:00
053a28a397
eliminate the CheckMultiOpcodeMatcher code and have each
...
ComplexPattern at the root be generated multiple times, once
for each opcode they are part of. This encourages factoring
because the opcode checks get treated just like everything
else in the matcher.
llvm-svn: 97439
2010-03-01 07:17:40 +00:00
f4d1775263
add a new OPC_SwitchOpcode which is semantically equivalent
...
to a scope where every child starts with a CheckOpcode, but
executes more efficiently. Enhance DAGISelMatcherOpt to
form it.
This also fixes a bug in CheckOpcode: apparently the SDNodeInfo
objects are not pointer comparable, we have to compare the
enum name.
llvm-svn: 97438
2010-03-01 06:59:22 +00:00
db5b73a77f
pull MarkFlagResult out from between an EmitNode/CompleteMatch
...
pair. This encourages MorphNodeTo formation, this gets us 200
more MorphNodeTo's on X86 and shrinks the table a bit.
llvm-svn: 97434
2010-03-01 02:33:14 +00:00
4634d9beef
enhance RecordNode and RecordChild comments to indicate what
...
slot they're recording into, no functionality change.
llvm-svn: 97433
2010-03-01 02:24:17 +00:00
90b1b9d984
Emit redundant opcode checks for andimm and orimm tests at root
...
so that we get grouping at the top level.
Add an optimization to reorder type check & record nodes
after opcode checks. We prefer to expose tree shape
matching which improves grouping and will enhance the next
optimization.
llvm-svn: 97432
2010-03-01 02:15:34 +00:00
58e7dad842
inline the node transforms and node predicates into the generated
...
dispatcher method. This eliminates the dependence of the new isel's
generated code on the old isel's predicates, however some random
hand written isel code still uses them.
llvm-svn: 97431
2010-03-01 01:54:19 +00:00
560169d5c4
simplify some code now that chain/flag results are not stored in
...
the vtlist for emitnode.
llvm-svn: 97429
2010-02-28 23:00:47 +00:00
d86751711d
don't emit useless functions. These were producing
...
warnings in release-assert builds if there were no cases.
llvm-svn: 97428
2010-02-28 22:57:03 +00:00
d303a365df
change a few opcodes to use VBRs instead of embedding
...
immediate sizes into the opcode.
llvm-svn: 97423
2010-02-28 22:14:32 +00:00
a838264af1
enhance the EmitNode/MorphNodeTo operands to take a bit that
...
specifies whether there is an output flag or not. Use this
instead of redundantly encoding the chain/flag results in the
output vtlist.
llvm-svn: 97419
2010-02-28 21:53:42 +00:00
9d67dcadce
use MorphNodeTo instead of SelectNodeTo. SelectNodeTo
...
is just a silly wrapper around MorphNodeTo.
llvm-svn: 97416
2010-02-28 20:55:18 +00:00
102a8a01e6
enhance the new isel to use SelectNodeTo for most patterns,
...
even some the old isel didn't. There are several parts of
this that make me feel dirty, but it's no worse than the
old isel. I'll clean up the parts I can do without ripping
out the old one next.
llvm-svn: 97415
2010-02-28 20:49:53 +00:00
abb1c7912e
enhance EmitNodeMatcher to keep track of the recorded slot numbers
...
it will populate.
llvm-svn: 97363
2010-02-28 02:41:25 +00:00
c3f80e0806
add infrastructure to support forming selectnodeto. Not used yet
...
because I have to go on another detour first.
llvm-svn: 97362
2010-02-28 02:31:26 +00:00
99e53b3b33
Generalize my hack to use SDNodeInfo to find out when a
...
node is always guaranteed to have a particular type
instead of hacking in ISD::STORE explicitly. This allows
us to use implied types for a broad range of nodes, even
target specific ones.
llvm-svn: 97355
2010-02-28 00:22:30 +00:00
8c5d683aa9
The mayHaveSideEffects flag is no longer used.
...
llvm-svn: 97348
2010-02-27 23:47:46 +00:00
278606b06e
change CheckOpcodeMatcher to hold the SDNodeInfo instead of
...
the opcode name. This gives the optimizer more semantic info.
llvm-svn: 97346
2010-02-27 21:48:43 +00:00
fb2a0f20dd
add another case from the ppc backend. This is obviously a huge and
...
dissatisfying hack. TODO: Improve it. :)
llvm-svn: 97317
2010-02-27 08:19:47 +00:00
21a7bf3fab
fix logic in DEBUG.
...
llvm-svn: 97315
2010-02-27 08:13:23 +00:00
2586c86a8a
teach the optimizer that opcode == ISD::STORE is contradictory
...
with getType() == MVT::i32 etc. Teach it that two different
integer constants are contradictory. This cuts 1K off the X86
table, down to 98k
llvm-svn: 97314
2010-02-27 08:11:15 +00:00
c577b816fc
Teach the grouper some simple tricks about looking contradictory
...
predicates. For example if we have:
Scope:
CheckType i32
ABC
CheckType f32
DEF
CheckType i32
GHI
Then we know that we can transform this into:
Scope:
CheckType i32
Scope
ABC
GHI
CheckType f32
DEF
This reorders the check for the 'GHI' predicate above
the check for the 'DEF' predidate. However it is safe to do this
in this situation because we know that a node cannot have both an
i32 and f32 type.
We're now doing more factoring that the old isel did.
llvm-svn: 97312
2010-02-27 07:49:13 +00:00
7f28b8e8eb
use DEBUG instead of DebugFlag directly so that this
...
respects -debug-only=something-else.
llvm-svn: 97307
2010-02-27 06:51:44 +00:00
d9e1e83e3b
implement a new optimization to sink pattern predicates (like isSSE1)
...
as deeply into the pattern as we can get away with. In pratice, this
means "all the way to to the emitter code, but not across
ComplexPatterns". This substantially increases the amount of factoring
we get.
llvm-svn: 97305
2010-02-27 06:22:57 +00:00
4835aecd95
add some helpful comments to the emitter
...
llvm-svn: 97219
2010-02-26 08:15:02 +00:00
4f9a671a30
switch from my nice hashtable based merging solution to a
...
gross little neighbor merging implementation. This one has
the benefit of not violating the ordering of patterns, so it
generates code that passes tests again.
llvm-svn: 97218
2010-02-26 08:08:41 +00:00
1ffcde2f3b
fix same bug in CheckChainCompatibleMatcher::isEqualImpl
...
llvm-svn: 97217
2010-02-26 08:06:02 +00:00
a6142a241a
fix a nasty bug in CheckTypeMatcher::isEqualImpl
...
llvm-svn: 97216
2010-02-26 08:05:36 +00:00
be5b634cea
finish off the factoring optimization along the lines of the
...
current design. This generates a matcher that successfully
runs, but it turns out that the factoring we're doing violates
the ordering of patterns, so we end up matching (e.g.) movups
where we want movaps. This won't due, but I'll address this in
a follow on patch. It's nice to not be on by default yet! :)
llvm-svn: 97215
2010-02-26 07:36:37 +00:00
81129177a3
add a new setNumChildren method for resizing scopes. Tweak getHash() so
...
that we never return a tombstone value, which (thankfully) triggers an
assert in densemap.
llvm-svn: 97214
2010-02-26 07:35:27 +00:00
f7fc2d8b86
change the scope node to include a list of children to be checked
...
instead of to have a chained series of scope nodes. This makes
the generated table smaller, improves the efficiency of the
interpreter, and make the factoring optimization much more
reasonable to implement.
llvm-svn: 97160
2010-02-25 19:00:39 +00:00
62702da070
Implement the first half of redundancy factoring: efficiently
...
splitting all the patterns under scope nodes into equality sets
based on their first node. The second step is to rewrite the
graph info a form that exposes the sharing. Before I do this,
I want to redesign the Scope node.
llvm-svn: 97130
2010-02-25 07:45:24 +00:00
1f2adb6f35
factor the print method better.
...
llvm-svn: 97125
2010-02-25 06:53:39 +00:00
212e8c87ae
add methods to do equality checks and get hashes of Matchers
...
llvm-svn: 97123
2010-02-25 06:49:58 +00:00
fef371d2f6
formatting.
...
llvm-svn: 97097
2010-02-25 02:09:00 +00:00
2c3f6492b0
rename fooMatcherNode to fooMatcher.
...
llvm-svn: 97096
2010-02-25 02:04:40 +00:00
c36ab923c6
add some noop code to push it out of my tree.
...
llvm-svn: 97094
2010-02-25 01:57:41 +00:00
ac55f9df88
rename PushMatcherNode -> ScopeMatcherNode to more accurately
...
reflect what it does. Switch the sense of the Next and the Check
arms to be more logical. No functionality change.
llvm-svn: 97093
2010-02-25 01:56:48 +00:00
e03e2fa3ed
add a fixme for an experiment that defeated me for the time being.
...
llvm-svn: 97081
2010-02-25 00:03:03 +00:00
0c95baa848
contract movechild+checktype into a new checkchild node, shrinking the
...
x86 table by 1200 bytes.
llvm-svn: 97053
2010-02-24 20:15:25 +00:00
6b79232138
split the movechild/record/moveparent -> recordchild optzn into a
...
movechild/record -> recordchild/movechild and
movechild/moveparent -> noop xforms. This slightly shrinks the tables
(x86 to 117454) and enables adding future improvements.
llvm-svn: 97051
2010-02-24 19:52:48 +00:00
9203ca8995
emit a histogram of the opcodes in comments.
...
llvm-svn: 97047
2010-02-24 19:17:12 +00:00
739517da07
lets not break the old isel.
...
llvm-svn: 97034
2010-02-24 07:41:11 +00:00
9812470bc4
Since the new instruction selector now works, I don't need to keep
...
the old one around for comparative purposes: have the
ENABLE_NEW_ISEL #define (which is not enabled on mainline) stop
emitting the old isel at all, yay for build time win.
llvm-svn: 97033
2010-02-24 07:35:09 +00:00
ab41756c2e
implement a simple proof-of-concept optimization for
...
the new isel: fold movechild+record+moveparent into a
single recordchild N node. This shrinks the X86 table
from 125443 to 117502 bytes.
llvm-svn: 97031
2010-02-24 07:31:45 +00:00
e7327435a7
The new isel passes all tests, time to start making it go fast.
...
Also add an easy macro at the top of DAGISelEmitter.cpp to enable
it. Lets see if I can avoid accidentally turning it on :)
llvm-svn: 97029
2010-02-24 07:06:50 +00:00
29364373cc
The new isel was not properly handling patterns that covered
...
internal nodes with flag results. Record these with a new
OPC_MarkFlagResults opcode and use this to update the interior
nodes' flag results properly. This fixes CodeGen/X86/i256-add.ll
with the new isel.
llvm-svn: 97021
2010-02-24 05:33:42 +00:00
69c0226ba8
Changed the table generator so that the X86
...
disassembler never recognizes InitReg instructions.
llvm-svn: 97017
2010-02-24 02:56:25 +00:00
f4c5cfac0d
Trailing whitespace.
...
llvm-svn: 96923
2010-02-23 09:05:01 +00:00
3222d94a28
Implement order-preserving option forwarding.
...
Needed to correctly handle things like 'llvmc -framework Foo foo.o -framework
Bar bar.o' - before this commit all '-framework' options would've been grouped
together in the beginning.
Due to our dependence on CommandLine this turned out to be a giant hack; we will
migrate away from CommandLine eventually.
llvm-svn: 96922
2010-02-23 09:04:57 +00:00
a44e838bcb
Correct option forwarding: initial implementation.
...
Does not work, but the infrastructure changes are in place.
llvm-svn: 96920
2010-02-23 09:04:44 +00:00
ebf8fbbb8f
New experimental/undocumented feature: 'works_on_empty'.
...
For now, just enough support to make -filelist work.
llvm-svn: 96918
2010-02-23 09:04:28 +00:00
e499d576a9
Add a way to enable '-opt=foo' forwarding.
...
llvm-svn: 96916
2010-02-23 09:04:13 +00:00
4b9225b41a
add some #if 0'd out code for checking that named values in
...
input/output patterns have the same type. It turns out that
this triggers all the time because we don't infer types
between these boundaries. Until we do, don't turn this on.
llvm-svn: 96905
2010-02-23 07:50:58 +00:00
5b0e24902b
Reject patterns that use a name multiple times in the src or result
...
of a pattern and where the uses have different types.
llvm-svn: 96904
2010-02-23 07:22:28 +00:00
a7722b6f76
reject patterns that have dead named arguments in the input pattern
...
this is tidier and can find bugs.
llvm-svn: 96900
2010-02-23 06:55:24 +00:00
94d3b0a77d
reject patterns that mention a name in the destination pattern
...
but not in the input. Previously, this would trigger an abort
late in the isel logic.
llvm-svn: 96898
2010-02-23 06:35:45 +00:00
0c0baa91a4
merge some code.
...
llvm-svn: 96896
2010-02-23 06:16:51 +00:00
f66b6aa232
more tidying up
...
llvm-svn: 96891
2010-02-23 05:59:10 +00:00
ee820ace06
reduce indentation by eliminating 'else after return'
...
llvm-svn: 96889
2010-02-23 05:51:07 +00:00
addbb0290c
really fix an off-by-one error
...
llvm-svn: 96845
2010-02-23 01:07:39 +00:00
a7d0e304e9
switch the value# in OPC_CompleteMatch and OPC_EmitNode to use a
...
VBR encoding for the insanity being perpetrated by the spu backend.
llvm-svn: 96843
2010-02-23 00:59:59 +00:00
60680ad316
add a new Push2 opcode for targets (like cellspu) which have
...
ridiculously ginormous patterns and need more than one byte
of displacement for encodings. This fixes CellSPU/fdiv.ll.
SPU is still doing something else ridiculous though.
llvm-svn: 96833
2010-02-22 23:55:39 +00:00
d0b16bd219
Change ComplexPattern handling to push the node being matched as
...
well as the operands produced when the pattern is matched. This
allows CheckSame to work correctly when matching replicated
names involving ComplexPatterns. This fixes a bunch of MSP430
failures, we're down to 13 failures, two of which are
due to a sched bug.
llvm-svn: 96824
2010-02-22 23:33:44 +00:00
bb2afb79c0
add a new CheckMultiOpcode opcode for checking that a node
...
has one of the list of acceptable opcodes for a complex
pattern. This fixes 4 regtest failures.
llvm-svn: 96814
2010-02-22 22:30:37 +00:00
a5a298517e
When matching patterns that have a complex pattern as their root, make
...
sure to only run the complex pattern on nodes where the target opts in.
This patch only handles targets with one opcode specified so far, but
fixes 16 failures, only 34 left.
llvm-svn: 96813
2010-02-22 22:18:05 +00:00
9fd97c3690
fix most of the failures in the x86 suite by handling multiple
...
result nodes correctly. Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without
eliminating (parallel) from input patterns. That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.
llvm-svn: 96767
2010-02-21 23:54:05 +00:00
2bad7b0456
Always emit register class id references as i32 like
...
DAGISelEmitter does. This fixes 11 arm failures (8
left).
llvm-svn: 96757
2010-02-21 20:53:45 +00:00
8f40097073
Sort the patterns before adding them to the FA so that we get the
...
least cost matches. This gets us from 195 -> 208 passes on the ppc codegen tests.
llvm-svn: 96747
2010-02-21 19:22:06 +00:00
816f638f6b
emit table indexes before each row so that it is debuggable.
...
llvm-svn: 96730
2010-02-21 07:16:41 +00:00
eb3c0435b7
fix a table size miscomputation, target opcodes are 2 bytes.
...
With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.
llvm-svn: 96727
2010-02-21 06:44:29 +00:00
9f6c24ccd5
emit to the right streams, to avoid emitting the push
...
body before the push.
llvm-svn: 96726
2010-02-21 06:30:04 +00:00
55875c10d9
oops don't turn this on for everyone yet.
...
llvm-svn: 96725
2010-02-21 06:03:56 +00:00
79eaeb4cfe
implement the last known missing feature: updating uses of results
...
of the matched pattern to use the newly created node results. Onto
the "making it actually work" phase!
llvm-svn: 96724
2010-02-21 06:03:07 +00:00
132df652a4
Lots of improvements to the new dagisel emitter. This gets it to
...
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
llvm-svn: 96716
2010-02-21 03:22:59 +00:00
b4905cbd12
add emitter support for integer constants and simple physreg references.
...
llvm-svn: 96663
2010-02-19 07:49:56 +00:00
23ac248faa
fix this to work more determinstically, patch by Thomas Veith!
...
llvm-svn: 96661
2010-02-19 07:02:20 +00:00
dc61962e67
I confused myself, temporaries will be recorded right along with other inputs.
...
llvm-svn: 96639
2010-02-19 00:33:13 +00:00
16cd8cdec1
introduce a new ResultVal and start keeping track of temporary values.
...
llvm-svn: 96636
2010-02-19 00:27:40 +00:00
42a7ba7a67
add support for referencing registers and immediates,
...
building the tree to represent them but not emitting
table entries for them yet.
llvm-svn: 96617
2010-02-18 22:03:03 +00:00
7ed81690ab
start sketching out the structure of code for result emission generation.
...
Nothing real here yet.
llvm-svn: 96575
2010-02-18 06:47:49 +00:00
186ad8098e
rename the child field to 'next'. This is not a parent/child
...
relationship, this is a linear list relationship.
llvm-svn: 96561
2010-02-18 02:53:41 +00:00
d582a367b5
eliminate the MatcherNodeWithChild class, give the 'child'
...
field to MatcherNode.
llvm-svn: 96560
2010-02-18 02:49:24 +00:00
3a74a23c64
fit in 80 cols
...
llvm-svn: 96541
2010-02-18 00:23:27 +00:00
afce454d94
redisable this to save people a small amount of build time.
...
llvm-svn: 96497
2010-02-17 19:19:50 +00:00
1fa9c2cce4
move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,
...
and add a sparc implementation that knows about delay slots. Patch by
Nathan Keynes!
llvm-svn: 96492
2010-02-17 18:52:56 +00:00
f2d7099b3b
reduce nesting.
...
llvm-svn: 96466
2010-02-17 06:53:36 +00:00
f46dba81a8
improve comments, the matcher is now feature complete, on to codegen.
...
llvm-svn: 96464
2010-02-17 06:47:35 +00:00
e78bc753fe
sink special case "cannotyetselect" for intrinsics out of the
...
tblgen splatted code into the implementation.
llvm-svn: 96460
2010-02-17 06:28:22 +00:00
f8a5bb0f89
Emulate the current isel's "IsChainCompatible" logic for now.
...
I'd like to eventually rip it out, but for now producing the
same selections as the old matcher is more important.
llvm-svn: 96458
2010-02-17 06:23:39 +00:00
8ad29342b8
properly record chain inputs to complex patterns,
...
resolving a fixme.
llvm-svn: 96457
2010-02-17 06:08:25 +00:00
2392195d61
simplify IsChainCompatible codegen, add comments. no
...
functionality change.
llvm-svn: 96453
2010-02-17 05:35:28 +00:00
469cfb9fdf
Prep work to handle input chains of matched patterns and checking for
...
'ischaincompatible' when a pattern has more than one input chain. Need
to do some commenting and cleanup now that I understand how this works.
llvm-svn: 96443
2010-02-17 02:16:19 +00:00
022e511f4a
record input chains.
...
llvm-svn: 96437
2010-02-17 01:34:15 +00:00
ac27c2e3f3
prefix captured value names with $ so they look like
...
variables. Use the fancy OpNo variable instead of i,
which has the right index including chains.
llvm-svn: 96436
2010-02-17 01:27:29 +00:00
f773f03736
improve comments on OPC_Record to say what we're recording a node.
...
llvm-svn: 96433
2010-02-17 01:03:09 +00:00
e01545280b
improve comments in generated matcher a bit.
...
llvm-svn: 96422
2010-02-17 00:39:26 +00:00
a845f654fa
make the new isel generator plop out a CheckComplexPattern function
...
for evaluating complex patterns. Some cleanup has to happen before
this can be used though.
llvm-svn: 96419
2010-02-17 00:31:50 +00:00
7b390142fc
fix inverted condition.
...
llvm-svn: 96416
2010-02-17 00:11:30 +00:00
e2347aac52
complex patterns don't get 'record' nodes, they implicitly
...
record all their results.
llvm-svn: 96412
2010-02-16 23:16:25 +00:00
e83e2483bd
clean up some code, eliminate NodeIsComplexPattern, which
...
does the same thing as getComplexPatternInfo.
llvm-svn: 96411
2010-02-16 23:13:59 +00:00
314e34b5b8
fix indentation
...
llvm-svn: 96409
2010-02-16 22:38:31 +00:00
afac7dad21
fix rdar://7653908, a crash on a case where we would fold a load
...
into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
llvm-svn: 96408
2010-02-16 22:35:06 +00:00
6c132331ee
simplify this code. In the new world order there is no
...
need to scan the entire subtree of the pattern anymore.
llvm-svn: 96369
2010-02-16 19:19:58 +00:00
f8695c1ee9
convert the new matcher to check intermediate nodes for a single
...
use and only call IsProfitableToFold/IsLegalToFold on the load
being folded, like the old dagiselemitter does. This
substantially simplifies the code and improves opportunities for
sharing.
llvm-svn: 96368
2010-02-16 19:15:55 +00:00
300048631b
change dag isel emitter to only call 'IsProfitableToFold' on nodes
...
with chains. On interior nodes that lead up to them, we just directly
check that there is a single use. This generates slightly more
efficient code.
llvm-svn: 96366
2010-02-16 19:03:34 +00:00
52bfe24e2c
mark all the generated node predicates 'const'.
...
llvm-svn: 96337
2010-02-16 07:26:36 +00:00
5ce8303950
generate code for node and pattern predicates. Note that this won't
...
build if enabled, it will fail with constness issues. I'll resolve
these next.
llvm-svn: 96336
2010-02-16 07:21:10 +00:00
1d689a09a9
refactor some code into a local class.
...
llvm-svn: 96334
2010-02-16 06:52:01 +00:00
812586ad2a
remove now dead code and fixme.
...
llvm-svn: 96333
2010-02-16 06:15:00 +00:00
f400fd6aec
remove dead code. This is never generated for any targets in mainline.
...
llvm-svn: 96332
2010-02-16 06:14:22 +00:00
aa7d3e096b
add support for the new isel matcher to generate
...
(isprofitable|islegal)tofold checks.
llvm-svn: 96331
2010-02-16 06:10:58 +00:00
5e73ff2e3a
Split SelectionDAGISel::IsLegalAndProfitableToFold to
...
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
llvm-svn: 96255
2010-02-15 19:41:07 +00:00
b02cdaaa9c
Check in the first big step of rewriting DAGISelEmitter to
...
produce a table based matcher instead of gobs of C++ Code.
Though it's not done yet, the shrinkage seems promising,
the table for the X86 ISel is 75K and still has a lot of
optimization to come (compare to the ~1.5M of .o generated
the old way, much of which will go away).
The code is currently disabled by default (the #if 0 in
DAGISelEmitter.cpp). When enabled it generates a dead
SelectCode2 function in the DAGISel Header which will
eventually replace SelectCode.
There is still a lot of stuff left to do, which are
documented with a trail of FIXMEs.
llvm-svn: 96215
2010-02-15 08:04:42 +00:00
5352f07f2c
Revert r96130 ("Forward parameter options as '-option=param'").
...
This behaviour must be configurable.
llvm-svn: 96210
2010-02-15 03:17:06 +00:00
450d50467c
constize
...
llvm-svn: 96199
2010-02-14 22:33:49 +00:00
53c39ba3c1
clean up a bunch of code, move some random predicates
...
on TreePatternNode to be methods on TreePatternNode.
llvm-svn: 96197
2010-02-14 22:22:58 +00:00
b3d9942c51
remove the DisablePatternForFastISel predicate, which is a check
...
that predated -fast-isel which attempted to speed up the dag pattern
matchers at -O0. Since fast-isel is around, this is basically
obsolete and removing it shrinks the generated dag isels.
llvm-svn: 96188
2010-02-14 21:11:53 +00:00
dd2ec58276
add an insertion operator.
...
llvm-svn: 96187
2010-02-14 21:10:33 +00:00
78291e3be8
tidy up
...
llvm-svn: 96186
2010-02-14 21:10:15 +00:00
32fa169648
Forward parameter options as '-option=parameter'.
...
Some tools do not like the '-option parameter' form. Should this be
configurable?
llvm-svn: 96130
2010-02-13 22:37:28 +00:00
3dc137d8ed
pull a bunch of huge inline methods in the PatternCodeEmitter
...
class out of line.
llvm-svn: 96113
2010-02-13 20:06:50 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
...
tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
...
llvm-svn: 96065
2010-02-13 01:48:34 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
...
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
dde9c12307
Reworked the Intel disassembler to support instructions
...
whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction. Commented out the special
casing of VMCALL, which is the first instruction to use
this special form. While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler.
llvm-svn: 96043
2010-02-12 23:39:46 +00:00
f7477e599f
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
...
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
2010-02-12 02:06:33 +00:00
692d06fb77
MC: Fix bug where trailing tied operands were forgotten; the X86 assembler
...
matcher is now free of implicit operands!
- Still need to clean up the code now that we don't to worry about implicit
operands, and to make it a hard error if an instruction fails to specify all
of its operands for some reason.
llvm-svn: 95956
2010-02-12 01:46:54 +00:00
b1913c4df9
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
...
testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
2010-02-11 22:57:32 +00:00
0d7b5e5d33
work around a gcc bug with -Wuninitialized.
...
llvm-svn: 95808
2010-02-10 21:22:51 +00:00
5b785ac0a3
MC/AsmMatcher: Tweak conversion function name.
...
llvm-svn: 95802
2010-02-10 21:00:47 +00:00
f22553a1c7
MC/AsmMatcher: Add support for creating tied operands when constructing MCInsts.
...
- Pretty messy, but we need to rework how we handle tied operands in MCInst
anyway.
llvm-svn: 95774
2010-02-10 08:15:48 +00:00
7b0c339510
Updated the enhanced disassembly library's TableGen
...
backend to not use exceptions at all except in cases
of actual error.
llvm-svn: 95762
2010-02-10 03:23:23 +00:00
e9959a5f1a
Updated the TableGen emitter for the Enhanced
...
Disassembler to take advantage of the refactored
AsmWriterInst.h. Note removed parser code.
llvm-svn: 95760
2010-02-10 02:47:08 +00:00
515937d2ea
Changed AsmWriterOperand to also include the index of the
...
operand into the CodeGenInstruction's list of operands,
which is useful for EDEmitter. (Still working on PR6219)
llvm-svn: 95759
2010-02-10 02:27:43 +00:00
a9dfb1bc07
Introduce a new CodeGenInstruction::ConstraintInfo class
...
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file. Fix X86RecognizableInstr to use this instead of
parsing C code :).
llvm-svn: 95753
2010-02-10 01:45:28 +00:00
d4b19e12ed
Fixed some indentation in the AsmWriterInst
...
implementation. Also changed the constructor
so that it does not require a Record, making it
usable by the EDEmitter.
llvm-svn: 95715
2010-02-09 23:06:35 +00:00
a36341366b
Added AsmWriterInst.cpp to the CMakeList so that
...
it builds OK on Visual Studio.
llvm-svn: 95702
2010-02-09 22:29:16 +00:00
b7e8f4a30e
Per PR 6219, factored AsmWriterInst and AsmWriterOperand
...
out of the AsmWriterEmitter. This patch does the physical
code movement, but leaves the implementation unchanged. I'll
make any changes necessary to generalize the code in a
separate patch.
llvm-svn: 95697
2010-02-09 21:50:41 +00:00
b06015aa69
move target-independent opcodes out of TargetInstrInfo
...
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
2010-02-09 19:54:29 +00:00
60db0a6ba5
pass stringref by value instead of by const&
...
llvm-svn: 95627
2010-02-09 00:34:28 +00:00
41ad1905c9
sink handling of target-independent machine instrs (other
...
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
llvm-svn: 95177
2010-02-03 01:00:52 +00:00
3b8a4663b9
AsmMatcherEmitter: Use stable_sort when reordering instructions, so that order
...
is still deterministic even amongst ambiguous instructions (eventually ambiguous
match orders will be a hard error, but we aren't there yet).
llvm-svn: 95157
2010-02-02 23:46:36 +00:00
cf18153de2
AsmMatcher: Create operand classes before use, apparently records aren't visited
...
in the order they were declared.
llvm-svn: 94868
2010-01-30 01:02:37 +00:00
e8f5e8c9f8
Quick fix to make the header file for the enhanced
...
disassembly information have a better comment (and
better guard macros).
llvm-svn: 94781
2010-01-29 01:34:29 +00:00
ffe9c20eaa
Update CMake build.
...
llvm-svn: 94776
2010-01-29 01:10:25 +00:00
82436d1666
Added a custom TableGen backend to support the
...
enhanced disassembler, and the necessary makefile
rules to build the table for X86.
llvm-svn: 94764
2010-01-29 00:21:04 +00:00
81068d0a3d
Escape double quotes in 'help'.
...
llvm-svn: 94543
2010-01-26 14:55:04 +00:00
86c1181c3d
Modified the register matcher function in AsmMatcher to
...
be static. Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.
llvm-svn: 94266
2010-01-23 00:40:33 +00:00
e197409277
AsmMatcher: Add a comment.
...
llvm-svn: 94261
2010-01-23 00:26:16 +00:00
881ba0bb92
Remove DEBUG_DECLARE, looks like we don't need it.
...
Also, DEBUG_VALUE has side effects.
llvm-svn: 93498
2010-01-15 01:50:44 +00:00
f29c0b6880
Split the TargetAsmParser "ParseInstruction" interface in half:
...
the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
llvm-svn: 93469
2010-01-14 22:21:20 +00:00
c6fe3c3273
Reimplement getToken and SplitString as "StringRef helper functions"
...
- getToken is modeled after StringRef::split but it can split on multiple
separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
same behaviour as getToken.
llvm-svn: 93161
2010-01-11 18:03:24 +00:00
237254dcab
Add DEBUG_DECLARE. Not used yet.
...
llvm-svn: 93040
2010-01-09 01:24:25 +00:00
8f04740650
Add DEBUG_VALUE. Not used yet.
...
llvm-svn: 93030
2010-01-08 23:51:25 +00:00
78376ad7e1
Partially address a README by having functionattrs consider calls to
...
memcpy, memset and other intrinsics that only access their arguments
to be readnone if the intrinsic's arguments all point to local memory.
This improves the testcase in the README to readonly, but it could in
theory be made readnone, however this would involve more sophisticated
analysis that looks through the memcpy.
llvm-svn: 92829
2010-01-06 08:45:52 +00:00
404a984780
Don't use the ISD::NodeType enum for SDNode opcodes, as CodeGen
...
uses several kinds of opcode values which are not declared within
that enum. This fixes PR5946.
llvm-svn: 92794
2010-01-05 22:26:32 +00:00
297bfe6d71
Add an !eq() operator to TableGen. It operates on strings only.
...
Use !cast<string>() to compare other types of objects.
llvm-svn: 92754
2010-01-05 19:11:42 +00:00
fb652a7a5c
Have TableGen emit code that uses dbgs() rather than errs().
...
llvm-svn: 92738
2010-01-05 17:47:41 +00:00
ea6f91ff64
Change SelectCode's argument from SDValue to SDNode *, to make it more
...
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
llvm-svn: 92564
2010-01-05 01:24:18 +00:00
74be83582c
tblgen/OptParser: Use EmitSourceFileHeader.
...
llvm-svn: 92521
2010-01-04 22:03:51 +00:00
673e23558b
Replace some special-case code which probably was buggy with an assertion
...
verifying that the special case does not occur.
llvm-svn: 92504
2010-01-04 20:36:57 +00:00
b91411c9b9
Remove the CPAttrParentAsRoot code, which is unused, and inconvenient
...
for a refactoring I'm working on.
llvm-svn: 92503
2010-01-04 20:31:55 +00:00
9b0afc36a8
Typo.
...
llvm-svn: 92392
2010-01-01 04:40:54 +00:00
c4f17987b6
Make CheckForSuperfluousOptions handle list form of 'switch_on' correctly.
...
llvm-svn: 92391
2010-01-01 03:51:02 +00:00
8711c8dbcf
Minor simplifications.
...
llvm-svn: 92390
2010-01-01 03:50:51 +00:00
554c054777
Better error message.
...
llvm-svn: 92389
2010-01-01 03:50:34 +00:00
b45a3d8de4
Use the 'MadeChange' variable instead of returning 'false' all of the time.
...
llvm-svn: 92155
2009-12-25 13:35:40 +00:00
54ed390727
Don't emit trailing semicolon.
...
llvm-svn: 92133
2009-12-24 17:49:28 +00:00
382495a0ff
Cosmetic issue: more consistent naming.
...
llvm-svn: 91998
2009-12-23 12:49:41 +00:00
f48a0c43b6
Allow (set_option SwitchOption, true).
...
llvm-svn: 91997
2009-12-23 12:49:30 +00:00
c7dccd8ad2
Suppress compiler warning.
...
llvm-svn: 91959
2009-12-23 00:45:10 +00:00
36eab80875
Fixes to the X86 disassembler:
...
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.
llvm-svn: 91919
2009-12-22 21:12:55 +00:00
dbf7074296
Fix a bug in !subst where TableGen would go and resubstitute text it had
...
just substituted. This could cause infinite looping in certain
pathological cases.
llvm-svn: 91843
2009-12-21 21:21:34 +00:00
91b866a163
fix build and while at it remove a redudant include
...
llvm-svn: 91774
2009-12-19 11:52:18 +00:00
3a821f7f0c
More bzero -> memset that I missed.
...
llvm-svn: 91757
2009-12-19 04:16:57 +00:00
f008ea5fa0
Add missing newlines at EOF (for clang++).
...
llvm-svn: 91756
2009-12-19 04:16:48 +00:00
04cc307edd
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
...
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
llvm-svn: 91749
2009-12-19 02:59:52 +00:00
b0da63da1e
Fix a comment.
...
llvm-svn: 91741
2009-12-19 01:46:09 +00:00
d7015906d0
Make 'set_option' work with list options.
...
This works now: (set_option "list_opt", ["val_1", "val_2", "val_3"])
llvm-svn: 91679
2009-12-18 11:27:26 +00:00
1fe2678a06
Add a 'set_option' action for use in OptionPreprocessor.
...
llvm-svn: 91594
2009-12-17 07:49:16 +00:00
9bbd4eb9f5
Refactoring, no functionality change.
...
llvm-svn: 91593
2009-12-17 07:48:49 +00:00
bea9ce8826
s/TokenizeCmdline/TokenizeCmdLine/
...
llvm-svn: 91592
2009-12-17 07:48:34 +00:00
2a282f2f86
Add @earlyclobber TableGen constraint
...
llvm-svn: 91554
2009-12-16 19:43:02 +00:00
c87c16b030
Revert 90628, which was incorrect.
...
llvm-svn: 91448
2009-12-15 20:21:44 +00:00
38c4f4b5d1
whitespace
...
llvm-svn: 91442
2009-12-15 19:28:13 +00:00
66a664870b
Convert llvmc tests to FileCheck.
...
llvm-svn: 91420
2009-12-15 07:21:14 +00:00
62b65ecf18
Support hook invocation from 'append_cmd'.
...
llvm-svn: 91419
2009-12-15 07:20:50 +00:00
096fc103fb
Validate the generated C++ code in llvmc tests.
...
Checks that the code generated by 'tblgen --emit-llvmc' can be actually
compiled. Also fixes two bugs found in this way:
- forward_transformed_value didn't work with non-list arguments
- cl::ZeroOrOne is now called cl::Optional
llvm-svn: 91404
2009-12-15 03:04:52 +00:00
2cb65bd5ab
Allow $CALL(Hook, '$INFILE') for non-join tools.
...
llvm-svn: 91402
2009-12-15 03:04:02 +00:00
0d886ca091
Remove unneeded ';' and a class/struct mismatch (noticed by clang).
...
llvm-svn: 90934
2009-12-09 02:58:09 +00:00
57a67facb8
Simplify a bit.
...
llvm-svn: 90785
2009-12-07 19:16:13 +00:00
fca845187d
Throw 'const char*' instead of 'std::string'.
...
llvm-svn: 90784
2009-12-07 19:15:57 +00:00
67c106664b
Deprecate 'unpack_values'.
...
Use 'forward_values' + 'comma_separated' instead.
llvm-svn: 90774
2009-12-07 18:25:54 +00:00
6b6be99632
Implement 'forward_value' and 'forward_transformed_value'.
...
llvm-svn: 90770
2009-12-07 17:03:05 +00:00
d5774dfb8d
Refactoring, no functionality change.
...
llvm-svn: 90764
2009-12-07 10:51:55 +00:00
e79368d3ff
Minor code simplification.
...
llvm-svn: 90628
2009-12-05 00:05:43 +00:00
eebf029d1d
OptParser: Emit HelpText field for option groups.
...
llvm-svn: 90599
2009-12-04 21:41:24 +00:00
ed163ed103
Forward -save-temps to llvm-gcc.
...
llvm-svn: 90214
2009-12-01 06:51:30 +00:00
e502433d7f
Sketch TableGen disassembler emitter, based on patch by Sean Callanan.
...
llvm-svn: 89833
2009-11-25 02:13:23 +00:00
cfb181d3cb
Delete some dead and non-obvious code.
...
llvm-svn: 89729
2009-11-24 01:48:15 +00:00
de5dea869f
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
...
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
llvm-svn: 89711
2009-11-23 23:20:51 +00:00
7248f86432
Fix whitespace.
...
llvm-svn: 89582
2009-11-22 04:24:42 +00:00
67e6cab49f
Fix pr5470. Tablegen handles template arguments by temporarily setting their
...
values, resolving references to them, and then removing the definitions.
If a template argument is set to an undefined value, we need to resolve
references to that argument to an explicit undefined value. The current code
leaves the reference to the template argument as it is, which causes an
assertion failure later when the definition of the template argument is
removed.
llvm-svn: 89581
2009-11-22 03:58:57 +00:00
159905a766
Fix some spelling in comments.
...
llvm-svn: 89566
2009-11-21 22:44:20 +00:00
3b793a4dc9
Avoid a redundant assertion.
...
llvm-svn: 89565
2009-11-21 22:39:27 +00:00
73cb65f704
TableGen/OptParser: When ordering options, make "sentinel" options appear before
...
everything else.
llvm-svn: 89368
2009-11-19 18:22:16 +00:00
361a376879
De-bork CMake build
...
llvm-svn: 89272
2009-11-18 23:20:09 +00:00
57ee0b0be3
TableGen: Add initial backend for clang Driver's option parsing.
...
llvm-svn: 89245
2009-11-18 21:29:51 +00:00
8c19a8f17b
Implement DISABLE_INLINE for MSVC. This required changing the position in all
...
forward declaration and patching tblgen to emit it right. Patch by Amine Khaldi!
llvm-svn: 88798
2009-11-14 16:37:18 +00:00
16797a1f55
Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.
...
llvm-svn: 88753
2009-11-14 03:42:17 +00:00
598825e832
Show command-line args and features passed into backend in debug output. Approved by Evan Cheng.
...
llvm-svn: 86797
2009-11-11 03:23:46 +00:00
dc2beaa05e
It is invalid to infer the value type from the result #0 of the node
...
since the instruction might use the other result of different type.
llvm-svn: 86462
2009-11-08 12:14:54 +00:00
81f1b31c96
clang++ points out that this is pointless.
...
llvm-svn: 86239
2009-11-06 06:33:01 +00:00
701e4e9b2b
Don't print a redundant tab for inline asm, and do use the new printKill.
...
llvm-svn: 86206
2009-11-06 00:19:43 +00:00
9e69536607
mark some constant global const.
...
llvm-svn: 85910
2009-11-03 18:30:31 +00:00
0f38d989bd
Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.
...
PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
llvm-svn: 85766
2009-11-02 00:11:39 +00:00
6c9388011b
Initial target-independent CodeGen support for BlockAddresses.
...
llvm-svn: 85556
2009-10-30 01:27:03 +00:00
554a75a973
Move some code from being emitted as boilerplate duplicated in every
...
*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
llvm-svn: 85530
2009-10-29 22:30:23 +00:00
453d64c9f5
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
...
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
llvm-svn: 85517
2009-10-29 18:10:34 +00:00
8107289624
Sorry to break the build.
...
I was trying to check the WIP file to some local repository, but ended up
checking in the llvm repository. Oops!
llvm-svn: 85470
2009-10-29 02:04:53 +00:00
c3d9a47d03
Minor tweak to forgo the the curly braces for most case blocks, except when
...
declaring local variables.
llvm-svn: 85467
2009-10-29 01:45:07 +00:00
b7f7673feb
80-col violation.
...
llvm-svn: 85215
2009-10-27 09:02:49 +00:00
56869f22c4
Move DataTypes.h to include/llvm/System, update all users. This breaks the last
...
direct inclusion edge from System to Support.
llvm-svn: 85086
2009-10-26 01:35:46 +00:00
3b3e9a1c27
Make 'unset_option' work on list options.
...
llvm-svn: 84827
2009-10-22 04:15:07 +00:00
456d734945
Implement any_[not_]empty and list versions of switch_on and [not_]empty.
...
Useful for OptionPreprocessor.
llvm-svn: 84728
2009-10-21 02:13:13 +00:00
9abd706881
More refactoring...
...
llvm-svn: 84537
2009-10-19 21:24:28 +00:00
7d2019f9b3
Refactoring, no functionality change.
...
llvm-svn: 84450
2009-10-18 22:51:30 +00:00
04f049f2f5
Move UnescapeString to a static function for its sole client; its inefficient and broken.
...
llvm-svn: 84358
2009-10-17 20:43:42 +00:00
8eff29d805
Use raw_ostream::write_escaped instead of EscapeString.
...
llvm-svn: 84356
2009-10-17 20:43:19 +00:00
867f67301b
First draft of the OptionPreprocessor.
...
More to follow...
llvm-svn: 84352
2009-10-17 20:09:29 +00:00
ac90b38c48
This variable is never used.
...
llvm-svn: 84351
2009-10-17 20:08:47 +00:00
b2eba4904f
Disallow multiple instances of PluginPriority.
...
Several instances of PluginPriority in a single file most probably signifies a
programming error.
llvm-svn: 84350
2009-10-17 20:08:30 +00:00
e4197250cc
Report errors correctly for unselected target intrinsics.
...
llvm-svn: 84193
2009-10-15 18:50:03 +00:00
0bd47063ab
Omit the 'out_file_index != -1' check when possible.
...
llvm-svn: 83619
2009-10-09 05:45:21 +00:00
182765004e
Input files should go before all other options.
...
Important, for example, when calling 'gcc a.o b.o c.o -lD -lE -lF'.
llvm-svn: 83524
2009-10-08 04:40:08 +00:00
46668e09be
Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
...
set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.
llvm-svn: 83196
2009-10-01 08:21:18 +00:00
dc9efe8078
Introduce the TargetInstrInfo::KILL machine instruction and get rid of the
...
unused DECLARE instruction.
KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.
llvm-svn: 83006
2009-09-28 20:32:26 +00:00
efc9763468
Add a way to query the number of input files.
...
llvm-svn: 82957
2009-09-28 01:16:42 +00:00
1766617386
A bit prettier formatting.
...
llvm-svn: 82955
2009-09-28 01:15:44 +00:00
48b185d6f7
Improve MachineMemOperand handling.
...
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
llvm-svn: 82794
2009-09-25 20:36:54 +00:00
32f71d714b
Rename getTargetNode to getMachineNode, for consistency with the
...
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
2009-09-25 18:54:59 +00:00
bf97147a7e
Make the end-of-itinerary mark explicit. Some cleanup.
...
llvm-svn: 82709
2009-09-24 20:22:50 +00:00
fdd0a2fb40
Use raw_ostream::indent instead of passing strings.
...
llvm-svn: 82456
2009-09-21 15:53:44 +00:00
42bb0c1f8f
convert some stuff to StringRef to avoid temporary std::strings.
...
llvm-svn: 82244
2009-09-18 18:31:37 +00:00
bf1a769dcb
add a comment.
...
llvm-svn: 82236
2009-09-18 18:10:19 +00:00
f3f93aea75
slightly increase prettiness.
...
llvm-svn: 81742
2009-09-14 01:27:50 +00:00
a7e8ae4521
emit the register table as a massive string to avoid relocations.
...
llvm-svn: 81741
2009-09-14 01:26:18 +00:00
971aad136c
move StringToOffsetTable out to its own header.
...
llvm-svn: 81740
2009-09-14 01:19:16 +00:00
b47ed61f26
factor string table generation out to its own class. This changes
...
the encoding of the AsmStrs table saving a byte or two.
llvm-svn: 81739
2009-09-14 01:16:36 +00:00
d0a3f194a6
eliminate the TargetRegisterDesc::AsmName field, the asmprinters now have this table.
...
llvm-svn: 81728
2009-09-13 22:45:04 +00:00
ad10b3be3e
the tblgen produced 'getRegisterName' method does not access
...
the object, make it static instead of const.
llvm-svn: 81711
2009-09-13 20:19:22 +00:00
06c5eed9e9
make tblgen produce a function that returns the name for a physreg.
...
Nothing is using this info yet.
llvm-svn: 81707
2009-09-13 20:08:00 +00:00
598467916d
Eliminate some unnecessary implicit constructors in generated DAG ISel code.
...
Partial fix for PR4946.
llvm-svn: 81518
2009-09-11 09:01:57 +00:00
82bea72032
PHI nodes can never reach the asmprinter, assert and die instead of printing
...
out an illegal "PHINODE" instruction.
llvm-svn: 81495
2009-09-11 00:41:15 +00:00
c1e23592ec
Distinguish between 'empty' and empty DAG marker.
...
llvm-svn: 81448
2009-09-10 16:22:02 +00:00
7b047b9c81
Add a logical 'not' operator to llvmc's TableGen dialect.
...
llvm-svn: 81447
2009-09-10 16:21:38 +00:00
321bc99a74
remove DebugLoc from MCInst and eliminate "Comment printing" from
...
the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
llvm-svn: 81396
2009-09-09 23:14:36 +00:00
5333ec33b3
Fix a subtle bug in "return;" generation which caused us to miss
...
a return in one case. Instead of sprinking return handling code
throughout the asmprinter generator, just treat it like any other
normal statement.
llvm-svn: 81395
2009-09-09 23:09:29 +00:00
716a8c92d0
hoist the call to processDebugLoc out of the generated
...
asm printer into the "printInstruction" routine. This
fixes a problem where the experimental asmprinter would
drop debug labels in some cases, and fixes issues on ppc/xcore
where pseudo instructions like "mr" didn't get debug locs properly.
It is annoying that this moves the call from one place into each
target, but a future set of more invasive refactorings will fix
that problem.
llvm-svn: 81377
2009-09-09 20:34:59 +00:00
2fbeaf084f
Remove some unused variables and methods warned about by
...
icc (#177 , partial). Patch by Erick Tryzelaar.
llvm-svn: 81106
2009-09-06 08:33:48 +00:00
57b946c94b
PR4795: Remove EEVT::isFP, isInt and isVec types used by TableGen's type
...
inferencing. As far as I can tell, these are equivalent to the existing
MVT::fAny, iAny and vAny types, and having both of them makes it harder
to reason about and modify the type inferencing code.
The specific problem in PR4795 occurs when updating a vAny type to be fAny
or iAny, or vice versa. Both iAny and fAny include vector types -- they
intersect with the set of types represented by vAny. When merging them,
choose fAny/iAny to represent the intersection. This is not perfect, since
fAny/iAny also include scalar types, but it is good enough for TableGen's
type inferencing.
llvm-svn: 80423
2009-08-29 05:53:25 +00:00
904d4c71d5
Fix bad length argument to substr calls. Apparently I'm the first one to
...
attempt more than 2 constraints on an instruction.
llvm-svn: 80169
2009-08-26 22:50:39 +00:00
61a8796ddb
Make LLVM command-line tools overwrite their output files without -f.
...
This is conventional command-line tool behavior. -f now just means
"enable binary output on terminals".
Add a -f option to llvm-extract and llvm-link, for consistency.
Remove F_Force from raw_fd_ostream and enable overwriting and
truncating by default. Introduce an F_Excl flag to permit users to
enable a failure when the file already exists. This flag is
currently unused.
Update Makefiles and documentation accordingly.
llvm-svn: 79990
2009-08-25 15:34:52 +00:00
06fa176862
prune the #includes in raw_ostream.h by moving a
...
member out of line. ftostr is not particularly speedy,
so that method is presumably not perf sensitive.
llvm-svn: 79885
2009-08-24 03:52:50 +00:00
c521f54198
Prune #includes from llvm/Linker.h and llvm/System/Path.h,
...
forcing them down into various .cpp files.
This change also:
1. Renames TimeValue::toString() and Path::toString() to ::str()
for similarity with the STL.
2. Removes all stream insertion support for sys::Path, forcing
clients to call .str().
3. Removes a use of Config/alloca.h from bugpoint, using smallvector
instead.
4. Weans llvm-db off <iostream>
sys::Path really needs to be gutted, but I don't have the desire to
do it at this point.
llvm-svn: 79869
2009-08-23 22:45:37 +00:00
c2dbd5d671
Try to fix MSVC build after r79846.
...
llvm-svn: 79850
2009-08-23 10:39:21 +00:00
ced008152f
Fix non-determinism in DAGISel emitter.
...
- This manifested as non-determinism in the .inc output in rare cases (when two
distinct patterns ended up being equivalent, which is rather rare). That
meant the pattern matching was non-deterministic, which could eventually mean
the code generator selected different instructions based on the arch.
- It's probably worth making the DAGISel ensure a total ordering (or force the
user to), but the simple fix here is to totally order the Record* maps based
on a unique ID.
- PR4672, PR4711.
Yay:
--
ddunbar@giles:~$ cat ~/llvm.obj.64/lib/Target/*/*.inc | shasum
d1099ff34b21459a5a3e7021c225c080e6017ece -
ddunbar@giles:~$ cat ~/llvm.obj.ppc/lib/Target/*/*.inc | shasum
d1099ff34b21459a5a3e7021c225c080e6017ece -
--
llvm-svn: 79846
2009-08-23 09:47:37 +00:00
1362602eb2
Change Pass::print to take a raw ostream instead of std::ostream,
...
update all code that this affects.
llvm-svn: 79830
2009-08-23 06:03:38 +00:00
34822f6ec7
remove some DOUTs
...
llvm-svn: 79821
2009-08-23 04:44:11 +00:00
9e6f1f160a
Change raw_fd_ostream to take flags as an optional bitmask
...
instead of as two bools. Use this to add a F_Append flag
which has the obvious behavior.
Other unrelated changes conflated into this patch:
1. REmove EH stuff from llvm-dis and llvm-as, the try blocks
are dead.
2. Simplify the filename inference code in llvm-as/llvm-dis,
because raw_fd_ostream does the right thing with '-'.
3. Switch machine verifier to use raw_ostream instead of ostream
(Which is the thing that needed append in the first place).
llvm-svn: 79807
2009-08-23 02:51:22 +00:00
0939595711
Record variable debug info at ISel time directly.
...
llvm-svn: 79742
2009-08-22 17:12:53 +00:00
d813cbfe72
Extend the instruction itinerary model to include the ability to indicate the def and use cycle for each operand. This additional information is optional, so existing itineraries do not need to be changed.
...
llvm-svn: 79247
2009-08-17 16:02:57 +00:00
ee97b8b11c
the MinPad argument to PadToColumn only really makes sense to be 1,
...
just remove the argument and replace it with 1.
llvm-svn: 79246
2009-08-17 15:48:08 +00:00
55f1c09e31
Push LLVMContexts through the IntegerType APIs.
...
llvm-svn: 78948
2009-08-13 21:58:54 +00:00
f7e587fd53
Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type.
...
There have been a few times where I've wanted this but ended up leaving the
operand type unconstrained. It is easy to add this now and should help
catch errors in the future.
llvm-svn: 78849
2009-08-12 22:30:59 +00:00
1432ef864e
This void is implicit in C++.
...
llvm-svn: 78848
2009-08-12 22:10:57 +00:00
b369ee4c48
Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one.
...
llvm-svn: 78827
2009-08-12 18:31:53 +00:00
117c9e8497
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
...
llvm-svn: 78759
2009-08-12 00:36:31 +00:00
3fb754af06
llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax')
...
We now match all of 403.gcc (as emitted by clang). :)
llvm-svn: 78750
2009-08-11 23:23:44 +00:00
c4f8ea4ccb
Add 'isCodeGenOnly' bit to Instruction .td records.
...
- Used to mark fake instructions which don't correspond to an actual machine
instruction (or are duplicates of a real instruction). This is to be used for
"special cases" in the .td files, which should be ignored by things like the
assembler and disassembler. We still need a good solution to handle pervasive
duplication, like with the Int_ instructions.
- Set the bit on fake "mov 0" style instructions, which allows turning an
assembler matcher warning into a hard error.
- -2 FIXMEs.
llvm-svn: 78731
2009-08-11 22:17:52 +00:00
e431871851
llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be
...
used to strip hard coded comments out of .td assembly strings.
llvm-svn: 78716
2009-08-11 20:59:47 +00:00
9f94459d24
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
...
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
2009-08-11 20:47:22 +00:00
34c8791ff0
llvm-mc/AsmMatcher: Fix two thinkos in determining whether two classes are
...
related.
llvm-svn: 78706
2009-08-11 20:10:07 +00:00
781797f586
Fix a few more places in TableGen that need to handle EVT::vAny types.
...
llvm-svn: 78643
2009-08-11 05:03:38 +00:00
bb98db2d21
llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands.
...
- This drops us to 123 ambiguous instructions (previously ~500) on X86.
llvm-svn: 78636
2009-08-11 02:59:53 +00:00
2cd5da8300
Add a new overloaded EVT::vAny type for use in TableGen to allow intrinsic
...
arguments that are vectors of any size and element type.
llvm-svn: 78631
2009-08-11 01:14:02 +00:00
53aa7a960c
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
...
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
aeb1feb67a
llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to call
...
on target specific operands for testing class membership and converting to
MCInst operands.
llvm-svn: 78597
2009-08-10 21:00:45 +00:00
26454f794c
llvm-mc/AsmMatcher: Remove some code which has been obsoleted by move to
...
explicit parser match classes.
llvm-svn: 78588
2009-08-10 19:08:50 +00:00
17410a4b92
llvm-mc/AsmMatcher: Change assembler parser match classes to their own record
...
structure.
llvm-svn: 78581
2009-08-10 18:41:10 +00:00
2587b61533
llvm-mc/AsmParser: Check for matches with super classes when matching
...
instruction operands.
llvm-svn: 78565
2009-08-10 16:05:47 +00:00
d9631912cf
llvm-mc/AsmParser: Fix thinko in ClassInfo::operator<.
...
llvm-svn: 78533
2009-08-09 08:23:23 +00:00
e0891c2109
llvm-mc/AsmParser: Add hack to ignore Int_* and *_Int instructions for now, to
...
make it easier to see interesting ambiguities.
- Also, check that user doesn't try to redefine the super class. This is a wart
in the current design, in that assembler match classes aren't explicitly
declared somewhere (so there isn't a unique place to declare the super
class). This should probably be fixed.
llvm-svn: 78532
2009-08-09 08:19:00 +00:00
8e33cb2de1
llvm-mc/AsmParser: Implement user defined super classes.
...
- We can now discriminate SUB32ri8 from SUB32ri, for example.
llvm-svn: 78530
2009-08-09 07:20:21 +00:00
f573b563e1
llvm-mc/AsmParser: Separate instruction ordering for ambiguity detection.
...
- We want the ordering operation to be simple, since we run it on every
match. The old ordering is also not a strict weak ordering when there are
ambiguities, which makes MSVC unhappy.
- While we are at it, detect all ambiguities instead of just the adjacent
ones. There are actually 655, for X86.
llvm-svn: 78526
2009-08-09 06:05:33 +00:00
c32aa060bd
llvm-mc/AsmParser: Define match classes in the .td file.
...
-2 FIXMEs.
llvm-svn: 78523
2009-08-09 05:18:30 +00:00
3239f020eb
llvm-mc/AsmParser: Sketch infrastructure for ordering instructions & detecting
...
ambiguities.
- Currently there are 483 ambiguities to resolve. :)
llvm-svn: 78522
2009-08-09 04:00:06 +00:00
b7ff9e84be
fix edito
...
llvm-svn: 78520
2009-08-08 23:43:55 +00:00
d8c822f180
llvm-mc/AsmMatcher: Tweak string matcher (missed a newline).
...
llvm-svn: 78518
2009-08-08 23:43:16 +00:00
5478125143
llvm-mc/AsmMatcher: Tweak string matcher.
...
- Track whether we need to insert an explicit 'break'.
- Invert conditional when matching a single prefix to reduce
nesting/bracing/breaking.
- wc -l of X86GenAsmMatcher.inc decreased by 10%. :)
llvm-svn: 78513
2009-08-08 22:57:25 +00:00
66f4f54e8a
llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.
...
Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.
llvm-svn: 78504
2009-08-08 21:22:41 +00:00
00e2e74fb2
add a little function to do arbitrary string pattern matching in a
...
much more efficient way than a sequence of if's. Switch MatchRegisterName
to use it. It would be nice if someone could factor this out to a shared
place in tblgen :)
llvm-svn: 78492
2009-08-08 20:02:57 +00:00
16cf1967f5
add another const
...
llvm-svn: 78487
2009-08-08 19:16:05 +00:00
099003bc19
remove a useless anon-ns, make table const.
...
llvm-svn: 78486
2009-08-08 19:15:25 +00:00
611307108c
MSVC doesn't like member variables with the same name as the class.
...
llvm-svn: 78462
2009-08-08 10:06:30 +00:00
541efcc5c4
llvm-mc/AsmMatcher: Improve match code.
...
- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
llvm-svn: 78461
2009-08-08 07:50:56 +00:00
713302883e
llvm-mc/AsmMatcher: Switch to a unified function to convert operands to MCInst,
...
so that terminal states are as simple as possible.
- If we were willing to assume that the order that operands get inserted in the
MCInst is fixed we could actually dispose with this altogether, although it
might be nice to have the flexibility to change it later.
llvm-svn: 78458
2009-08-08 05:24:34 +00:00
b94284b5e2
make printInstruction return void since its result is omitted. Make the
...
error condition get trapped with an assert.
llvm-svn: 78449
2009-08-08 01:32:19 +00:00
b1692dc267
don't check the result of printInstruction anymore.
...
llvm-svn: 78444
2009-08-08 00:05:42 +00:00
dd71ebbab0
Unbreak build.
...
llvm-svn: 78431
2009-08-07 23:37:47 +00:00
2d423d5a95
fix the column output stuff in the asmwriter from being dynamic and
...
driven by TAI to being static, driven by tblgen. This means that a
target doesn't get impacted by this stuff at all if it doesn't opt
into it.
llvm-svn: 78427
2009-08-07 23:13:38 +00:00
83eb9b0b01
strength reduce anonymous namespace to static.
...
llvm-svn: 78417
2009-08-07 22:27:19 +00:00
d0470d74df
llvm-mc/AsmMatcher: Move emit for register -> enum matcher into a separate routine.
...
llvm-svn: 78408
2009-08-07 21:01:44 +00:00
15b8037034
llvm-mc/AsmMatcher: Tweaks in response to feedback.
...
llvm-svn: 78404
2009-08-07 20:33:39 +00:00
e10787e710
llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
...
- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
llvm-svn: 78378
2009-08-07 08:26:05 +00:00
03cb69fbd1
Privatize the StructType table, which unfortunately involves routing contexts through a number of APIs.
...
llvm-svn: 78258
2009-08-05 23:16:16 +00:00
1efb6b0391
Suppress compiler warning.
...
llvm-svn: 78246
2009-08-05 21:42:40 +00:00
fdd2519eb5
Fix some column padding bugs, reorganize things as suggested by Chris
...
and eliminate complexity. Yay!
llvm-svn: 78243
2009-08-05 21:00:52 +00:00
f30f4a5887
TableGen / AsmMatcher: Tweaks to avoid generating completely bogus match
...
functions.
- Fix variant flattening when the variant embeds an operand reference.
- Ignore instructions which reference an operand multiple times (e.g., "xorb
$dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32").
llvm-svn: 78099
2009-08-04 20:36:45 +00:00
442beabbf7
Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).
...
llvm-svn: 77964
2009-08-03 08:13:56 +00:00
b2aebed2dc
Change MCOperand to use Create style instead of Make style for constructing
...
operands.
llvm-svn: 77837
2009-08-02 00:09:22 +00:00
81bcae5fda
Simplify operand padding by keying off tabs in the asm stream. If
...
padding is disabled, tabs get replaced by spaces except in the case of
the first operand, where the tab is output to line up the operands after
the mnemonics.
Add some better comments and eliminate redundant code.
Fix some testcases to not assume tabs.
llvm-svn: 77740
2009-07-31 21:57:10 +00:00
b6d6aa2d22
llvm-mc: Match a few X86 instructions.
...
- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
llvm-svn: 77657
2009-07-31 02:32:59 +00:00
da6efdcd22
Remove unintended changes.
...
llvm-svn: 77616
2009-07-30 18:29:44 +00:00
4d6aa73d6b
Remove itohexstr, which only had one user.
...
llvm-svn: 77613
2009-07-30 18:18:54 +00:00
132f78395a
Twines: Don't allow implicit conversion from integers, this is too tricky.
...
llvm-svn: 77605
2009-07-30 17:37:43 +00:00
27f1a4fe2d
Minor whitespace tidiness.
...
llvm-svn: 77564
2009-07-30 01:33:17 +00:00
4056ca9568
Move types back to the 2.5 API.
...
llvm-svn: 77516
2009-07-29 22:17:13 +00:00
f3239532cc
1. Introduce a new TargetOperandInfo::getRegClass() helper method
...
and convert code to using it, instead of having lots of things
poke the isLookupPtrRegClass() method directly.
2. Make PointerLikeRegClass contain a 'kind' int, and store it in
the existing regclass field of TargetOperandInfo when the
isLookupPtrRegClass() predicate is set. Make getRegClass pass
this into TargetRegisterInfo::getPointerRegClass(), allowing
targets to have multiple ptr_rc things.
llvm-svn: 77504
2009-07-29 21:10:12 +00:00
426bc7c0ae
make ptr_rc derive from a new PointerLikeRegClass tblgen class.
...
llvm-svn: 77503
2009-07-29 20:43:05 +00:00
5b4bc260cd
Re-enable comment and operand padding.
...
Compile times pre-change:
========================
Program | GCCAS Bytecode LLC compile LLC-BETA compile JIT codegen | GCC CBE LLC LLC-BETA JIT | GCC/CBE GCC/LLC GCC/LLC-BETA LLC/LLC-BETA
MultiSource/Applications/Burg/burg | 0.4600 109848 0.8920 * 0.8760 | 0.00 0.00 0.00 * 0.91 | - - n/a n/a
MultiSource/Applications/ClamAV/clamscan | 5.1563 1318528 6.8244 * 3.9042 | 0.20 0.20 0.21 * 4.32 | 1.00 0.95 n/a n/a
MultiSource/Applications/JM/ldecod/ldecod | 3.3082 661960 2.5961 * 2.0801 | 0.08 0.07 0.06 * 2.30 | - - n/a n/a
MultiSource/Applications/JM/lencod/lencod | 6.2883 1442696 6.5964 * 5.6723 | 8.51 8.65 8.37 * 14.76 | 0.98 1.02 n/a n/a
MultiSource/Applications/SIBsim4/SIBsim4 | 0.4040 84528 0.4480 * 0.4440 | 4.33 * 4.76 * 5.43 | n/a 0.91 n/a n/a
MultiSource/Applications/SPASS/SPASS | 6.3684 1594748 5.5563 * 4.0522 | 12.59 12.45 12.23 * 17.21 | 1.01 1.03 n/a n/a
MultiSource/Applications/aha/aha | 0.0280 7104 0.0360 * 0.0280 | 2.23 2.86 2.98 * 3.09 | 0.78 0.75 n/a n/a
MultiSource/Applications/d/make_dparser | 1.1040 299996 0.9440 * 0.8080 | 0.04 * 0.03 * 0.92 | n/a - n/a n/a
MultiSource/Applications/hbd/hbd | 0.2280 82120 0.3880 * 0.3440 | 0.00 0.00 0.00 * 0.36 | - - n/a n/a
MultiSource/Applications/hexxagon/hexxagon | 0.2040 49820 0.2160 * 0.1880 | 12.00 8.97 9.93 * 9.68 | 1.34 1.21 n/a n/a
MultiSource/Applications/kimwitu++/kc | 5.3843 1725192 * * * | 0.00 * * * * | n/a n/a n/a n/a
MultiSource/Applications/lambda-0.1.3/lambda | 0.2000 67120 0.3080 * 0.2440 | 6.12 5.55 5.76 * 6.85 | 1.10 1.06 n/a n/a
MultiSource/Applications/lemon/lemon | 0.3240 104052 0.5440 * 0.0040 | 0.08 0.05 0.06 * 113.63 | - - n/a n/a
MultiSource/Applications/lua/lua | 1.5400 557040 2.2561 * 1.7001 | 28.56 * 31.36 * 33.29 | n/a 0.91 n/a n/a
MultiSource/Applications/minisat/minisat | 0.2440 45840 0.2040 * * | 12.85 * 12.41 * * | n/a 1.04 n/a n/a
MultiSource/Applications/obsequi/Obsequi | 0.3480 59808 0.2800 * 0.2840 | 2.68 * 2.80 * 3.23 | n/a 0.96 n/a n/a
MultiSource/Applications/oggenc/oggenc | 1.5480 803888 1.1800 * 0.9600 | 0.17 * 0.17 * 1.26 | n/a 1.00 n/a n/a
MultiSource/Applications/sgefa/sgefa | 0.0880 16476 0.0840 * 0.0760 | 0.78 0.83 0.85 * 0.97 | 0.94 0.92 n/a n/a
MultiSource/Applications/siod/siod | 0.7120 344048 1.8761 * 0.8120 | 3.62 3.88 3.69 * 4.76 | 0.93 0.98 n/a n/a
MultiSource/Applications/spiff/spiff | 0.1600 50964 0.2440 * * | 1.08 1.10 1.14 * * | 0.98 0.95 n/a n/a
MultiSource/Applications/sqlite3/sqlite3 | 3.9362 1133884 5.1683 * 3.7162 | 4.55 * 5.32 * 9.68 | n/a 0.86 n/a n/a
MultiSource/Applications/treecc/treecc | 0.6800 292592 1.2160 * 0.3200 | 0.00 0.00 0.00 * 0.36 | - - n/a n/a
MultiSource/Applications/viterbi/viterbi | 0.0280 5576 0.0240 * 0.0200 | 12.25 18.43 12.26 * 12.35 | 0.66 1.00 n/a n/a
MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000 | 3.1561 463676 2.5721 * 1.9081 | 7.60 8.29 9.01 * 9.90 | 0.92 0.84 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/AMGmk/AMGmk | 0.1040 13992 0.0680 * 0.0720 | 31.04 23.70 21.64 * 22.44 | 1.31 1.43 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/CrystalMk/CrystalMk | 0.0400 8248 0.0280 * 0.0280 | 12.10 12.64 11.93 * 12.18 | 0.96 1.01 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/IRSmk/IRSmk | 0.0200 5592 0.0240 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/BitBench/drop3/drop3 | 0.0200 3588 0.0160 * 0.0120 | 0.51 0.71 0.47 * 0.50 | 0.72 1.09 n/a n/a
MultiSource/Benchmarks/BitBench/five11/five11 | 0.0160 2724 0.0120 * 0.0120 | 2.48 2.51 2.42 * 2.44 | 0.99 1.02 n/a n/a
MultiSource/Benchmarks/BitBench/uudecode/uudecode | 0.0120 2864 0.0080 * 0.0120 | 0.11 0.15 0.14 * 0.15 | 0.73 0.79 n/a n/a
MultiSource/Benchmarks/BitBench/uuencode/uuencode | 0.0120 2728 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1 | 0.0280 8072 0.0360 * 0.0360 | 2.00 1.86 1.85 * 1.88 | 1.08 1.08 n/a n/a
MultiSource/Benchmarks/Fhourstones/fhourstones | 0.0480 10820 0.0440 * 0.0440 | 1.80 1.87 1.77 * 1.94 | 0.96 1.02 n/a n/a
MultiSource/Benchmarks/FreeBench/analyzer/analyzer | 0.0400 10116 0.0480 * 0.0440 | 0.10 0.12 0.10 * 0.17 | 0.83 1.00 n/a n/a
MultiSource/Benchmarks/FreeBench/distray/distray | 0.0120 6944 0.0280 * 0.0280 | 0.25 0.30 0.24 * 0.29 | 0.83 1.04 n/a n/a
MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow | 0.0880 18880 0.0840 * 0.0680 | 0.34 0.37 0.38 * 0.48 | 0.92 0.89 n/a n/a
MultiSource/Benchmarks/FreeBench/mason/mason | 0.0160 6144 0.0200 * 0.0160 | 0.41 0.24 0.25 * 0.27 | 1.71 1.64 n/a n/a
MultiSource/Benchmarks/FreeBench/neural/neural | 0.0560 8772 0.0480 * 0.0480 | 0.26 0.31 0.24 * 0.29 | 0.84 1.08 n/a n/a
MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2 | 0.0480 11040 0.0440 * 0.0480 | 0.29 0.30 0.26 * 0.32 | 0.97 1.12 n/a n/a
MultiSource/Benchmarks/FreeBench/pifft/pifft | 0.2480 58904 0.2960 * 0.2800 | 0.12 0.14 0.15 * 0.45 | 0.86 0.80 n/a n/a
MultiSource/Benchmarks/MallocBench/cfrac/cfrac | 0.2200 92136 0.3000 * 0.2800 | 1.78 * 1.66 * 1.95 | n/a 1.07 n/a n/a
MultiSource/Benchmarks/MallocBench/espresso/espresso | 1.3760 407284 2.0041 * 1.3720 | 0.57 0.58 0.56 * 2.00 | 0.98 1.02 n/a n/a
MultiSource/Benchmarks/MallocBench/gs/gs | 1.1400 376444 1.4400 * 0.6240 | 0.04 * 0.04 * 0.73 | n/a - n/a n/a
MultiSource/Benchmarks/McCat/01-qbsort/qbsort | 0.0160 3456 0.0160 * 0.0160 | 0.07 0.06 0.06 * 0.09 | - - n/a n/a
MultiSource/Benchmarks/McCat/03-testtrie/testtrie | 0.0160 3780 0.0160 * 0.0240 | 0.01 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/McCat/04-bisect/bisect | 0.0120 3984 0.0200 * 0.0160 | 0.16 0.25 0.18 * 0.21 | 0.64 0.89 n/a n/a
MultiSource/Benchmarks/McCat/05-eks/eks | 0.1000 7532 0.0400 * 0.0360 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/McCat/08-main/main | 0.0600 12004 0.0360 * 0.0400 | 0.05 0.03 0.03 * 0.08 | - - n/a n/a
MultiSource/Benchmarks/McCat/09-vor/vor | 0.0720 23092 0.0920 * 0.0960 | 0.15 0.13 0.14 * 0.25 | 1.15 1.07 n/a n/a
MultiSource/Benchmarks/McCat/12-IOtest/iotest | 0.0160 2576 0.0120 * 0.0159 | 0.38 0.27 0.24 * 0.27 | 1.41 1.58 n/a n/a
MultiSource/Benchmarks/McCat/15-trie/trie | 0.0080 3216 0.0160 * 0.0160 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/McCat/17-bintr/bintr | 0.0160 3668 0.0160 * 0.0160 | 0.12 0.11 0.11 * 0.14 | 1.09 1.09 n/a n/a
MultiSource/Benchmarks/McCat/18-imp/imp | 0.0680 21096 0.1000 * 0.0880 | 0.08 0.08 0.10 * 0.21 | - - n/a n/a
MultiSource/Benchmarks/MiBench/automotive-basicmath/automotive-basicmath | 0.0160 4808 0.0280 * 0.0240 | 0.55 0.54 0.55 * 0.58 | 1.02 1.00 n/a n/a
MultiSource/Benchmarks/MiBench/automotive-bitcount/automotive-bitcount | 0.0160 3532 0.0160 * 0.0200 | 0.11 0.16 0.14 * 0.16 | 0.69 0.79 n/a n/a
MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan | 0.2720 64100 0.2840 * 0.2760 | 0.06 0.08 0.05 * 0.34 | - - n/a n/a
MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg | 1.1640 201192 0.7360 * 0.3800 | 0.00 0.00 0.00 * 0.41 | - - n/a n/a
MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame | 1.3200 331160 1.1360 * 0.9720 | 0.34 * 0.33 * 1.38 | n/a 1.03 n/a n/a
MultiSource/Benchmarks/MiBench/consumer-typeset/consumer-typeset | 7.6004 1392340 5.9563 * 5.1283 | 0.23 * 0.22 * 5.57 | n/a 1.05 n/a n/a
MultiSource/Benchmarks/MiBench/network-dijkstra/network-dijkstra | 0.0120 3456 0.0160 * 0.0120 | 0.05 0.05 0.05 * 0.07 | - - n/a n/a
MultiSource/Benchmarks/MiBench/network-patricia/network-patricia | 0.0200 4268 0.0200 * 0.0200 | 0.16 0.17 0.16 * 0.19 | 0.94 1.00 n/a n/a
MultiSource/Benchmarks/MiBench/office-ispell/office-ispell | 0.4920 128824 0.6520 * 0.2080 | 0.00 0.00 0.00 * 0.22 | - - n/a n/a
MultiSource/Benchmarks/MiBench/office-stringsearch/office-stringsearch | 0.0240 13212 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish | 0.1080 31024 0.0880 * 0.0520 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-rijndael/security-rijndael | 0.1320 51332 0.0840 * 0.0560 | 0.05 0.04 0.07 * 0.14 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-sha/security-sha | 0.0200 4764 0.0200 * 0.0200 | 0.01 0.02 0.02 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-CRC32/telecomm-CRC32 | 0.0080 3180 0.0080 * 0.0000 | 0.32 0.29 0.31 * 0.30 | 1.10 1.03 n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-FFT/telecomm-fft | 0.0120 4852 0.0240 * 0.0200 | 0.07 0.06 0.06 * 0.09 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-adpcm/telecomm-adpcm | 0.0080 2192 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm | 0.3440 73804 0.2120 * 0.1520 | 0.23 0.21 0.22 * 0.39 | 1.10 1.05 n/a n/a
MultiSource/Benchmarks/NPB-serial/is/is | 0.0080 5108 0.0200 * 0.3200 | 11.11 10.74 11.04 * 10.79 | 1.03 1.01 n/a n/a
MultiSource/Benchmarks/Olden/bh/bh | 0.0840 15196 0.0680 * 0.0720 | 2.51 * 2.17 * 2.26 | n/a 1.16 n/a n/a
MultiSource/Benchmarks/Olden/bisort/bisort | 0.0160 3672 0.0200 * 0.0240 | 1.02 1.13 1.06 * 1.12 | 0.90 0.96 n/a n/a
MultiSource/Benchmarks/Olden/em3d/em3d | 0.0360 6424 0.0320 * 0.0280 | 3.61 4.85 3.42 * 3.43 | 0.74 1.06 n/a n/a
MultiSource/Benchmarks/Olden/health/health | 0.0360 7576 0.0240 * 0.0320 | 0.63 * 0.61 * 0.67 | n/a 1.03 n/a n/a
MultiSource/Benchmarks/Olden/mst/mst | 0.0320 4176 0.0200 * 0.0200 | 0.19 0.19 0.19 * 0.23 | 1.00 1.00 n/a n/a
MultiSource/Benchmarks/Olden/perimeter/perimeter | 0.0160 12280 0.0680 * 0.0680 | 0.39 0.38 0.41 * 0.46 | 1.03 0.95 n/a n/a
MultiSource/Benchmarks/Olden/power/power | 0.0320 8572 0.0280 * 0.0280 | 3.37 3.39 3.08 * 3.08 | 0.99 1.09 n/a n/a
MultiSource/Benchmarks/Olden/treeadd/treeadd | 0.0080 1812 0.0080 * 0.0080 | 8.40 0.49 0.45 * 0.45 | 17.14 18.67 n/a n/a
MultiSource/Benchmarks/Olden/tsp/tsp | 0.0200 6984 0.0240 * 0.0240 | 2.88 2.91 2.65 * 2.68 | 0.99 1.09 n/a n/a
MultiSource/Benchmarks/Olden/voronoi/voronoi | 0.0640 13420 0.0520 * 0.0520 | 0.50 0.50 0.46 * 0.54 | 1.00 1.09 n/a n/a
MultiSource/Benchmarks/OptimizerEval/optimizer-eval | 0.0480 28884 0.1120 * 0.1240 | 114.08 118.50 114.69 * 106.23 | 0.96 0.99 n/a n/a
MultiSource/Benchmarks/PAQ8p/paq8p | 0.8880 194020 * * * | 0.00 * * * * | n/a n/a n/a n/a
MultiSource/Benchmarks/Prolangs-C++/NP/np | 0.0000 1184 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/city/city | 0.1040 23800 0.0760 * 0.0480 | 0.00 0.00 0.00 * 0.06 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/deriv1/deriv1 | 0.0240 12984 0.0440 * 0.0240 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/deriv2/deriv2 | 0.0440 14516 0.0520 * 0.0320 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/employ/employ | 0.0760 21948 0.0840 * 0.0600 | 0.01 0.00 0.00 * 0.07 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/family/family | 0.0040 3392 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/fsm/fsm | 0.0160 1880 0.0080 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/garage/garage | 0.0160 7424 0.0240 * 0.0240 | 0.00 0.01 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/life/life | 0.0280 6304 0.0280 * 0.0200 | 1.44 1.42 1.46 * 1.79 | 1.01 0.99 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/objects/objects | 0.0200 9860 0.0400 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/ocean/ocean | 0.0440 8856 0.0280 * 0.0360 | 0.14 0.16 0.15 * 0.19 | 0.88 0.93 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/office/office | 0.0520 12968 0.0360 * 0.0320 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/primes/primes | 0.0040 1592 0.0040 * 0.0040 | 0.46 0.46 0.47 * 0.47 | 1.00 0.98 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/shapes/shapes | 0.0520 16060 0.0560 * 0.0480 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/simul/simul | 0.0159 4164 0.0160 * 0.0040 | 0.01 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/trees/trees | 0.0320 11272 0.0440 * 0.0320 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/vcirc/vcirc | 0.0080 1804 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc | 1.8081 545152 2.7801 * 0.5280 | 0.00 0.00 0.00 * 0.56 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/agrep/agrep | 0.3440 90404 0.4160 * 0.1560 | 0.00 0.00 0.00 * 0.17 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/allroots/allroots | 0.0120 3512 0.0160 * 0.0160 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/archie-client/archie | 0.1640 47672 0.1880 * 0.0320 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/assembler/assembler | 0.1680 61488 0.3400 * 0.2680 | 0.00 0.00 0.00 * 0.28 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/bison/mybison | 0.3200 108708 0.8880 * 0.7600 | 0.00 0.00 0.00 * 0.79 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/cdecl/cdecl | 0.0960 48928 0.2800 * 0.2960 | 0.00 0.00 0.00 * 0.31 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/compiler/compiler | 0.0920 36336 0.2120 * 0.0360 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/fixoutput/fixoutput | 0.0120 5980 0.0320 * 0.0280 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/football/football | 0.3240 85220 0.4480 * 0.0280 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/gnugo/gnugo | 0.1160 35268 0.1760 * 0.2080 | 0.08 0.06 0.07 * 0.29 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/loader/loader | 0.0920 28112 0.1200 * 0.0840 | 0.00 0.00 0.00 * 0.08 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/plot2fig/plot2fig | 0.0440 14648 0.0760 * 0.0720 | 0.00 0.00 0.00 * 0.07 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/simulator/simulator | 0.2400 64272 0.2760 * 0.0400 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail | 0.1080 39464 0.2240 * 0.1720 | 0.01 0.00 0.00 * 0.18 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/unix-tbl/unix-tbl | 0.2720 75600 0.3840 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Ptrdist/anagram/anagram | 0.0200 7644 0.0320 * 0.0360 | 1.35 1.15 1.34 * 1.38 | 1.17 1.01 n/a n/a
MultiSource/Benchmarks/Ptrdist/bc/bc | 0.3720 125596 0.6160 * 0.5960 | 0.67 0.68 0.68 * 1.30 | 0.99 0.99 n/a n/a
MultiSource/Benchmarks/Ptrdist/ft/ft | 0.0280 7152 0.0320 * 0.0320 | 1.59 1.62 1.62 * 1.63 | 0.98 0.98 n/a n/a
MultiSource/Benchmarks/Ptrdist/ks/ks | 0.0400 11892 0.0520 * 0.0520 | 2.13 2.24 2.34 * 2.30 | 0.95 0.91 n/a n/a
MultiSource/Benchmarks/Ptrdist/yacr2/yacr2 | 0.1760 48272 0.2520 * 0.2680 | 0.91 0.95 1.31 * 1.58 | 0.96 0.69 n/a n/a
MultiSource/Benchmarks/SciMark2-C/scimark2 | 0.0600 15428 0.0760 * 0.0800 | 27.87 * 28.42 * 28.58 | n/a 0.98 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-3des/enc-3des | 0.1600 21512 0.0920 * 0.0880 | 2.32 2.21 2.22 * 2.34 | 1.05 1.05 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-md5/enc-md5 | 0.0520 7660 0.0400 * 0.0400 | 2.33 2.18 2.10 * 2.14 | 1.07 1.11 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-pc1/enc-pc1 | 0.0200 3900 0.0160 * 0.0160 | 0.79 0.50 0.82 * 0.89 | 1.58 0.96 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-rc4/enc-rc4 | 0.0120 2956 0.0120 * 0.0080 | 1.37 1.54 1.20 * 1.26 | 0.89 1.14 n/a n/a
MultiSource/Benchmarks/Trimaran/netbench-crc/netbench-crc | 0.0120 32656 0.0120 * 0.0080 | 1.12 1.10 1.08 * 1.11 | 1.02 1.04 n/a n/a
MultiSource/Benchmarks/Trimaran/netbench-url/netbench-url | 0.0280 40864 0.0400 * 0.0400 | 2.95 3.26 4.00 * 4.50 | 0.90 0.74 n/a n/a
MultiSource/Benchmarks/VersaBench/8b10b/8b10b | 0.0080 2168 0.0080 * 0.0040 | 9.11 7.13 5.20 * 5.14 | 1.28 1.75 n/a n/a
MultiSource/Benchmarks/VersaBench/beamformer/beamformer | 0.0320 5748 0.0200 * 0.0240 | 1.94 2.57 2.21 * 2.25 | 0.75 0.88 n/a n/a
MultiSource/Benchmarks/VersaBench/bmm/bmm | 0.0120 2924 0.0120 * 0.0240 | 2.54 2.72 2.48 * 2.51 | 0.93 1.02 n/a n/a
MultiSource/Benchmarks/VersaBench/dbms/dbms | 0.1040 36324 0.2040 * 0.1960 | 1.94 2.22 1.84 * 2.08 | 0.87 1.05 n/a n/a
MultiSource/Benchmarks/VersaBench/ecbdes/ecbdes | 0.0640 9772 0.0200 * 0.0160 | 3.00 2.88 2.86 * 2.89 | 1.04 1.05 n/a n/a
MultiSource/Benchmarks/llubenchmark/llu | 0.0160 3712 0.0200 * 0.0160 | 13.48 13.66 13.13 * 13.47 | 0.99 1.03 n/a n/a
MultiSource/Benchmarks/mafft/pairlocalalign | 3.9162 341756 1.7401 * * | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio | 0.0080 2324 0.0080 * 0.0080 | 0.01 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio | 0.0120 2192 0.0080 * 0.0080 | 0.01 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/mediabench/g721/g721encode/encode | 0.0760 13112 0.0560 * 0.0360 | 0.06 0.06 0.08 * 0.12 | - - n/a n/a
MultiSource/Benchmarks/mediabench/gsm/toast/toast | 0.3520 73804 0.2160 * 0.1440 | 0.02 0.03 0.02 * 0.19 | - - n/a n/a
MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg | 1.2040 170484 0.6320 * 0.4080 | 0.02 0.00 0.00 * 0.46 | - - n/a n/a
MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode | 0.4440 101604 0.4720 * 0.3920 | 0.03 0.02 0.02 * 0.44 | - - n/a n/a
MultiSource/Benchmarks/sim/sim | 0.0760 28120 0.1400 * 0.1400 | 5.52 5.66 5.39 * 5.63 | 0.98 1.02 n/a n/a
MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4 | 7.8485 1966488 4.8003 * 4.5322 | 0.73 * 0.77 * 5.70 | n/a 0.95 n/a n/a
SingleSource/Benchmarks/Adobe-C++/functionobjects | 0.1760 35452 0.1400 * 0.1320 | 4.05 5.77 3.56 * 3.77 | 0.70 1.14 n/a n/a
SingleSource/Benchmarks/Adobe-C++/loop_unroll | 0.9280 318836 1.5600 * 1.6120 | 1.85 1.97 1.84 * 3.57 | 0.94 1.01 n/a n/a
SingleSource/Benchmarks/Adobe-C++/simple_types_constant_folding | 0.8000 185368 1.9881 * 2.0041 | 1.45 2.52 1.39 * 3.48 | 0.58 1.04 n/a n/a
SingleSource/Benchmarks/Adobe-C++/simple_types_loop_invariant | 0.5200 137288 1.0040 * 1.0000 | 4.17 4.93 3.83 * 4.86 | 0.85 1.09 n/a n/a
SingleSource/Benchmarks/Adobe-C++/stepanov_abstraction | 0.2560 37428 0.1280 * 0.1280 | 5.24 11.63 5.19 * 5.35 | 0.45 1.01 n/a n/a
SingleSource/Benchmarks/Adobe-C++/stepanov_vector | 0.2760 41136 0.1480 * 0.1480 | 3.09 7.09 3.03 * 3.21 | 0.44 1.02 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/fannkuch | 0.0160 2672 0.0080 * 0.0040 | 4.23 4.09 3.60 * 3.49 | 1.03 1.18 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/fasta | 0.0120 3020 0.0120 * 0.0120 | 1.29 1.66 1.32 * 1.31 | 0.78 0.98 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/n-body | 0.0160 3192 0.0120 * 0.0080 | 2.37 2.12 2.07 * 2.09 | 1.12 1.14 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/nsieve-bits | 0.0000 1120 0.0080 * 0.0040 | 1.66 1.76 1.68 * 1.56 | 0.94 0.99 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/partialsums | 0.0040 1660 0.0120 * 0.0040 | 1.17 1.19 1.22 * 1.23 | 0.98 0.96 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/puzzle | 0.0080 1264 0.0080 * 0.0040 | 0.60 0.98 0.56 * 0.58 | 0.61 1.07 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/recursive | 0.0000 3444 0.0240 * 0.0280 | 1.23 1.12 1.02 * 1.05 | 1.10 1.21 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/spectral-norm | 0.0160 2792 0.0120 * 0.0080 | 3.08 3.10 2.08 * 2.09 | 0.99 1.48 n/a n/a
SingleSource/Benchmarks/CoyoteBench/almabench | 0.0080 5816 0.0120 * 0.0120 | 18.99 8.40 8.37 * 8.42 | 2.26 2.27 n/a n/a
SingleSource/Benchmarks/CoyoteBench/fftbench | 0.0960 22440 0.0720 * 0.0720 | 2.53 * 2.65 * 2.75 | n/a 0.95 n/a n/a
SingleSource/Benchmarks/CoyoteBench/huffbench | 0.0200 6616 0.0320 * 0.0280 | 18.90 21.98 18.80 * 19.12 | 0.86 1.01 n/a n/a
SingleSource/Benchmarks/CoyoteBench/lpbench | 0.0280 4408 0.0200 * 0.0200 | 14.41 16.14 14.63 * 15.43 | 0.89 0.98 n/a n/a
SingleSource/Benchmarks/Dhrystone/dry | 0.0120 1268 0.0040 * 0.0040 | 2.62 0.46 0.63 * 0.64 | 5.70 4.16 n/a n/a
SingleSource/Benchmarks/Dhrystone/fldry | 0.0120 1300 0.0040 * 0.0040 | 2.85 1.80 0.47 * 0.51 | 1.58 6.06 n/a n/a
SingleSource/Benchmarks/McGill/chomp | 0.0440 6140 0.0360 * 0.0360 | 1.37 1.02 1.38 * 1.10 | 1.34 0.99 n/a n/a
SingleSource/Benchmarks/McGill/exptree | 0.0120 4800 0.0200 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/McGill/misr | 0.0160 2700 0.0160 * 0.0120 | 0.36 0.30 0.31 * 0.34 | 1.20 1.16 n/a n/a
SingleSource/Benchmarks/McGill/queens | 0.0080 3316 0.0160 * 0.0120 | 2.90 2.57 2.46 * 2.58 | 1.13 1.18 n/a n/a
SingleSource/Benchmarks/Misc-C++/bigfib | 0.2240 41088 0.1680 * 0.1320 | 0.64 * 0.66 * 0.81 | n/a 0.97 n/a n/a
SingleSource/Benchmarks/Misc-C++/mandel-text | 0.0080 1152 0.0080 * 0.0080 | 2.64 3.19 2.34 * 2.35 | 0.83 1.13 n/a n/a
SingleSource/Benchmarks/Misc-C++/oopack_v1p8 | 0.0400 9456 0.0320 * 0.0320 | 0.22 0.35 0.18 * 0.22 | 0.63 1.22 n/a n/a
SingleSource/Benchmarks/Misc-C++/ray | 0.0720 17280 0.0520 * 0.0520 | 6.75 8.21 5.02 * 5.18 | 0.82 1.34 n/a n/a
SingleSource/Benchmarks/Misc-C++/sphereflake | 0.0560 16904 0.0640 * 0.0600 | 3.42 5.60 3.37 * 3.47 | 0.61 1.01 n/a n/a
SingleSource/Benchmarks/Misc-C++/stepanov_container | 0.2520 46076 0.1600 * 0.1480 | 8.13 7.88 7.50 * 7.66 | 1.03 1.08 n/a n/a
SingleSource/Benchmarks/Misc-C++/stepanov_v1p2 | 0.0640 10008 0.0360 * 0.0320 | 8.19 15.84 8.18 * 8.21 | 0.52 1.00 n/a n/a
SingleSource/Benchmarks/Misc/ReedSolomon | 0.0680 10188 0.0440 * 0.0440 | 7.89 8.63 7.44 * 7.84 | 0.91 1.06 n/a n/a
SingleSource/Benchmarks/Misc/fbench | 0.0160 5364 0.0200 * 0.0200 | 2.20 2.27 2.54 * 2.61 | 0.97 0.87 n/a n/a
SingleSource/Benchmarks/Misc/ffbench | 0.0200 4340 0.0160 * 0.0160 | 0.97 1.08 1.10 * 1.13 | 0.90 0.88 n/a n/a
SingleSource/Benchmarks/Misc/flops | 0.0200 6552 0.0280 * 0.0280 | 16.68 13.01 15.85 * 15.51 | 1.28 1.05 n/a n/a
SingleSource/Benchmarks/Misc/flops-1 | 0.0040 1152 0.0000 * 0.0000 | 4.48 4.05 4.61 * 4.08 | 1.11 0.97 n/a n/a
SingleSource/Benchmarks/Misc/flops-2 | 0.0040 1252 0.0040 * 0.0040 | 2.22 2.51 2.21 * 2.22 | 0.88 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-3 | 0.0040 1172 0.0040 * 0.0040 | 2.74 3.22 3.00 * 3.08 | 0.85 0.91 n/a n/a
SingleSource/Benchmarks/Misc/flops-4 | 0.0040 1152 0.0000 * 0.0040 | 4.05 1.35 1.39 * 1.40 | 3.00 2.91 n/a n/a
SingleSource/Benchmarks/Misc/flops-5 | 0.0040 1284 0.0040 * 0.0040 | 6.85 3.92 4.46 * 4.51 | 1.75 1.54 n/a n/a
SingleSource/Benchmarks/Misc/flops-6 | 0.0040 1284 0.0040 * 0.0040 | 5.09 4.86 5.10 * 5.11 | 1.05 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-7 | 0.0040 1080 0.0040 * 0.0000 | 6.21 6.14 6.18 * 6.51 | 1.01 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-8 | 0.0040 1288 0.0040 * 0.0040 | 5.42 3.92 2.36 * 2.36 | 1.38 2.30 n/a n/a
SingleSource/Benchmarks/Misc/himenobmtxpa | 0.0520 9672 0.0400 * 0.0480 | 1.41 2.55 2.06 * 2.22 | 0.55 0.68 n/a n/a
SingleSource/Benchmarks/Misc/mandel | 0.0040 1084 0.0040 * 0.0040 | 1.50 1.65 1.69 * 2.02 | 0.91 0.89 n/a n/a
SingleSource/Benchmarks/Misc/mandel-2 | 0.0040 1052 0.0040 * 0.0040 | 1.21 1.39 1.03 * 1.05 | 0.87 1.17 n/a n/a
SingleSource/Benchmarks/Misc/oourafft | 0.0760 13464 0.0520 * 0.0520 | 6.32 8.76 8.12 * 7.27 | 0.72 0.78 n/a n/a
SingleSource/Benchmarks/Misc/perlin | 0.0160 4476 0.0160 * 0.0200 | 5.97 6.71 6.85 * 6.86 | 0.89 0.87 n/a n/a
SingleSource/Benchmarks/Misc/pi | 0.0040 1152 0.0040 * 0.0040 | 1.00 0.94 1.01 * 0.93 | 1.06 0.99 n/a n/a
SingleSource/Benchmarks/Misc/richards_benchmark | 0.0160 5752 0.0160 * 0.0160 | 0.95 1.09 1.16 * 1.32 | 0.87 0.82 n/a n/a
SingleSource/Benchmarks/Misc/salsa20 | 0.0160 2700 0.0120 * 0.0120 | 10.50 9.39 9.51 * 9.82 | 1.12 1.10 n/a n/a
SingleSource/Benchmarks/Misc/whetstone | 0.0160 3356 0.0200 * 0.0160 | 2.47 2.53 2.50 * 2.52 | 0.98 0.99 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ackermann | 0.0360 11116 0.0360 * 0.0280 | 1.86 1.04 1.15 * 1.11 | 1.79 1.62 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary | 0.0440 9192 0.0280 * 0.0280 | 0.12 0.15 0.14 * 0.18 | 0.80 0.86 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary2 | 0.0440 9808 0.0320 * 0.0360 | 0.14 0.14 0.15 * 0.18 | 1.00 0.93 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary3 | 0.0480 11680 0.0400 * 0.0440 | 5.59 5.58 5.99 * 5.75 | 1.00 0.93 n/a n/a
SingleSource/Benchmarks/Shootout-C++/except | 0.0360 11384 * * * | 0.28 * * * * | n/a n/a n/a n/a
SingleSource/Benchmarks/Shootout-C++/fibo | 0.0240 7952 0.0280 * 0.0280 | 2.58 0.58 0.56 * 0.61 | 4.45 4.61 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hash | 0.0760 15128 0.0440 * 0.0440 | 0.79 0.79 0.77 * 0.96 | 1.00 1.03 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hash2 | 0.0920 20148 0.0680 * 0.0640 | 4.80 4.78 4.70 * 4.75 | 1.00 1.02 n/a n/a
SingleSource/Benchmarks/Shootout-C++/heapsort | 0.0040 3016 0.0040 * 0.0079 | 5.57 6.03 5.45 * 5.39 | 0.92 1.02 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hello | 0.0280 8392 0.0240 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/lists | 0.0480 11472 0.0400 * 0.0360 | 6.08 6.19 6.18 * 6.54 | 0.98 0.98 n/a n/a
SingleSource/Benchmarks/Shootout-C++/lists1 | 0.0840 16308 0.0640 * 0.0680 | 0.38 0.38 0.39 * 0.51 | 1.00 0.97 n/a n/a
SingleSource/Benchmarks/Shootout-C++/matrix | 0.0440 12240 0.0440 * 0.0440 | 3.41 3.53 3.48 * 3.55 | 0.97 0.98 n/a n/a
SingleSource/Benchmarks/Shootout-C++/methcall | 0.0360 10872 0.0239 * 0.0240 | 6.00 6.45 5.72 * 7.85 | 0.93 1.05 n/a n/a
SingleSource/Benchmarks/Shootout-C++/moments | 0.0480 9092 0.0240 * 0.0280 | 0.22 0.24 0.23 * 0.28 | 0.92 0.96 n/a n/a
SingleSource/Benchmarks/Shootout-C++/nestedloop | 0.0280 8124 0.0280 * 0.0240 | 8.02 0.17 0.17 * 0.21 | 47.18 47.18 n/a n/a
SingleSource/Benchmarks/Shootout-C++/objinst | 0.0400 11068 0.0360 * 0.0280 | 6.91 5.64 5.69 * 5.83 | 1.23 1.21 n/a n/a
SingleSource/Benchmarks/Shootout-C++/random | 0.0280 7924 0.0240 * 0.0240 | 6.70 4.40 4.70 * 4.68 | 1.52 1.43 n/a n/a
SingleSource/Benchmarks/Shootout-C++/reversefile | 0.1040 17488 0.0560 * 0.0400 | 0.00 * 0.01 * 0.04 | n/a - n/a n/a
SingleSource/Benchmarks/Shootout-C++/sieve | 0.0680 12648 0.0440 * 0.0360 | 2.23 2.43 2.37 * 2.37 | 0.92 0.94 n/a n/a
SingleSource/Benchmarks/Shootout-C++/spellcheck | 0.1000 27360 0.0880 * 0.0440 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/strcat | 0.0480 10628 0.0360 * 0.0320 | 0.15 * 0.10 * 0.17 | n/a 1.50 n/a n/a
SingleSource/Benchmarks/Shootout-C++/sumcol | 0.0240 9084 0.0280 * 0.0200 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/wc | 0.0360 11192 0.0360 * 0.0320 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/wordfreq | 0.0800 18464 0.0600 * 0.0200 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout/ackermann | 0.0040 1180 0.0080 * 0.0040 | 0.00 0.01 0.01 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout/ary3 | 0.0040 1140 0.0040 * 0.0040 | 5.97 5.42 7.90 * 5.45 | 1.10 0.76 n/a n/a
SingleSource/Benchmarks/Shootout/fib2 | 0.0080 964 0.0080 * 0.0040 | 2.60 0.72 0.56 * 0.58 | 3.61 4.64 n/a n/a
SingleSource/Benchmarks/Shootout/hash | 0.0160 2948 0.0120 * 0.0120 | 6.60 6.59 6.58 * 5.70 | 1.00 1.00 n/a n/a
SingleSource/Benchmarks/Shootout/heapsort | 0.0080 1424 0.0080 * 0.0040 | 5.08 5.98 5.24 * 5.28 | 0.85 0.97 n/a n/a
SingleSource/Benchmarks/Shootout/hello | 0.0000 576 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Benchmarks/Shootout/lists | 0.0120 3180 0.0120 * 0.0160 | 5.71 6.02 5.90 * 6.59 | 0.95 0.97 n/a n/a
SingleSource/Benchmarks/Shootout/matrix | 0.0200 4080 0.0120 * 0.0120 | 2.68 4.80 4.01 * 4.03 | 0.56 0.67 n/a n/a
SingleSource/Benchmarks/Shootout/methcall | 0.0040 1568 0.0080 * 0.0119 | 4.88 4.67 4.66 * 6.56 | 1.04 1.05 n/a n/a
SingleSource/Benchmarks/Shootout/nestedloop | 0.0040 1040 0.0080 * 0.0040 | 8.02 0.19 0.17 * 0.18 | 42.21 47.18 n/a n/a
SingleSource/Benchmarks/Shootout/objinst | 0.0040 1664 0.0080 * 0.0120 | 5.12 5.18 5.01 * 4.98 | 0.99 1.02 n/a n/a
SingleSource/Benchmarks/Shootout/random | 0.0000 840 0.0000 * 0.0040 | 4.42 4.43 4.71 * 4.71 | 1.00 0.94 n/a n/a
SingleSource/Benchmarks/Shootout/sieve | 0.0040 1264 0.0040 * 0.0040 | 7.92 7.75 6.41 * 6.56 | 1.02 1.24 n/a n/a
SingleSource/Benchmarks/Shootout/strcat | 0.0040 1316 0.0040 * 0.0040 | 0.16 0.16 0.17 * 0.18 | 1.00 0.94 n/a n/a
SingleSource/Benchmarks/Stanford/Bubblesort | 0.0080 1420 0.0080 * 0.0080 | 0.05 0.05 0.05 * 0.06 | - - n/a n/a
SingleSource/Benchmarks/Stanford/IntMM | 0.0080 1472 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Oscar | 0.0120 3008 0.0080 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Perm | 0.0080 3124 0.0160 * 0.0160 | 0.02 0.04 0.04 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Puzzle | 0.0920 4720 0.0160 * 0.0200 | 0.17 0.22 0.18 * 0.22 | 0.77 0.94 n/a n/a
SingleSource/Benchmarks/Stanford/Queens | 0.0080 2232 0.0120 * 0.0120 | 0.03 0.04 0.04 * 0.06 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Quicksort | 0.0080 1688 0.0040 * 0.0080 | 0.04 0.04 0.04 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Stanford/RealMM | 0.0120 1504 0.0120 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Towers | 0.0080 2432 0.0120 * 0.0080 | 0.02 0.02 0.02 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Treesort | 0.0120 2248 0.0120 * 0.0120 | 0.07 0.09 0.09 * 0.10 | - - n/a n/a
SingleSource/Regression/C++/2003-05-14-array-init | 0.0000 584 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-05-14-expr_stmt | 0.0000 484 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-06-08-BaseType | 0.0000 496 0.0000 * 0.0000 | 0.01 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-06-08-VirtualFunctions | 0.0040 620 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-06-13-Crasher | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/2003-08-20-EnumSizeProblem | 0.0040 456 0.0000 * 0.0000 | 0.01 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/2003-09-29-NonPODsByValue | 0.0000 576 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2008-01-29-ParamAliasesReturn | 0.0040 604 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/BuiltinTypeInfo | 0.0000 728 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/EH/ConditionalExpr | 0.0000 712 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/EH/ctor_dtor_count | 0.0000 1048 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/ctor_dtor_count-2 | 0.0000 1592 * * * | 0.01 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/dead_try_block | 0.0040 568 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/EH/exception_spec_test | 0.0040 2464 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/function_try_block | 0.0040 2452 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/simple_rethrow | 0.0040 1444 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/simple_throw | 0.0000 956 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/throw_rethrow_test | 0.0040 1792 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/global_ctor | 0.0040 1344 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/global_type | 0.0000 456 0.0000 * 0.0000 | 0.00 0.01 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/ofstream_ctor | 0.0240 9224 0.0200 * 0.0240 | 0.01 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Regression/C++/pointer_member | 0.0000 660 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/pointer_method | 0.0000 664 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/short_circuit_dtor | 0.0000 644 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-14-initialize-string | 0.0000 680 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-05-21-BitfieldHandling | 0.0000 1152 0.0040 * 0.0040 | 0.00 * 0.00 * 0.00 | n/a - n/a n/a
SingleSource/Regression/C/2003-05-21-UnionBitfields | 0.0040 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-21-UnionTest | 0.0000 580 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-22-LocalTypeTest | 0.0000 624 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-22-VarSizeArray | 0.0000 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-05-23-TransparentUnion | 0.0040 576 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-06-16-InvalidInitializer | 0.0000 456 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-06-16-VolatileError | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-10-12-GlobalVarInitializers | 0.0000 664 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2004-02-03-AggregateCopy | 0.0040 588 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Regression/C/2004-03-15-IndirectGoto | 0.0000 860 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2004-08-12-InlinerAndAllocas | 0.0040 824 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2005-05-06-LongLongSignedShift | 0.0040 608 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2008-01-07-LongDouble | 0.0000 596 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/ConstructorDestructorAttributes | 0.0000 760 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/DuffsDevice | 0.0040 1084 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/PR1386 | 0.0000 588 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/PR491 | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/PR640 | 0.0080 2076 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/badidx | 0.0040 1004 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/bigstack | 0.0080 4116 0.0120 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/callargs | 0.0040 928 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/casts | 0.0040 3596 0.0160 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Regression/C/globalrefs | 0.0000 932 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/matrixTranspose | 0.0080 1344 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/pointer_arithmetic | 0.0000 488 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/sumarray | 0.0000 948 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/sumarray2d | 0.0040 1080 0.0040 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/sumarraymalloc | 0.0040 1164 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/test_indvars | 0.0080 1436 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/testtrace | 0.0040 1136 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-04-17-PrintfChar | 0.0000 576 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-ArgumentTest | 0.0040 624 0.0000 * 0.0040 | 0.01 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest | 0.0040 1504 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest1 | 0.0000 608 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest2 | 0.0000 728 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest3 | 0.0000 684 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-ManyArguments | 0.0040 696 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-03-NotTest | 0.0040 664 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-19-DivTest | 0.0040 688 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-08-02-CastTest | 0.0000 584 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-08-02-CastTest2 | 0.0000 608 0.0040 * 0.0000 | 0.00 0.01 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-08-19-CodegenBug | 0.0000 568 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-10-09-ArrayResolution | 0.0000 644 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-10-12-StructureArgs | 0.0000 636 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-10-12-StructureArgsSimple | 0.0040 604 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-10-13-BadLoad | 0.0000 572 0.0000 * 0.0000 | 0.00 0.01 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-12-13-MishaTest | 0.0040 584 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-04-22-Switch | 0.0040 736 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-02-DependentPHI | 0.0040 816 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-07-VarArgs | 0.0080 2828 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/2003-05-12-MinIntProblem | 0.0000 568 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-14-AtExit | 0.0040 688 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-26-Shorts | 0.0040 2012 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-31-CastToBool | 0.0000 916 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-31-LongShifts | 0.0040 920 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-07-06-IntOverflow | 0.0000 812 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-08-BitOpsTest | 0.0000 592 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-07-09-LoadShorts | 0.0000 1520 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-09-SignedArgs | 0.0080 1672 0.0080 * 0.0080 | 0.00 0.00 0.01 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-10-SignConversions | 0.0000 792 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-08-05-CastFPToUint | 0.0040 720 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-08-11-VaListArg | 0.0080 3108 0.0160 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-08-20-FoldBug | 0.0000 568 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-09-18-BitFieldTest | 0.0040 612 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-10-13-SwitchTest | 0.0000 652 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-10-29-ScalarReplBug | 0.0000 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2004-02-02-NegativeZero | 0.0000 640 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2004-06-20-StaticBitfieldInit | 0.0000 684 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2004-11-28-GlobalBoolLayout | 0.0000 880 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls | 0.0160 2144 0.0080 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/2005-05-12-Int64ToFP | 0.0040 684 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2005-05-13-SDivTwo | 0.0040 648 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2005-07-15-Bitfield-ABI | 0.0040 596 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2005-07-17-INT-To-FP | 0.0040 928 0.0080 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2005-11-29-LongSwitch | 0.0040 584 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-01-23-UnionInit | 0.0040 2124 0.0040 * 0.0040 | 0.00 * 0.00 * 0.01 | n/a - n/a n/a
SingleSource/UnitTests/2006-01-29-SimpleIndirectCall | 0.0000 796 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-02-04-DivRem | 0.0000 672 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-12-01-float_varg | 0.0040 660 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-12-04-DynAllocAndRestore | 0.0000 480 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-12-07-Compare64BitConstant | 0.0000 592 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2006-12-11-LoadConstants | 0.0280 2704 0.0360 * 0.0320 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/UnitTests/2007-01-04-KNR-Args | 0.0040 668 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2007-03-02-VaCopy | 0.0040 944 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2007-04-10-BitfieldTest | 0.0000 604 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2007-04-25-weak | 0.0000 512 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2008-04-18-LoopBug | 0.0040 1052 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2008-04-20-LoopBug2 | 0.0040 1068 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2008-07-13-InlineSetjmp | 0.0000 832 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2009-04-16-BitfieldInitialization | 0.0040 1888 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/AtomicOps | 0.0040 812 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/FloatPrecision | 0.0000 616 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast | 0.0080 2560 0.0280 * 0.0280 | 0.01 0.02 0.02 * 0.05 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast-bug | 0.0040 628 0.0000 * 0.0040 | 0.01 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast2 | 0.0000 592 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/ccc | 0.0000 760 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/div | 0.0040 1340 0.0040 * 0.0040 | 0.00 0.00 0.01 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/factor | 0.0080 1008 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/rem | 0.0320 9136 0.0880 * 0.0840 | 0.00 0.00 0.01 * 0.10 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/shr | 0.0000 1448 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/StructModifyTest | 0.0000 688 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/TestLoop | 0.0040 680 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Threads/tls | 0.0000 876 0.0040 * * | 0.00 0.00 0.00 * * | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.expandfft | 0.0320 6336 0.0240 * 0.0240 | 0.68 1.43 0.58 * 0.61 | 0.48 1.17 n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.isamax | 0.0120 3156 0.0080 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.shift | 0.0040 828 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.stepfft | 0.0480 9860 0.0440 * 0.0440 | 0.68 1.37 0.64 * 0.68 | 0.50 1.06 n/a n/a
SingleSource/UnitTests/Vector/build | 0.0000 804 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/build2 | 0.0000 1144 0.0040 * 0.0040 | 1.54 1.56 2.03 * 2.05 | 0.99 0.76 n/a n/a
SingleSource/UnitTests/Vector/divides | 0.0000 656 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Vector/multiplies | 0.0120 1652 0.0120 * 0.0120 | 1.26 1.24 3.31 * 3.25 | 1.02 0.38 n/a n/a
SingleSource/UnitTests/Vector/simple | 0.0040 1216 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/sumarray | 0.0000 940 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/sumarray-dbl | 0.0040 1004 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/printargs | 0.0000 760 0.0040 * 0.0000 | 0.01 0.00 0.00 * 0.00 | - - n/a n/a
Post-change:
===========
Program | GCCAS Bytecode LLC compile LLC-BETA compile JIT codegen | GCC CBE LLC LLC-BETA JIT | GCC/CBE GCC/LLC GCC/LLC-BETA LLC/LLC-BETA
MultiSource/Applications/Burg/burg | 0.4440 109848 0.8840 * 0.8680 | 0.00 0.00 0.00 * 0.92 | - - n/a n/a
MultiSource/Applications/ClamAV/clamscan | 5.1803 1318528 6.8444 * 3.9642 | 0.18 0.20 0.20 * 4.36 | 0.90 0.90 n/a n/a
MultiSource/Applications/JM/ldecod/ldecod | 2.7441 661960 2.5761 * 2.0801 | 0.06 0.08 0.07 * 2.29 | - - n/a n/a
MultiSource/Applications/JM/lencod/lencod | 8.0565 1442696 6.6084 * 5.7203 | 8.47 8.71 8.33 * 14.82 | 0.97 1.02 n/a n/a
MultiSource/Applications/SIBsim4/SIBsim4 | 0.4280 84528 0.4360 * 0.4480 | 4.30 * 4.73 * 5.39 | n/a 0.91 n/a n/a
MultiSource/Applications/SPASS/SPASS | 6.2723 1594748 5.5923 * 4.0522 | 12.77 12.03 12.42 * 17.52 | 1.06 1.03 n/a n/a
MultiSource/Applications/aha/aha | 0.0240 7104 0.0320 * 0.0280 | 2.23 2.85 3.00 * 3.11 | 0.78 0.74 n/a n/a
MultiSource/Applications/d/make_dparser | 1.0760 299996 0.9760 * 0.8080 | 0.03 * 0.03 * 0.93 | n/a - n/a n/a
MultiSource/Applications/hbd/hbd | 0.2480 82120 0.4080 * 0.3360 | 0.00 0.00 0.00 * 0.38 | - - n/a n/a
MultiSource/Applications/hexxagon/hexxagon | 0.1920 49820 0.2040 * 0.1960 | 12.04 9.00 9.92 * 9.66 | 1.34 1.21 n/a n/a
MultiSource/Applications/kimwitu++/kc | 5.3083 1725192 * * * | 0.00 * * * * | n/a n/a n/a n/a
MultiSource/Applications/lambda-0.1.3/lambda | 0.1960 67120 0.3360 * 0.2560 | 6.14 5.56 5.74 * 6.83 | 1.10 1.07 n/a n/a
MultiSource/Applications/lemon/lemon | 0.3360 104052 0.5560 * 0.0080 | 0.09 0.06 0.06 * 113.61 | - - n/a n/a
MultiSource/Applications/lua/lua | 1.5240 557040 2.2481 * 1.6441 | 28.54 * 31.44 * 33.39 | n/a 0.91 n/a n/a
MultiSource/Applications/minisat/minisat | 0.2120 45840 0.2040 * * | 12.74 * 12.36 * * | n/a 1.03 n/a n/a
MultiSource/Applications/obsequi/Obsequi | 0.3560 59808 0.2800 * 0.2840 | 2.72 * 2.76 * 3.18 | n/a 0.99 n/a n/a
MultiSource/Applications/oggenc/oggenc | 1.5600 803888 1.1920 * 0.9680 | 0.17 * 0.17 * 1.26 | n/a 1.00 n/a n/a
MultiSource/Applications/sgefa/sgefa | 0.0800 16476 0.0840 * 0.0840 | 0.79 0.83 0.84 * 0.97 | 0.95 0.94 n/a n/a
MultiSource/Applications/siod/siod | 0.7200 344048 1.8121 * 0.8000 | 3.69 3.87 3.71 * 4.73 | 0.95 0.99 n/a n/a
MultiSource/Applications/spiff/spiff | 0.1680 50964 0.2480 * * | 1.09 1.10 1.14 * * | 0.99 0.96 n/a n/a
MultiSource/Applications/sqlite3/sqlite3 | 3.9202 1133884 5.1443 * 3.6602 | 4.54 * 5.28 * 9.58 | n/a 0.86 n/a n/a
MultiSource/Applications/treecc/treecc | 0.7240 292592 1.2040 * 0.3400 | 0.00 0.00 0.00 * 0.37 | - - n/a n/a
MultiSource/Applications/viterbi/viterbi | 0.0320 5576 0.0240 * 0.0280 | 12.27 18.49 12.38 * 12.34 | 0.66 0.99 n/a n/a
MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000 | 3.1521 463676 2.5521 * 1.9161 | 7.48 9.09 7.55 * 10.22 | 0.82 0.99 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/AMGmk/AMGmk | 0.0960 13992 0.0680 * 0.0600 | 22.98 31.13 22.41 * 22.35 | 0.74 1.03 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/CrystalMk/CrystalMk | 0.0400 8248 0.0280 * 0.0280 | 12.13 12.64 11.96 * 12.19 | 0.96 1.01 n/a n/a
MultiSource/Benchmarks/ASC_Sequoia/IRSmk/IRSmk | 0.0240 5592 0.0240 * 0.0240 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/BitBench/drop3/drop3 | 0.0120 3588 0.0120 * 0.0160 | 0.50 0.71 0.47 * 0.50 | 0.70 1.06 n/a n/a
MultiSource/Benchmarks/BitBench/five11/five11 | 0.0120 2724 0.0080 * 0.0080 | 2.47 2.49 2.43 * 2.43 | 0.99 1.02 n/a n/a
MultiSource/Benchmarks/BitBench/uudecode/uudecode | 0.0040 2864 0.0120 * 0.0080 | 0.12 0.14 0.13 * 0.15 | 0.86 0.92 n/a n/a
MultiSource/Benchmarks/BitBench/uuencode/uuencode | 0.0120 2728 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1 | 0.0360 8072 0.0360 * 0.0360 | 2.03 1.93 1.85 * 1.91 | 1.05 1.10 n/a n/a
MultiSource/Benchmarks/Fhourstones/fhourstones | 0.0600 10820 0.0440 * 0.0520 | 1.83 1.85 1.82 * 1.99 | 0.99 1.01 n/a n/a
MultiSource/Benchmarks/FreeBench/analyzer/analyzer | 0.0440 10116 0.0480 * 0.0440 | 0.10 0.13 0.11 * 0.16 | 0.77 0.91 n/a n/a
MultiSource/Benchmarks/FreeBench/distray/distray | 0.0240 6944 0.0280 * 0.0320 | 0.25 0.30 0.25 * 0.29 | 0.83 1.00 n/a n/a
MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow | 0.0680 18880 0.0800 * 0.0720 | 0.34 0.37 0.37 * 0.46 | 0.92 0.92 n/a n/a
MultiSource/Benchmarks/FreeBench/mason/mason | 0.0160 6144 0.0200 * 0.0200 | 0.40 0.24 0.25 * 0.28 | 1.67 1.60 n/a n/a
MultiSource/Benchmarks/FreeBench/neural/neural | 0.0440 8772 0.0440 * 0.0480 | 0.26 0.31 0.23 * 0.29 | 0.84 1.13 n/a n/a
MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2 | 0.0560 11040 0.0480 * 0.0520 | 0.29 0.30 0.26 * 0.33 | 0.97 1.12 n/a n/a
MultiSource/Benchmarks/FreeBench/pifft/pifft | 0.2600 58904 0.2800 * 0.2840 | 0.13 0.14 0.15 * 0.45 | 0.93 0.87 n/a n/a
MultiSource/Benchmarks/MallocBench/cfrac/cfrac | 0.2160 92136 0.3000 * 0.2800 | 1.78 * 1.70 * 1.96 | n/a 1.05 n/a n/a
MultiSource/Benchmarks/MallocBench/espresso/espresso | 1.4040 407284 1.9841 * 1.3600 | 0.58 0.58 0.55 * 2.00 | 1.00 1.05 n/a n/a
MultiSource/Benchmarks/MallocBench/gs/gs | 1.1200 376444 1.3960 * 0.6200 | 0.04 * 0.04 * 0.72 | n/a - n/a n/a
MultiSource/Benchmarks/McCat/01-qbsort/qbsort | 0.0120 3456 0.0160 * 0.0200 | 0.05 0.05 0.05 * 0.08 | - - n/a n/a
MultiSource/Benchmarks/McCat/03-testtrie/testtrie | 0.0160 3780 0.0200 * 0.0200 | 0.01 0.00 0.01 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/McCat/04-bisect/bisect | 0.0120 3984 0.0160 * 0.0200 | 0.17 0.25 0.19 * 0.21 | 0.68 0.89 n/a n/a
MultiSource/Benchmarks/McCat/05-eks/eks | 0.0880 7532 0.0360 * 0.0360 | 0.01 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/McCat/08-main/main | 0.0680 12004 0.0320 * 0.0360 | 0.05 0.03 0.02 * 0.06 | - - n/a n/a
MultiSource/Benchmarks/McCat/09-vor/vor | 0.0800 23092 0.0920 * 0.0920 | 0.13 0.14 0.13 * 0.25 | 0.93 1.00 n/a n/a
MultiSource/Benchmarks/McCat/12-IOtest/iotest | 0.0120 2576 0.0120 * 0.0120 | 0.36 0.24 0.24 * 0.27 | 1.50 1.50 n/a n/a
MultiSource/Benchmarks/McCat/15-trie/trie | 0.0040 3216 0.0160 * 0.0200 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/McCat/17-bintr/bintr | 0.0120 3668 0.0160 * 0.0240 | 0.10 0.10 0.10 * 0.14 | 1.00 1.00 n/a n/a
MultiSource/Benchmarks/McCat/18-imp/imp | 0.0720 21096 0.0920 * 0.1040 | 0.08 0.08 0.10 * 0.22 | - - n/a n/a
MultiSource/Benchmarks/MiBench/automotive-basicmath/automotive-basicmath | 0.0160 4808 0.0200 * 0.0280 | 0.55 0.57 0.53 * 0.60 | 0.96 1.04 n/a n/a
MultiSource/Benchmarks/MiBench/automotive-bitcount/automotive-bitcount | 0.0160 3532 0.0120 * 0.0080 | 0.12 0.16 0.14 * 0.15 | 0.75 0.86 n/a n/a
MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan | 0.2800 64100 0.2800 * 0.2680 | 0.05 0.08 0.06 * 0.35 | - - n/a n/a
MultiSource/Benchmarks/MiBench/consumer-jpeg/consumer-jpeg | 1.2880 201192 0.8120 * 0.4280 | 0.01 0.00 0.00 * 0.48 | - - n/a n/a
MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame | 1.3840 331160 1.1440 * 0.9400 | 0.35 * 0.33 * 1.34 | n/a 1.06 n/a n/a
MultiSource/Benchmarks/MiBench/consumer-typeset/consumer-typeset | 7.5284 1392340 5.9403 * 5.1323 | 0.21 * 0.21 * 5.60 | n/a 1.00 n/a n/a
MultiSource/Benchmarks/MiBench/network-dijkstra/network-dijkstra | 0.0120 3456 0.0160 * 0.0200 | 0.05 0.05 0.05 * 0.07 | - - n/a n/a
MultiSource/Benchmarks/MiBench/network-patricia/network-patricia | 0.0280 4268 0.0240 * 0.0240 | 0.16 0.17 0.16 * 0.20 | 0.94 1.00 n/a n/a
MultiSource/Benchmarks/MiBench/office-ispell/office-ispell | 0.5080 128824 0.6520 * 0.2000 | 0.00 0.00 0.00 * 0.20 | - - n/a n/a
MultiSource/Benchmarks/MiBench/office-stringsearch/office-stringsearch | 0.0200 13212 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish | 0.0960 31024 0.0920 * 0.0480 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-rijndael/security-rijndael | 0.1280 51332 0.0800 * 0.0640 | 0.04 0.05 0.07 * 0.14 | - - n/a n/a
MultiSource/Benchmarks/MiBench/security-sha/security-sha | 0.0160 4764 0.0160 * 0.0160 | 0.01 0.03 0.02 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-CRC32/telecomm-CRC32 | 0.0040 3180 0.0080 * 0.0040 | 0.33 0.29 0.31 * 0.30 | 1.14 1.06 n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-FFT/telecomm-fft | 0.0200 4852 0.0200 * 0.0240 | 0.08 0.06 0.06 * 0.09 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-adpcm/telecomm-adpcm | 0.0080 2192 0.0040 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm | 0.3680 73804 0.2160 * 0.1480 | 0.22 0.23 0.22 * 0.38 | 0.96 1.00 n/a n/a
MultiSource/Benchmarks/NPB-serial/is/is | 0.0160 5108 0.0160 * 0.3240 | 10.75 11.07 10.63 * 11.42 | 0.97 1.01 n/a n/a
MultiSource/Benchmarks/Olden/bh/bh | 0.0960 15196 0.0760 * 0.0760 | 2.51 * 2.16 * 2.26 | n/a 1.16 n/a n/a
MultiSource/Benchmarks/Olden/bisort/bisort | 0.0080 3672 0.0160 * 0.0240 | 1.05 1.12 1.08 * 1.12 | 0.94 0.97 n/a n/a
MultiSource/Benchmarks/Olden/em3d/em3d | 0.0280 6424 0.0280 * 0.0320 | 3.50 4.86 3.42 * 3.43 | 0.72 1.02 n/a n/a
MultiSource/Benchmarks/Olden/health/health | 0.0280 7576 0.0280 * 0.0280 | 0.61 * 0.62 * 0.63 | n/a 0.98 n/a n/a
MultiSource/Benchmarks/Olden/mst/mst | 0.0240 4176 0.0160 * 0.0240 | 0.19 0.19 0.20 * 0.34 | 1.00 0.95 n/a n/a
MultiSource/Benchmarks/Olden/perimeter/perimeter | 0.0200 12280 0.0720 * 0.0640 | 0.38 0.36 0.36 * 0.42 | 1.06 1.06 n/a n/a
MultiSource/Benchmarks/Olden/power/power | 0.0320 8572 0.0280 * 0.0320 | 3.38 3.38 3.08 * 3.10 | 1.00 1.10 n/a n/a
MultiSource/Benchmarks/Olden/treeadd/treeadd | 0.0000 1812 0.0080 * 0.0080 | 7.07 0.39 0.38 * 0.40 | 18.13 18.61 n/a n/a
MultiSource/Benchmarks/Olden/tsp/tsp | 0.0200 6984 0.0280 * 0.0200 | 2.90 2.92 2.67 * 2.62 | 0.99 1.09 n/a n/a
MultiSource/Benchmarks/Olden/voronoi/voronoi | 0.0560 13420 0.0480 * 0.0520 | 0.46 0.48 0.45 * 0.52 | 0.96 1.02 n/a n/a
MultiSource/Benchmarks/OptimizerEval/optimizer-eval | 0.0680 28884 0.1080 * 0.1800 | 114.14 118.46 115.23 * 105.24 | 0.96 0.99 n/a n/a
MultiSource/Benchmarks/PAQ8p/paq8p | 0.7960 194020 * * * | 0.00 * * * * | n/a n/a n/a n/a
MultiSource/Benchmarks/Prolangs-C++/NP/np | 0.0040 1184 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/city/city | 0.1000 23800 0.0680 * 0.0560 | 0.01 0.01 0.00 * 0.07 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/deriv1/deriv1 | 0.0360 12984 0.0400 * 0.0320 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/deriv2/deriv2 | 0.0400 14516 0.0520 * 0.0360 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/employ/employ | 0.0760 21948 0.0840 * 0.0640 | 0.01 0.00 0.00 * 0.08 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/family/family | 0.0080 3392 0.0160 * 0.0160 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/fsm/fsm | 0.0160 1880 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/garage/garage | 0.0200 7424 0.0200 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/life/life | 0.0240 6304 0.0280 * 0.0200 | 1.43 1.42 1.46 * 1.49 | 1.01 0.98 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/objects/objects | 0.0280 9860 0.0360 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/ocean/ocean | 0.0400 8856 0.0400 * 0.0280 | 0.14 0.15 0.15 * 0.19 | 0.93 0.93 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/office/office | 0.0480 12968 0.0400 * 0.0320 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/primes/primes | 0.0080 1592 0.0080 * 0.0040 | 0.46 0.46 0.47 * 0.48 | 1.00 0.98 n/a n/a
MultiSource/Benchmarks/Prolangs-C++/shapes/shapes | 0.0400 16060 0.0480 * 0.0400 | 0.00 0.00 0.00 * 0.06 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/simul/simul | 0.0280 4164 0.0080 * 0.0080 | 0.01 0.01 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/trees/trees | 0.0360 11272 0.0480 * 0.0440 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C++/vcirc/vcirc | 0.0040 1804 0.0000 * 0.0080 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc | 1.8121 545152 2.7481 * 0.5480 | 0.00 0.00 0.00 * 0.58 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/agrep/agrep | 0.3400 90404 0.4320 * 0.1560 | 0.00 0.00 0.00 * 0.18 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/allroots/allroots | 0.0160 3512 0.0160 * 0.0200 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/archie-client/archie | 0.1680 47672 0.1840 * 0.0360 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/assembler/assembler | 0.1560 61488 0.3320 * 0.2600 | 0.00 0.00 0.00 * 0.28 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/bison/mybison | 0.3160 108708 0.9040 * 0.7640 | 0.00 0.00 0.00 * 0.80 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/cdecl/cdecl | 0.1040 48928 0.2880 * 0.3040 | 0.00 0.00 0.00 * 0.32 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/compiler/compiler | 0.0920 36336 0.2160 * 0.0400 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/fixoutput/fixoutput | 0.0120 5980 0.0360 * 0.0280 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/football/football | 0.3480 85220 0.4520 * 0.0280 | 0.00 0.00 0.00 * 0.04 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/gnugo/gnugo | 0.1040 35268 0.1680 * 0.2080 | 0.09 0.06 0.06 * 0.30 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/loader/loader | 0.0800 28112 0.1200 * 0.0920 | 0.00 0.00 0.00 * 0.09 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/plot2fig/plot2fig | 0.0440 14648 0.0800 * 0.0680 | 0.00 0.00 0.00 * 0.08 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/simulator/simulator | 0.2240 64272 0.2680 * 0.0360 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail | 0.1040 39464 0.2280 * 0.1720 | 0.00 0.00 0.00 * 0.18 | - - n/a n/a
MultiSource/Benchmarks/Prolangs-C/unix-tbl/unix-tbl | 0.3000 75600 0.3880 * 0.0160 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
MultiSource/Benchmarks/Ptrdist/anagram/anagram | 0.0160 7644 0.0280 * 0.0320 | 1.33 1.18 1.32 * 1.38 | 1.13 1.01 n/a n/a
MultiSource/Benchmarks/Ptrdist/bc/bc | 0.3440 125596 0.6040 * 0.5960 | 0.67 0.67 0.68 * 1.30 | 1.00 0.99 n/a n/a
MultiSource/Benchmarks/Ptrdist/ft/ft | 0.0400 7152 0.0280 * 0.0320 | 1.57 1.66 1.57 * 1.71 | 0.95 1.00 n/a n/a
MultiSource/Benchmarks/Ptrdist/ks/ks | 0.0320 11892 0.0480 * 0.0520 | 2.13 2.23 2.34 * 2.29 | 0.96 0.91 n/a n/a
MultiSource/Benchmarks/Ptrdist/yacr2/yacr2 | 0.1760 48272 0.2560 * 0.2640 | 0.90 0.94 1.32 * 1.59 | 0.96 0.68 n/a n/a
MultiSource/Benchmarks/SciMark2-C/scimark2 | 0.0840 15428 0.0720 * 0.0760 | 27.89 * 28.38 * 28.59 | n/a 0.98 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-3des/enc-3des | 0.1600 21512 0.0880 * 0.0920 | 2.32 2.20 2.21 * 2.32 | 1.05 1.05 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-md5/enc-md5 | 0.0560 7660 0.0400 * 0.0400 | 2.34 2.18 2.10 * 2.15 | 1.07 1.11 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-pc1/enc-pc1 | 0.0200 3900 0.0120 * 0.0160 | 0.79 0.50 0.82 * 0.89 | 1.58 0.96 n/a n/a
MultiSource/Benchmarks/Trimaran/enc-rc4/enc-rc4 | 0.0160 2956 0.0120 * 0.0120 | 1.28 1.52 1.21 * 1.20 | 0.84 1.06 n/a n/a
MultiSource/Benchmarks/Trimaran/netbench-crc/netbench-crc | 0.0080 32656 0.0080 * 0.0120 | 1.11 1.09 1.07 * 1.09 | 1.02 1.04 n/a n/a
MultiSource/Benchmarks/Trimaran/netbench-url/netbench-url | 0.0239 40864 0.0400 * 0.0400 | 2.95 3.27 4.05 * 4.67 | 0.90 0.73 n/a n/a
MultiSource/Benchmarks/VersaBench/8b10b/8b10b | 0.0040 2168 0.0040 * 0.0080 | 9.09 7.13 5.20 * 5.12 | 1.27 1.75 n/a n/a
MultiSource/Benchmarks/VersaBench/beamformer/beamformer | 0.0280 5748 0.0200 * 0.0240 | 1.93 2.55 2.22 * 2.25 | 0.76 0.87 n/a n/a
MultiSource/Benchmarks/VersaBench/bmm/bmm | 0.0200 2924 0.0160 * 0.0240 | 2.54 2.71 2.47 * 2.52 | 0.94 1.03 n/a n/a
MultiSource/Benchmarks/VersaBench/dbms/dbms | 0.1000 36324 0.2000 * 0.1920 | 1.94 2.22 1.86 * 2.12 | 0.87 1.04 n/a n/a
MultiSource/Benchmarks/VersaBench/ecbdes/ecbdes | 0.0680 9772 0.0160 * 0.0160 | 3.01 2.87 2.87 * 2.88 | 1.05 1.05 n/a n/a
MultiSource/Benchmarks/llubenchmark/llu | 0.0160 3712 0.0160 * 0.0160 | 13.19 14.44 13.20 * 13.79 | 0.91 1.00 n/a n/a
MultiSource/Benchmarks/mafft/pairlocalalign | 3.8322 341756 1.7401 * * | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio | 0.0120 2324 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio | 0.0080 2192 0.0080 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
MultiSource/Benchmarks/mediabench/g721/g721encode/encode | 0.0720 13112 0.0480 * 0.0360 | 0.06 0.06 0.08 * 0.12 | - - n/a n/a
MultiSource/Benchmarks/mediabench/gsm/toast/toast | 0.3440 73804 0.2200 * 0.1400 | 0.02 0.02 0.02 * 0.19 | - - n/a n/a
MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg | 1.1800 170484 0.6280 * 0.3920 | 0.00 0.00 0.00 * 0.45 | - - n/a n/a
MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode | 0.4560 101604 0.4680 * 0.3800 | 0.02 0.02 0.02 * 0.43 | - - n/a n/a
MultiSource/Benchmarks/sim/sim | 0.0760 28120 0.1440 * 0.1400 | 5.51 5.67 5.39 * 5.63 | 0.97 1.02 n/a n/a
MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4 | 7.8204 1966488 4.7722 * 4.4002 | 0.72 * 0.79 * 5.52 | n/a 0.91 n/a n/a
SingleSource/Benchmarks/Adobe-C++/functionobjects | 0.1760 35452 0.1320 * 0.1240 | 4.06 5.76 3.57 * 3.77 | 0.70 1.14 n/a n/a
SingleSource/Benchmarks/Adobe-C++/loop_unroll | 0.8840 318836 1.4480 * 1.5320 | 1.85 1.93 1.84 * 3.46 | 0.96 1.01 n/a n/a
SingleSource/Benchmarks/Adobe-C++/simple_types_constant_folding | 0.8240 185368 2.2161 * 2.1681 | 1.45 2.52 1.39 * 3.67 | 0.58 1.04 n/a n/a
SingleSource/Benchmarks/Adobe-C++/simple_types_loop_invariant | 0.5560 137288 1.0000 * 1.0080 | 4.18 4.92 3.82 * 4.91 | 0.85 1.09 n/a n/a
SingleSource/Benchmarks/Adobe-C++/stepanov_abstraction | 0.2600 37428 0.1240 * 0.1200 | 5.24 11.64 5.19 * 5.35 | 0.45 1.01 n/a n/a
SingleSource/Benchmarks/Adobe-C++/stepanov_vector | 0.2560 41136 0.1440 * 0.1440 | 3.08 7.11 3.03 * 3.21 | 0.43 1.02 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/fannkuch | 0.0120 2672 0.0080 * 0.0080 | 4.23 4.10 3.60 * 3.51 | 1.03 1.18 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/fasta | 0.0120 3020 0.0120 * 0.0080 | 1.30 1.68 1.31 * 1.31 | 0.77 0.99 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/n-body | 0.0120 3192 0.0120 * 0.0080 | 2.37 2.12 2.07 * 2.10 | 1.12 1.14 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/nsieve-bits | 0.0040 1120 0.0080 * 0.0080 | 1.68 1.73 1.56 * 1.56 | 0.97 1.08 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/partialsums | 0.0040 1660 0.0040 * 0.0040 | 1.19 1.18 1.22 * 1.21 | 1.01 0.98 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/puzzle | 0.0080 1264 0.0040 * 0.0040 | 0.58 0.99 0.56 * 0.57 | 0.59 1.04 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/recursive | 0.0080 3444 0.0200 * 0.0240 | 1.22 1.12 1.03 * 1.03 | 1.09 1.18 n/a n/a
SingleSource/Benchmarks/BenchmarkGame/spectral-norm | 0.0160 2792 0.0120 * 0.0120 | 3.08 3.09 2.07 * 2.10 | 1.00 1.49 n/a n/a
SingleSource/Benchmarks/CoyoteBench/almabench | 0.0160 5816 0.0120 * 0.0080 | 19.32 8.42 8.35 * 8.40 | 2.29 2.31 n/a n/a
SingleSource/Benchmarks/CoyoteBench/fftbench | 0.1040 22440 0.0840 * 0.0760 | 2.62 * 2.81 * 2.93 | n/a 0.93 n/a n/a
SingleSource/Benchmarks/CoyoteBench/huffbench | 0.0200 6616 0.0280 * 0.0280 | 18.83 21.93 18.74 * 19.01 | 0.86 1.00 n/a n/a
SingleSource/Benchmarks/CoyoteBench/lpbench | 0.0280 4408 0.0200 * 0.0160 | 14.19 14.30 14.09 * 13.99 | 0.99 1.01 n/a n/a
SingleSource/Benchmarks/Dhrystone/dry | 0.0120 1268 0.0080 * 0.0080 | 2.62 0.46 0.62 * 0.66 | 5.70 4.23 n/a n/a
SingleSource/Benchmarks/Dhrystone/fldry | 0.0120 1300 0.0040 * 0.0040 | 2.86 1.82 0.47 * 0.54 | 1.57 6.09 n/a n/a
SingleSource/Benchmarks/McGill/chomp | 0.0240 6140 0.0320 * 0.0360 | 1.35 0.99 1.35 * 1.13 | 1.36 1.00 n/a n/a
SingleSource/Benchmarks/McGill/exptree | 0.0200 4800 0.0240 * 0.0200 | 0.00 0.01 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/McGill/misr | 0.0120 2700 0.0120 * 0.0080 | 0.37 0.30 0.32 * 0.33 | 1.23 1.16 n/a n/a
SingleSource/Benchmarks/McGill/queens | 0.0120 3316 0.0160 * 0.0120 | 2.89 2.57 2.45 * 2.58 | 1.12 1.18 n/a n/a
SingleSource/Benchmarks/Misc-C++/bigfib | 0.2000 41088 0.1640 * 0.1400 | 0.61 * 0.62 * 0.77 | n/a 0.98 n/a n/a
SingleSource/Benchmarks/Misc-C++/mandel-text | 0.0040 1152 0.0040 * 0.0040 | 2.64 3.18 2.33 * 2.34 | 0.83 1.13 n/a n/a
SingleSource/Benchmarks/Misc-C++/oopack_v1p8 | 0.0280 9456 0.0320 * 0.0320 | 0.22 0.34 0.17 * 0.22 | 0.65 1.29 n/a n/a
SingleSource/Benchmarks/Misc-C++/ray | 0.0560 17280 0.0600 * 0.0480 | 6.83 8.25 5.10 * 5.22 | 0.83 1.34 n/a n/a
SingleSource/Benchmarks/Misc-C++/sphereflake | 0.0560 16904 0.0640 * 0.0600 | 3.44 6.99 3.35 * 3.47 | 0.49 1.03 n/a n/a
SingleSource/Benchmarks/Misc-C++/stepanov_container | 0.2520 46076 0.1600 * 0.1440 | 7.36 8.04 7.56 * 7.63 | 0.92 0.97 n/a n/a
SingleSource/Benchmarks/Misc-C++/stepanov_v1p2 | 0.0640 10008 0.0320 * 0.0320 | 8.20 15.87 8.19 * 8.23 | 0.52 1.00 n/a n/a
SingleSource/Benchmarks/Misc/ReedSolomon | 0.0600 10188 0.0480 * 0.0440 | 8.04 8.64 7.42 * 7.83 | 0.93 1.08 n/a n/a
SingleSource/Benchmarks/Misc/fbench | 0.0160 5364 0.0160 * 0.0240 | 2.19 2.26 2.56 * 2.63 | 0.97 0.86 n/a n/a
SingleSource/Benchmarks/Misc/ffbench | 0.0200 4340 0.0200 * 0.0240 | 0.98 1.09 1.11 * 1.12 | 0.90 0.88 n/a n/a
SingleSource/Benchmarks/Misc/flops | 0.0200 6552 0.0240 * 0.0280 | 16.69 13.00 15.86 * 16.00 | 1.28 1.05 n/a n/a
SingleSource/Benchmarks/Misc/flops-1 | 0.0000 1152 0.0040 * 0.0040 | 4.51 4.06 4.62 * 4.08 | 1.11 0.98 n/a n/a
SingleSource/Benchmarks/Misc/flops-2 | 0.0000 1252 0.0040 * 0.0040 | 2.22 2.51 2.22 * 2.23 | 0.88 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-3 | 0.0000 1172 0.0040 * 0.0040 | 2.74 3.21 3.02 * 3.09 | 0.85 0.91 n/a n/a
SingleSource/Benchmarks/Misc/flops-4 | 0.0000 1152 0.0040 * 0.0000 | 4.06 1.35 1.39 * 1.40 | 3.01 2.92 n/a n/a
SingleSource/Benchmarks/Misc/flops-5 | 0.0000 1284 0.0040 * 0.0040 | 6.84 3.91 4.45 * 4.49 | 1.75 1.54 n/a n/a
SingleSource/Benchmarks/Misc/flops-6 | 0.0040 1284 0.0040 * 0.0040 | 5.10 4.85 5.10 * 5.12 | 1.05 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-7 | 0.0000 1080 0.0040 * 0.0080 | 6.20 6.12 6.18 * 6.58 | 1.01 1.00 n/a n/a
SingleSource/Benchmarks/Misc/flops-8 | 0.0080 1288 0.0040 * 0.0000 | 5.41 3.94 2.35 * 2.36 | 1.37 2.30 n/a n/a
SingleSource/Benchmarks/Misc/himenobmtxpa | 0.0520 9672 0.0400 * 0.0480 | 1.45 2.73 2.07 * 2.17 | 0.53 0.70 n/a n/a
SingleSource/Benchmarks/Misc/mandel | 0.0040 1084 0.0040 * 0.0080 | 1.49 1.64 1.68 * 2.00 | 0.91 0.89 n/a n/a
SingleSource/Benchmarks/Misc/mandel-2 | 0.0040 1052 0.0040 * 0.0040 | 1.22 1.40 1.03 * 1.06 | 0.87 1.18 n/a n/a
SingleSource/Benchmarks/Misc/oourafft | 0.0800 13464 0.0520 * 0.0560 | 6.33 8.77 8.17 * 7.22 | 0.72 0.77 n/a n/a
SingleSource/Benchmarks/Misc/perlin | 0.0160 4476 0.0160 * 0.0200 | 5.96 6.72 6.83 * 6.87 | 0.89 0.87 n/a n/a
SingleSource/Benchmarks/Misc/pi | 0.0040 1152 0.0040 * 0.0040 | 1.00 0.94 1.01 * 0.95 | 1.06 0.99 n/a n/a
SingleSource/Benchmarks/Misc/richards_benchmark | 0.0160 5752 0.0160 * 0.0200 | 0.94 1.10 1.16 * 1.29 | 0.85 0.81 n/a n/a
SingleSource/Benchmarks/Misc/salsa20 | 0.0160 2700 0.0080 * 0.0120 | 10.57 9.35 9.65 * 9.76 | 1.13 1.10 n/a n/a
SingleSource/Benchmarks/Misc/whetstone | 0.0160 3356 0.0120 * 0.0160 | 2.47 2.53 2.50 * 2.52 | 0.98 0.99 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ackermann | 0.0400 11116 0.0360 * 0.0360 | 1.86 1.04 1.15 * 1.10 | 1.79 1.62 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary | 0.0320 9192 0.0320 * 0.0240 | 0.14 0.13 0.13 * 0.18 | 1.08 1.08 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary2 | 0.0520 9808 0.0320 * 0.0320 | 0.14 0.14 0.13 * 0.17 | 1.00 1.08 n/a n/a
SingleSource/Benchmarks/Shootout-C++/ary3 | 0.0520 11680 0.0400 * 0.0360 | 5.38 5.39 5.31 * 5.33 | 1.00 1.01 n/a n/a
SingleSource/Benchmarks/Shootout-C++/except | 0.0320 11384 * * * | 0.28 * * * * | n/a n/a n/a n/a
SingleSource/Benchmarks/Shootout-C++/fibo | 0.0240 7952 0.0240 * 0.0240 | 2.56 0.57 0.54 * 0.61 | 4.49 4.74 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hash | 0.0760 15128 0.0440 * 0.0560 | 0.78 0.79 0.78 * 0.95 | 0.99 1.00 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hash2 | 0.1200 20148 0.0560 * 0.0680 | 4.77 4.78 4.68 * 4.78 | 1.00 1.02 n/a n/a
SingleSource/Benchmarks/Shootout-C++/heapsort | 0.0080 3016 0.0080 * 0.0039 | 6.97 6.14 5.46 * 5.44 | 1.14 1.28 n/a n/a
SingleSource/Benchmarks/Shootout-C++/hello | 0.0280 8392 0.0240 * 0.0240 | 0.00 0.00 0.01 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/lists | 0.0680 11472 0.0400 * 0.0320 | 6.12 6.16 6.18 * 6.46 | 0.99 0.99 n/a n/a
SingleSource/Benchmarks/Shootout-C++/lists1 | 0.0920 16308 0.0600 * 0.0640 | 0.50 0.39 0.40 * 0.64 | 1.28 1.25 n/a n/a
SingleSource/Benchmarks/Shootout-C++/matrix | 0.0400 12240 0.0440 * 0.0360 | 3.40 3.53 3.50 * 3.56 | 0.96 0.97 n/a n/a
SingleSource/Benchmarks/Shootout-C++/methcall | 0.0280 10872 0.0360 * 0.0240 | 6.00 6.45 5.73 * 7.88 | 0.93 1.05 n/a n/a
SingleSource/Benchmarks/Shootout-C++/moments | 0.0520 9092 0.0280 * 0.0240 | 0.20 0.22 0.22 * 0.25 | 0.91 0.91 n/a n/a
SingleSource/Benchmarks/Shootout-C++/nestedloop | 0.0360 8124 0.0240 * 0.0200 | 8.02 0.17 0.17 * 0.20 | 47.18 47.18 n/a n/a
SingleSource/Benchmarks/Shootout-C++/objinst | 0.0440 11068 0.0360 * 0.0360 | 5.73 5.87 5.69 * 5.72 | 0.98 1.01 n/a n/a
SingleSource/Benchmarks/Shootout-C++/random | 0.0320 7924 0.0240 * 0.0240 | 6.69 4.39 4.70 * 4.67 | 1.52 1.42 n/a n/a
SingleSource/Benchmarks/Shootout-C++/reversefile | 0.1040 17488 0.0560 * 0.0480 | 0.00 * 0.00 * 0.06 | n/a - n/a n/a
SingleSource/Benchmarks/Shootout-C++/sieve | 0.0560 12648 0.0440 * 0.0440 | 2.26 2.43 2.38 * 2.37 | 0.93 0.95 n/a n/a
SingleSource/Benchmarks/Shootout-C++/spellcheck | 0.1080 27360 0.0720 * 0.0480 | 0.00 0.00 0.00 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/strcat | 0.0480 10628 0.0400 * 0.0360 | 0.15 * 0.10 * 0.15 | n/a 1.50 n/a n/a
SingleSource/Benchmarks/Shootout-C++/sumcol | 0.0400 9084 0.0240 * 0.0160 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/wc | 0.0360 11192 0.0400 * 0.0320 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout-C++/wordfreq | 0.0920 18464 0.0640 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Benchmarks/Shootout/ackermann | 0.0040 1180 0.0080 * 0.0080 | 0.00 0.00 0.01 * 0.02 | - - n/a n/a
SingleSource/Benchmarks/Shootout/ary3 | 0.0040 1140 0.0040 * 0.0080 | 5.48 6.28 5.51 * 5.47 | 0.87 0.99 n/a n/a
SingleSource/Benchmarks/Shootout/fib2 | 0.0040 964 0.0040 * 0.0040 | 2.60 0.72 0.56 * 0.57 | 3.61 4.64 n/a n/a
SingleSource/Benchmarks/Shootout/hash | 0.0160 2948 0.0160 * 0.0120 | 6.75 6.65 7.00 * 6.06 | 1.02 0.96 n/a n/a
SingleSource/Benchmarks/Shootout/heapsort | 0.0080 1424 0.0080 * 0.0040 | 6.32 6.08 6.50 * 5.49 | 1.04 0.97 n/a n/a
SingleSource/Benchmarks/Shootout/hello | 0.0000 576 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Benchmarks/Shootout/lists | 0.0200 3180 0.0120 * 0.0120 | 5.66 6.00 5.89 * 6.60 | 0.94 0.96 n/a n/a
SingleSource/Benchmarks/Shootout/matrix | 0.0160 4080 0.0120 * 0.0120 | 2.69 4.81 4.01 * 4.05 | 0.56 0.67 n/a n/a
SingleSource/Benchmarks/Shootout/methcall | 0.0040 1568 0.0080 * 0.0080 | 4.87 4.67 4.66 * 6.57 | 1.04 1.05 n/a n/a
SingleSource/Benchmarks/Shootout/nestedloop | 0.0080 1040 0.0040 * 0.0040 | 8.01 0.18 0.17 * 0.18 | 44.50 47.12 n/a n/a
SingleSource/Benchmarks/Shootout/objinst | 0.0040 1664 0.0080 * 0.0080 | 5.12 5.17 5.04 * 4.98 | 0.99 1.02 n/a n/a
SingleSource/Benchmarks/Shootout/random | 0.0040 840 0.0040 * 0.0040 | 4.42 4.43 4.70 * 4.70 | 1.00 0.94 n/a n/a
SingleSource/Benchmarks/Shootout/sieve | 0.0040 1264 0.0040 * 0.0040 | 7.83 7.76 6.30 * 6.52 | 1.01 1.24 n/a n/a
SingleSource/Benchmarks/Shootout/strcat | 0.0040 1316 0.0080 * 0.0080 | 0.17 0.17 0.17 * 0.18 | 1.00 1.00 n/a n/a
SingleSource/Benchmarks/Stanford/Bubblesort | 0.0080 1420 0.0080 * 0.0040 | 0.06 0.05 0.05 * 0.06 | - - n/a n/a
SingleSource/Benchmarks/Stanford/IntMM | 0.0120 1472 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Oscar | 0.0080 3008 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Perm | 0.0080 3124 0.0080 * 0.0120 | 0.02 0.03 0.04 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Puzzle | 0.0840 4720 0.0200 * 0.0240 | 0.17 0.22 0.18 * 0.21 | 0.77 0.94 n/a n/a
SingleSource/Benchmarks/Stanford/Queens | 0.0080 2232 0.0120 * 0.0120 | 0.03 0.04 0.04 * 0.06 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Quicksort | 0.0120 1688 0.0080 * 0.0080 | 0.05 0.04 0.04 * 0.05 | - - n/a n/a
SingleSource/Benchmarks/Stanford/RealMM | 0.0080 1504 0.0040 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Towers | 0.0200 2432 0.0120 * 0.0120 | 0.01 0.02 0.02 * 0.04 | - - n/a n/a
SingleSource/Benchmarks/Stanford/Treesort | 0.0080 2248 0.0160 * 0.0080 | 0.09 0.09 0.09 * 0.11 | - - n/a n/a
SingleSource/Regression/C++/2003-05-14-array-init | 0.0000 584 0.0000 * 0.0000 | 0.00 0.01 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/2003-05-14-expr_stmt | 0.0000 484 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/2003-06-08-BaseType | 0.0040 496 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-06-08-VirtualFunctions | 0.0000 620 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-06-13-Crasher | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-08-20-EnumSizeProblem | 0.0000 456 0.0040 * 0.0000 | 0.00 0.00 0.01 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2003-09-29-NonPODsByValue | 0.0000 576 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/2008-01-29-ParamAliasesReturn | 0.0040 604 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/BuiltinTypeInfo | 0.0000 728 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/EH/ConditionalExpr | 0.0040 712 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/EH/ctor_dtor_count | 0.0040 1048 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/ctor_dtor_count-2 | 0.0000 1592 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/dead_try_block | 0.0040 568 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/EH/exception_spec_test | 0.0040 2464 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/function_try_block | 0.0080 2452 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/simple_rethrow | 0.0040 1444 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/simple_throw | 0.0000 956 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/EH/throw_rethrow_test | 0.0080 1792 * * * | 0.00 * * * * | n/a n/a n/a n/a
SingleSource/Regression/C++/global_ctor | 0.0040 1344 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/global_type | 0.0040 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/ofstream_ctor | 0.0320 9224 0.0280 * 0.0240 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/Regression/C++/pointer_member | 0.0000 660 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C++/pointer_method | 0.0040 664 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C++/short_circuit_dtor | 0.0040 644 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-05-14-initialize-string | 0.0000 680 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-21-BitfieldHandling | 0.0040 1152 0.0040 * 0.0040 | 0.00 * 0.00 * 0.00 | n/a - n/a n/a
SingleSource/Regression/C/2003-05-21-UnionBitfields | 0.0040 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-21-UnionTest | 0.0040 580 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-05-22-LocalTypeTest | 0.0040 624 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-05-22-VarSizeArray | 0.0000 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-05-23-TransparentUnion | 0.0000 576 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-06-16-InvalidInitializer | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2003-06-16-VolatileError | 0.0000 456 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2003-10-12-GlobalVarInitializers | 0.0040 664 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2004-02-03-AggregateCopy | 0.0000 588 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2004-03-15-IndirectGoto | 0.0040 860 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2004-08-12-InlinerAndAllocas | 0.0040 824 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/2005-05-06-LongLongSignedShift | 0.0000 608 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/2008-01-07-LongDouble | 0.0000 596 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/ConstructorDestructorAttributes | 0.0000 760 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/DuffsDevice | 0.0080 1084 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Regression/C/PR1386 | 0.0000 588 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/PR491 | 0.0000 456 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/PR640 | 0.0080 2076 0.0080 * 0.0080 | 0.00 0.00 0.01 * 0.02 | - - n/a n/a
SingleSource/Regression/C/badidx | 0.0000 1004 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/bigstack | 0.0120 4116 0.0120 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Regression/C/callargs | 0.0000 928 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/casts | 0.0080 3596 0.0160 * 0.0160 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/Regression/C/globalrefs | 0.0000 932 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/matrixTranspose | 0.0120 1344 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/pointer_arithmetic | 0.0000 488 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/sumarray | 0.0040 948 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/sumarray2d | 0.0080 1080 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/Regression/C/sumarraymalloc | 0.0040 1164 0.0040 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/test_indvars | 0.0080 1436 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/Regression/C/testtrace | 0.0080 1136 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-04-17-PrintfChar | 0.0000 576 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-ArgumentTest | 0.0000 624 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest | 0.0040 1504 0.0080 * 0.0080 | 0.00 0.01 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest1 | 0.0000 608 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest2 | 0.0040 728 0.0000 * 0.0000 | 0.01 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-CastTest3 | 0.0000 684 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-02-ManyArguments | 0.0000 696 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-05-03-NotTest | 0.0040 664 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-05-19-DivTest | 0.0000 688 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-08-02-CastTest | 0.0000 584 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-08-02-CastTest2 | 0.0000 608 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-08-19-CodegenBug | 0.0000 568 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-10-09-ArrayResolution | 0.0000 644 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-10-12-StructureArgs | 0.0000 636 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-10-12-StructureArgsSimple | 0.0000 604 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2002-10-13-BadLoad | 0.0000 572 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2002-12-13-MishaTest | 0.0040 584 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-04-22-Switch | 0.0000 736 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-02-DependentPHI | 0.0040 816 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-07-VarArgs | 0.0120 2828 0.0120 * 0.0120 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-12-MinIntProblem | 0.0000 568 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-14-AtExit | 0.0040 688 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-26-Shorts | 0.0000 2012 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-05-31-CastToBool | 0.0000 916 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-05-31-LongShifts | 0.0040 920 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-06-IntOverflow | 0.0000 812 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-08-BitOpsTest | 0.0000 592 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-07-09-LoadShorts | 0.0000 1520 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-07-09-SignedArgs | 0.0080 1672 0.0040 * 0.0080 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-07-10-SignConversions | 0.0040 792 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-08-05-CastFPToUint | 0.0000 720 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-08-11-VaListArg | 0.0040 3108 0.0160 * 0.0160 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-08-20-FoldBug | 0.0000 568 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2003-09-18-BitFieldTest | 0.0040 612 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-10-13-SwitchTest | 0.0000 652 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2003-10-29-ScalarReplBug | 0.0000 580 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2004-02-02-NegativeZero | 0.0040 640 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2004-06-20-StaticBitfieldInit | 0.0040 684 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2004-11-28-GlobalBoolLayout | 0.0000 880 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls | 0.0120 2144 0.0080 * 0.0080 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/2005-05-12-Int64ToFP | 0.0000 684 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2005-05-13-SDivTwo | 0.0040 648 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2005-07-15-Bitfield-ABI | 0.0000 596 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2005-07-17-INT-To-FP | 0.0040 928 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2005-11-29-LongSwitch | 0.0000 584 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-01-23-UnionInit | 0.0080 2124 0.0080 * 0.0080 | 0.00 * 0.00 * 0.00 | n/a - n/a n/a
SingleSource/UnitTests/2006-01-29-SimpleIndirectCall | 0.0000 796 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-02-04-DivRem | 0.0000 672 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2006-12-01-float_varg | 0.0000 660 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2006-12-04-DynAllocAndRestore | 0.0040 480 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2006-12-07-Compare64BitConstant | 0.0000 592 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2006-12-11-LoadConstants | 0.0239 2704 0.0320 * 0.0280 | 0.00 0.00 0.00 * 0.03 | - - n/a n/a
SingleSource/UnitTests/2007-01-04-KNR-Args | 0.0000 668 0.0040 * 0.0040 | 0.01 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2007-03-02-VaCopy | 0.0000 944 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2007-04-10-BitfieldTest | 0.0000 604 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2007-04-25-weak | 0.0000 512 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2008-04-18-LoopBug | 0.0040 1052 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2008-04-20-LoopBug2 | 0.0040 1068 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/2008-07-13-InlineSetjmp | 0.0000 832 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/2009-04-16-BitfieldInitialization | 0.0000 1888 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/AtomicOps | 0.0000 812 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/FloatPrecision | 0.0000 616 0.0040 * 0.0040 | 0.01 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast | 0.0080 2560 0.0240 * 0.0240 | 0.02 0.02 0.01 * 0.04 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast-bug | 0.0000 628 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/cast2 | 0.0000 592 0.0000 * 0.0000 | 0.00 0.01 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/ccc | 0.0040 760 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/div | 0.0000 1340 0.0040 * 0.0040 | 0.00 0.01 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/factor | 0.0040 1008 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.02 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/rem | 0.0240 9136 0.0880 * 0.0880 | 0.00 0.00 0.00 * 0.09 | - - n/a n/a
SingleSource/UnitTests/SignlessTypes/shr | 0.0000 1448 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/StructModifyTest | 0.0040 688 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/TestLoop | 0.0040 680 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Threads/tls | 0.0000 876 0.0000 * * | 0.00 0.00 0.00 * * | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.expandfft | 0.0240 6336 0.0240 * 0.0240 | 0.69 1.41 0.59 * 0.62 | 0.49 1.17 n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.isamax | 0.0120 3156 0.0120 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.shift | 0.0040 828 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/SSE/sse.stepfft | 0.0560 9860 0.0440 * 0.0440 | 0.69 1.37 0.63 * 0.68 | 0.50 1.10 n/a n/a
SingleSource/UnitTests/Vector/build | 0.0040 804 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/build2 | 0.0120 1144 0.0040 * 0.0040 | 1.54 1.54 2.04 * 2.03 | 1.00 0.75 n/a n/a
SingleSource/UnitTests/Vector/divides | 0.0000 656 0.0000 * 0.0000 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/multiplies | 0.0080 1652 0.0120 * 0.0120 | 1.26 1.24 3.29 * 3.29 | 1.02 0.38 n/a n/a
SingleSource/UnitTests/Vector/simple | 0.0040 1216 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/Vector/sumarray | 0.0040 940 0.0040 * 0.0000 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
SingleSource/UnitTests/Vector/sumarray-dbl | 0.0000 1004 0.0000 * 0.0040 | 0.00 0.00 0.00 * 0.00 | - - n/a n/a
SingleSource/UnitTests/printargs | 0.0000 760 0.0040 * 0.0040 | 0.00 0.00 0.00 * 0.01 | - - n/a n/a
llvm-svn: 77499
2009-07-29 20:10:24 +00:00
1024634df7
Fix the verifier to handle intrinsics with LLVMMatchType parameters, where
...
the return type of the intrinsic is not overloaded, i.e., where the type
being matched is some other parameter. The argument to LLVMMatchType is
an index into the list of overloaded types (ignoring the fixed types),
but VerifyIntrinsicPrototype is expecting its arguments for LLVMMatchType
parameters to be indices into the combined list of _all_ return values and
parameters, not just the overloaded ones.
This patch changes TableGen to keep track for each overloaded type of the
corresponding index into the list of return values and parameters. It
then generates the values expected by VerifyIntrinsicPrototype.
llvm-svn: 77467
2009-07-29 16:35:59 +00:00
8977f04b12
Revert AsmWriterEmitter.cpp to 74742. The recent changes are causing serious compile time regression.
...
llvm-svn: 77431
2009-07-29 05:06:11 +00:00
0033199c50
Match X86 register names to number.
...
llvm-svn: 77404
2009-07-29 00:02:19 +00:00
47db941fd3
Get rid of the Pass+Context magic.
...
llvm-svn: 76702
2009-07-22 00:24:57 +00:00
5e165083a0
Make a bunch of changes suggested by Chris and others to improve
...
efficiency. Fix a few formatting bugs along the way.
llvm-svn: 76601
2009-07-21 18:16:24 +00:00
40c68ad3bb
Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
...
next.
llvm-svn: 76486
2009-07-20 22:02:59 +00:00
4e4eb0b00c
Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.
...
llvm-svn: 76398
2009-07-20 06:10:07 +00:00
0c317a99c4
Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency.
...
llvm-svn: 76279
2009-07-18 01:43:53 +00:00
e2eec05e60
tblgen/AsmMatcher: Emit simple matcher for register names.
...
llvm-svn: 76212
2009-07-17 18:51:11 +00:00
33d1e7db01
Add logic to align instruction operands to columns for pretty-printing.
...
No target uses this currently. This patch only adds the mechanism so
that local installations can choose to enable this.
llvm-svn: 76177
2009-07-17 14:24:46 +00:00
11817374de
Get rid of postInstructionAction and call EmitComments directly.
...
llvm-svn: 75806
2009-07-15 18:24:03 +00:00
607818a2c1
Add a Force option to raw_fd_ostream to specify whether opening
...
an existing file is considered an error. Convert several tools
to use raw_fd_ostream instead of std::ostream, and to use this
new option instead of doing a manual check.
llvm-svn: 75801
2009-07-15 17:29:42 +00:00
9ad1594fe0
Remove the v3i32 and v3f32 value types: they are not
...
native for any supported targets.
llvm-svn: 75785
2009-07-15 15:28:52 +00:00
c6026b5198
Revert 75308.
...
llvm-svn: 75565
2009-07-14 00:16:03 +00:00
de54478bf0
Add infrastructure to allow post instruction printing action triggers.
...
We'll eventually use this to print comments in asm files and do other
fun things.
This adds interfaces to the AsmPrinter and changes TableGen to invoke
the postInstructionAction when appropriate. It also add parameters to
TargetAsmInfo to control comment layout.
llvm-svn: 75490
2009-07-13 20:25:48 +00:00
d66cc5c781
Update CMakeLists.txt
...
llvm-svn: 75389
2009-07-11 21:53:14 +00:00
3085b57bb8
Stub out assembly matcher (.s -> MCInst) tblgen backend.
...
llvm-svn: 75378
2009-07-11 19:39:44 +00:00
73fd66c06b
Add new vector types for 192-bit, 348-bit and 512-bit sizes.
...
These are needed to represent ARM Neon struct datatypes containing 2, 3 or 4
separate vectors.
llvm-svn: 75308
2009-07-10 23:05:09 +00:00
bf8e4c1128
Refactor TableGen's llvm::getName to share code with llvm::getEnumName,
...
since names are the same for almost all the types.
llvm-svn: 75302
2009-07-10 22:25:24 +00:00
0504e0a222
Thread LLVMContext through MVT and related parts of SDISel.
...
llvm-svn: 75153
2009-07-09 17:57:24 +00:00
fa04002254
Convert more abort() calls to llvm_report_error().
...
Also remove trailing semicolon.
llvm-svn: 75027
2009-07-08 19:04:27 +00:00
ee3c74fba0
Add a new little "FileCheck" utility for regression testing.
...
llvm-svn: 75022
2009-07-08 18:44:05 +00:00
b0df5047e5
Add an 'init' option property.
...
Makes possible to provide default values for options defined in plugins (same as
cl::init).
llvm-svn: 74905
2009-07-07 16:08:41 +00:00
182512b403
Refactoring.
...
Make isList(), isSwitch() and isParameter() member functions of
OptionDescription.
llvm-svn: 74904
2009-07-07 16:08:11 +00:00
2de4161b23
Comment fix.
...
llvm-svn: 74903
2009-07-07 16:07:36 +00:00
5832e7fd23
Add new ValueType for metadata.
...
llvm-svn: 74882
2009-07-06 23:44:32 +00:00
38a22bffdc
Replace std::iostreams with raw_ostream in TableGen.
...
- Sorry, I can't help myself.
- No intended functionality change.
llvm-svn: 74742
2009-07-03 00:10:29 +00:00
96122debc1
improve the APIs for creating struct and function types with no arguments/elements
...
to not have to create a temporary vector (in the API at least). Patch by Jay Foad!
llvm-svn: 74584
2009-07-01 04:13:31 +00:00
c9dc78ae40
Normalize SourceMgr messages.
...
- Don't print "Parsing" in front of every message.
- Take additional "type" argument which is prepended to the message (with ": ")
if given.
- Update clients to print errors (warnings) as:
<filename>:<line number>: error(warning): ...
llvm-svn: 74489
2009-06-30 00:49:23 +00:00
371ca49bad
Remove commented code.
...
llvm-svn: 74471
2009-06-29 22:55:52 +00:00
efa19619c8
Implement !cast<string>.
...
llvm-svn: 74444
2009-06-29 20:05:29 +00:00
fd42c8a567
Improve TableGen error reporting.
...
llvm-svn: 74443
2009-06-29 19:59:52 +00:00
f92ba97cda
Add more vector ValueTypes for AVX and other extended vector instruction
...
sets.
llvm-svn: 74427
2009-06-29 16:47:10 +00:00
34c8c7414f
Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates.
...
llvm-svn: 74276
2009-06-26 05:59:16 +00:00
269884ead5
Better error message.
...
llvm-svn: 74193
2009-06-25 18:21:34 +00:00
248c414024
Make llvmc work again.
...
Chris recently broke llvmc with his Makefile changes (r75379). That patch made
the global change .o -> .a, which caused built-in llvmc plugins to stop working
since plugin initialization in llvmc is based on static variables not referenced
from the main executable. This patch implements auto-generated forced references
to the plugin libraries.
llvm-svn: 74000
2009-06-23 20:46:48 +00:00
ae3b1a8b55
A little bit nicer formatting.
...
llvm-svn: 73998
2009-06-23 20:45:31 +00:00
beecd51f95
Typo.
...
llvm-svn: 73997
2009-06-23 20:45:07 +00:00
2adc9e739c
rename SourceMgr::PrintError to PrintMessage.
...
llvm-svn: 73861
2009-06-21 21:22:11 +00:00
7d4c0d5fb3
simplify some error recovery stuff.
...
llvm-svn: 73856
2009-06-21 19:22:49 +00:00
7153bd8a29
prune #include, fix warning.
...
llvm-svn: 73847
2009-06-21 05:33:06 +00:00
976af622a9
move include searching logic from TGLexer to SourceMgr.
...
llvm-svn: 73845
2009-06-21 05:06:04 +00:00
fd255754af
Rename TGSourceMgr -> SourceMgr.
...
llvm-svn: 73844
2009-06-21 03:41:50 +00:00
526c8cb557
rename TGLoc -> SMLoc.
...
llvm-svn: 73843
2009-06-21 03:39:35 +00:00
1b30e1ac45
move TGSourceMgr class out of TableGen into libsupport.
...
llvm-svn: 73842
2009-06-21 03:36:54 +00:00
681f79124a
allow clients of the asmprinter to opt-out of the boilerplate with a #define.
...
llvm-svn: 73798
2009-06-19 23:57:53 +00:00
d9d1f817a0
Fix grammaro, and bad indentation.
...
llvm-svn: 73602
2009-06-17 04:23:52 +00:00
ec131d1fd7
Add output of the SFINAE bit for Clang's diagnostics
...
llvm-svn: 73331
2009-06-14 07:24:49 +00:00
e05336f80d
I'm going to assume that this was meant to be an assignment instead of a
...
computation that isn't used. Please correct this if it's wrong!
llvm-svn: 73139
2009-06-09 18:49:42 +00:00
58a6b76cfd
Revert 73074 and 73099 because Windows doesn't have POSIX
...
regular expressions. We will add an OpenBSD implementation
and re-apply ASAP.
llvm-svn: 73138
2009-06-09 18:31:17 +00:00
67c05bff31
Add a !patsubst operator. Use on string types.
...
llvm-svn: 73099
2009-06-08 23:05:37 +00:00
8618f95caf
Make IntInits and ListInits typed. This helps deduce types of !if and
...
other operators. For the rare cases where a list type cannot be
deduced, provide a []<type> syntax, where <type> is the list element
type.
llvm-svn: 73078
2009-06-08 20:23:18 +00:00
b035445537
Make !if short-circuit when possible.
...
llvm-svn: 73076
2009-06-08 19:16:56 +00:00
07eba05a61
Add a !regmatch operator to do pattern matching in TableGen.
...
llvm-svn: 73074
2009-06-08 17:00:34 +00:00
5234d3795f
Revert 72707 and 72709, for the moment.
...
llvm-svn: 72712
2009-06-02 03:12:52 +00:00
0b8ca79253
Make the implicit inputs and outputs of target-independent
...
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
llvm-svn: 72707
2009-06-01 23:27:20 +00:00
08bf4c0f5a
Propagate CPU string out of SubtargetFeatures
...
llvm-svn: 72335
2009-05-23 19:50:50 +00:00
770c8e7927
CMake: Use libpthread in tblgen when needed. Updated list of source
...
files for PIC16 target.
llvm-svn: 72277
2009-05-22 20:55:15 +00:00
4ff70e389e
TableGen for fast isel seems to assume an 'imm'
...
operand is the last in a pattern. There is no
reason this should be true (although apparently
it always is right now).
llvm-svn: 72232
2009-05-21 22:25:49 +00:00
942982278c
Fix warning.
...
llvm-svn: 71834
2009-05-15 03:07:14 +00:00
d449e7c8c6
Add extra parenthesis around || statements to pacify compiler.
...
Also fix up some 80col violations while I'm there.
llvm-svn: 71833
2009-05-15 03:03:14 +00:00
3587eed2c4
Implement !if, analogous to $(if) in GNU make.
...
llvm-svn: 71815
2009-05-14 23:26:46 +00:00
d571b3c94b
Graduate LLVM to the big leagues by embedding a LISP processor into TableGen.
...
Ok, not really, but do support some common LISP functions:
* car
* cdr
* null
llvm-svn: 71805
2009-05-14 22:38:31 +00:00
e917fff30f
Implement a !foreach operator analogous to GNU make's $(foreach).
...
Use it on dags and lists like this:
class decls {
string name;
}
def Decls : decls;
class B<list<string> names> : A<!foreach(Decls.name, names, !strconcat(Decls.name, ", Sr."))>;
llvm-svn: 71803
2009-05-14 22:23:47 +00:00
98ed3c7273
Implement a !subst operation simmilar to $(subst) in GNU make to do
...
def/var/string substitution on generic pattern templates. For example:
def Type;
def v4f32 : Type;
def TYPE : Type;
class GenType<Type t> {
let type = !(subst TYPE, v4f32, t);
}
def TheType : GenType<TYPE>;
llvm-svn: 71801
2009-05-14 21:54:42 +00:00
e8f3b27e65
Implement !cast.
...
llvm-svn: 71794
2009-05-14 21:22:49 +00:00
5d0c051e66
Operation Enhancements
...
Create an OpInit class to serve as a base for all operation Inits.
Move parsing of operation constructs to separate functions and reference
from multiple places.
Add some commented out new operations. Coming soon.
llvm-svn: 71789
2009-05-14 20:54:48 +00:00
9d3febea6a
Fix PR4207.
...
If we're resolving a list element access and we're given a VarInit,
return a new VarListElementInit referencing the VarInit.
llvm-svn: 71787
2009-05-14 20:38:52 +00:00
69ee5e4cfe
Slightly improve generated code in a degenerate case.
...
Should remove a warning from MSVC.
llvm-svn: 71603
2009-05-12 22:32:29 +00:00
af9eaa830a
Rename PaddedSize to AllocSize, in the hope that this
...
will make it more obvious what it represents, and stop
it being confused with the StoreSize.
llvm-svn: 71349
2009-05-09 07:06:46 +00:00
8bbd76b031
Change 'make install' to install tblgen, for better support of out-of-tree targets,
...
patch by Mikael Lepistö!
llvm-svn: 71226
2009-05-08 17:32:47 +00:00
58f3811300
Move the tablegen-produced DebugLoc handling into a AsmWriter::processDebugLoc function.
...
No functionality change.
llvm-svn: 71156
2009-05-07 13:55:51 +00:00
b43eb8200f
A better error message.
...
llvm-svn: 71068
2009-05-06 04:54:23 +00:00
6da4749ce6
The 'forward_as' property did not use its second argument.
...
See PR4159 for details. Patch by Martin Nowack!
llvm-svn: 71054
2009-05-06 01:41:19 +00:00
44f9d7a8f0
Allow multiclass def names to contain "#NAME"" where TableGen replaces
...
#NAME# with the name of the defm instantiating the multiclass. This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA. For example:
multiclass SSE_AVX_Inst<...> {
def SS : Instr<...>;
def SD : Instr<...>;
def PS : Instr<...>;
def PD : Instr<...>;
def V#NAME#SS : Instr<...>;
def V#NAME#SD : Instr<...>;
def V#NAME#PS : Instr<...>;
def V#NAME#PD : Instr<...>;
}
defm ADD : SSE_AVX_Inst<...>;
Results in
ADDSS
ADDSD
ADDPS
ADDPD
VADDSS
VADDSD
VADDPS
VADDPD
llvm-svn: 70979
2009-05-05 16:28:25 +00:00
d953cd9401
Fix incorrect code generation with ENV.
...
See PR4157 for details. Patch by Martin Nowack!
llvm-svn: 70973
2009-05-05 12:34:34 +00:00
cfd6941cf9
Quotes are used for including llvm headers, rather than angles.
...
llvm-svn: 70879
2009-05-04 17:09:51 +00:00
9ae29b2d8f
-Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors.
...
-Depend on DebugLocs for source line info.
(Comes with Regression-Be-Gone(tm))
llvm-svn: 70871
2009-05-04 16:23:49 +00:00
79be34012f
Revert r70803 for now, it causes a regression.
...
llvm-svn: 70811
2009-05-03 23:27:19 +00:00
ce7196b903
-Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors.
...
-Depend on DebugLocs for source line info.
llvm-svn: 70803
2009-05-03 22:03:35 +00:00
a5037484a4
Make DebugLoc independent of DwarfWriter.
...
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
llvm-svn: 70520
2009-04-30 23:22:31 +00:00
c8124976af
Slightly change TableGen's definition of a register subclass.
...
A subclass is allowed to have a larger spill size than the superclass, and the
spill alignment must be a multiple of the superclass alignment. This causes
the following new subclass relations:
=== Alpha ===
F4RC -> F8RC
=== PPC ===
F4RC -> F8RC
=== SPU ===
R8C -> R16C -> R32C/R32FP -> R64C/R64FP -> GPRC/VECREG
=== X86 ===
FR32 -> FR64 -> VR128
RFP32 -> RFP64 -> RFP80
These subclass relations are consistent with the behaviour of -join-cross-class-copies.
llvm-svn: 70511
2009-04-30 21:22:44 +00:00
f71e656631
Rename the CurMultiClass formal parameter of TGParser::AddSubMultiClass
...
so that it doesn't shadow the instance variable of the same name.
Make the parameter names in method declarations match the definitions.
llvm-svn: 70502
2009-04-30 18:26:19 +00:00
92ab820f03
Remove unnecessary "class" keywords.
...
llvm-svn: 70499
2009-04-30 17:46:20 +00:00
56d8625492
Change forward declaration of MultiClass to use the "struct" keyword instead
...
of "class", so that it matches the subsequent definition.
llvm-svn: 70498
2009-04-30 17:35:11 +00:00
026e5d7667
Instead of passing in an unsigned value for the optimization level, use an enum,
...
which better identifies what the optimization is doing. And is more flexible for
future uses.
llvm-svn: 70440
2009-04-29 23:29:43 +00:00
084669a1c9
Second attempt:
...
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
llvm-svn: 70343
2009-04-29 00:15:41 +00:00
3d948164f7
Fix trailing whitespace and 80-col. violations in recent TableGen changes.
...
llvm-svn: 70319
2009-04-28 19:41:44 +00:00
56f2987a87
r70270 isn't ready yet. Back this out. Sorry for the noise.
...
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
d0ae15946c
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
...
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
llvm-svn: 70270
2009-04-28 00:21:31 +00:00
8d6d4b9289
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
...
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
llvm-svn: 70225
2009-04-27 18:41:29 +00:00
7049e79e45
Fix multiclass inheritance to limit value resolution to new defs added
...
by base multiclasses. Do not attempt to alter defs from previous base
multiclasses. This fixes multiple multiclass inheritance.
llvm-svn: 69974
2009-04-24 16:55:41 +00:00
b93db668b3
Revert 69952. Causes testsuite failures on linux x86-64.
...
llvm-svn: 69967
2009-04-24 12:40:33 +00:00
bb881d66f4
PR2957
...
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
llvm-svn: 69952
2009-04-24 03:42:54 +00:00
196ac3c69a
Make BinOps typed and require a type specifier for !nameconcat. This
...
allows binops to be used in typed contexts such as when passing
arguments to classes.
llvm-svn: 69921
2009-04-23 21:25:15 +00:00
f00919a040
Allow defm to inherit from multiple multiclasses.
...
llvm-svn: 69832
2009-04-22 22:17:51 +00:00
a9c6c5d39b
Implement !nameconcat to concatenate strings and look up the resulting
...
name in the symbol table, returning an object.
llvm-svn: 69822
2009-04-22 20:18:10 +00:00
753ed8fd9c
Implement multiclass inheritance.
...
llvm-svn: 69810
2009-04-22 16:42:54 +00:00
c48ede23bd
Add some assertions.
...
Fixes segfaults in some corner cases.
llvm-svn: 69494
2009-04-19 00:22:35 +00:00
a4c2290e5f
Use CallConvLower.h and TableGen descriptions of the calling conventions
...
for ARM. Patch by Sandeep Patel.
llvm-svn: 69371
2009-04-17 19:07:39 +00:00
b8c370a8b5
Fix PR3994: LLVMMatchType arguments do not refer to absolute return value
...
and argument positions but only to the overloaded intrinsic parameters.
Keep a separate list of these overloaded parameters in CodeGenTarget.cpp
so they can be resolved easily. Remove assertions from IntrinsicEmitter.cpp:
they were harmless but confusing, and the assertions elsewhere in TableGen
will catch any incorrect values.
llvm-svn: 69316
2009-04-16 21:51:05 +00:00
cce520f884
prove diagnostic -> group mapping information.
...
llvm-svn: 69270
2009-04-16 05:52:18 +00:00
1e86593b6a
encode subgroups into the clang .inc file. -Wall now works!
...
llvm-svn: 69257
2009-04-16 03:16:12 +00:00
13507d6cba
start producing subgroup info.
...
llvm-svn: 69249
2009-04-16 00:53:25 +00:00
4816a3488f
make sure that empty diag groups get known by clang.
...
llvm-svn: 69235
2009-04-15 22:33:02 +00:00
bcba418569
implement support for writing out diagnostic group tables.
...
llvm-svn: 69219
2009-04-15 20:55:08 +00:00
e05d99f604
use UppercaseString instead of EmitAllCaps
...
llvm-svn: 69213
2009-04-15 20:16:12 +00:00
3983dfdc83
use escape string.
...
llvm-svn: 69212
2009-04-15 20:13:18 +00:00
c2ac800cd7
rename -gen-clang-diags-options -> -gen-clang-diag-groups
...
llvm-svn: 69208
2009-04-15 20:02:32 +00:00
06a7f37265
don't infer diag class from parenting relations, make it an explicit field
...
in the record.
llvm-svn: 69176
2009-04-15 16:55:46 +00:00
4e7b579ecc
include the default mapping in the clang diagnostic .inc files.
...
llvm-svn: 69173
2009-04-15 16:43:18 +00:00
3dfaeeaefc
minor cleanups
...
llvm-svn: 69152
2009-04-15 06:26:49 +00:00
6c1426308c
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
...
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
llvm-svn: 68986
2009-04-13 21:06:25 +00:00
60a446ab02
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
...
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
llvm-svn: 68961
2009-04-13 15:38:05 +00:00
e14b8d9853
Generalize getRegisterClassForRegister to handle registers
...
in multiple classes in the case that the classes are all
in subset/superset relations. This function is used by the
fast-isel emitter, which always wants the super-most set.
llvm-svn: 68957
2009-04-13 15:24:11 +00:00
5eb8d26f19
Give register alias checking the hash table treatment too.
...
llvm-svn: 68730
2009-04-09 22:19:30 +00:00
3a888f639e
Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does.
...
llvm-svn: 68669
2009-04-09 03:50:16 +00:00
3a88fa0ff8
"This adds a getName() method to TargetRegisterClass, just like in TargetRegisterInfo.
...
This makes debugging register classes a bit easier."
Patch by Jakob Stoklund Olesen!
llvm-svn: 68400
2009-04-03 20:25:41 +00:00
b425feb2aa
Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.
...
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.
llvm-svn: 68355
2009-04-03 00:25:26 +00:00
061cf25072
Constify method to make VC++ happy. Patch by Brian Diekelman!
...
llvm-svn: 68222
2009-04-01 18:24:22 +00:00
90ea62cba6
Tidy up some comments.
...
llvm-svn: 68112
2009-03-31 16:48:35 +00:00
0837aa99ea
Add a comment.
...
llvm-svn: 68111
2009-03-31 16:46:45 +00:00
975c1cb41a
fix a few spelling errors and typos
...
llvm-svn: 67758
2009-03-26 16:17:51 +00:00
4bae1ac5e8
Use 'bool' for FoundRC
...
llvm-svn: 67750
2009-03-26 14:45:34 +00:00
292ea55130
Modify getRegisterValueType() to allow for a register being in mutliple
...
register classes. Before, MVT::Other would be returned anytime a reg was
in multiple register classes. Now, MVT::Other is only returned if the types
for those register classes differ.
llvm-svn: 67714
2009-03-25 23:28:33 +00:00
c8e54db801
Add sanity check in Clang TableGen backend to check if 'Component' is a string.
...
llvm-svn: 67565
2009-03-23 21:54:33 +00:00
8d5baa09f8
Fix the Win32 VS2008 build:
...
- Make type declarations match the struct/class keyword of the definition.
- Move AddSignalHandler into the namespace where it belongs.
- Correctly call functions from template base.
- Some other small changes.
With this patch, LLVM and Clang should build properly and with far less noise under VS2008.
llvm-svn: 67347
2009-03-19 23:26:52 +00:00
dd03b5bb63
Fix regression in 'tblgen -gen-clang-diags-defs': Emit the diagnostic kind instead of "DIAGNOSTICCONTROLLED".
...
llvm-svn: 67305
2009-03-19 17:18:09 +00:00
dbe3f77f5b
Add support to tablegen for naming the nodes themselves, not just the operands,
...
in selectiondag patterns. This is required for the upcoming shuffle_vector rewrite,
and as it turns out, cleans up a hack in the Alpha instruction info.
llvm-svn: 67286
2009-03-19 05:21:56 +00:00
4724b8262f
tblgen -gen-clang-diags-options: Output OptionTable entries in lexicographic
...
order.
llvm-svn: 67244
2009-03-18 21:36:46 +00:00
bf76c6d971
'tblgen -gen-clang-diags-options' now outputs the OptionTable:
...
static const WarningOption OptionTable[] = {
{"unused-macros", DIAGS(UnusedMacrosDiags)}
...
};
This table is not yet properly sorted.
llvm-svn: 67242
2009-03-18 21:28:47 +00:00
4a330b7ec1
Add another Clang TableGen-backend (-gen-clang-diags-options) for emitting
...
declarations for controlling groups of warnings. Currently this transforms:
def UnusedMacrosDiags : Option<"unused-macros", [pp_macro_not_used]>;
into:
static const diag::kind UnusedMacrosDiags[] = { diag::pp_macro_not_used };
llvm-svn: 67239
2009-03-18 21:16:16 +00:00
0f6dc78cfe
include the null at the end of a memorybuffer as part of the buffer.
...
This allows tblgen to handle include "foo.td" when the quote is exactly
the last character in a file. rdar://6695728
llvm-svn: 67232
2009-03-18 20:36:45 +00:00
9f20b83568
Add TGSourceMgr.cpp to CMake build, sort lines
...
llvm-svn: 67042
2009-03-16 17:04:14 +00:00
9750429e61
Add (hidden) TableGen command option '-clang-component' which specifies the
...
component's warnings to process for '-gen-clang-diags-defs'.
Also, when the component is specified, generate a '#if' prologue at the top of
the generated .def file (to match the current files).
llvm-svn: 66975
2009-03-13 22:53:41 +00:00
dee115697b
Add initial implementation of a TableGen backend for converting Clang-warnings
...
tablegen files to the original .def preprocessor include files. This is my first
TableGen backend; I don't claim that it is awesome.
llvm-svn: 66971
2009-03-13 22:21:17 +00:00
58e32877f1
Further constify Record::isSubClassOf.
...
llvm-svn: 66970
2009-03-13 22:20:10 +00:00
8bd06d8e1b
Fix escaping in asm string literals correctly by having tblgen unescape
...
them, then the asmprinter emitter reescape them.
llvm-svn: 66958
2009-03-13 21:33:17 +00:00
a614ef2000
add a horrible hack to fix the build.
...
llvm-svn: 66957
2009-03-13 21:23:43 +00:00
1bd3674306
add support for a few simple escape characters in tblgen strings.
...
llvm-svn: 66949
2009-03-13 21:03:27 +00:00
ba42e49c14
add a new TGError class and use it to propagate location info with
...
errors when thrown. This gets us nice errors like this from tblgen:
CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2))
/Users/sabre/llvm/Debug/bin/tblgen: error:
Included from X86.td:116:
Parsing X86InstrInfo.td:922: In CMOVL32rr: X86cmov node requires exactly 4 operands!
def CMOVL32rr : I<0x4C, MRMSrcReg, // if <s, GR32 = GR32
^
instead of just:
CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2))
/Users/sabre/llvm/Debug/bin/tblgen: In CMOVL32rr: X86cmov node requires exactly 4 operands!
This is all I plan to do with this, but it should be easy enough to improve if anyone
cares (e.g. keeping more loc info in "dag" expr records in tblgen.
llvm-svn: 66898
2009-03-13 16:25:21 +00:00
bd9b9210c2
give each Record a location.
...
llvm-svn: 66897
2009-03-13 16:09:24 +00:00
87710ca527
make "locations" a class instead of a typedef.
...
llvm-svn: 66895
2009-03-13 16:01:53 +00:00
afc74e2326
Unbreak build, bring in std::string for GCC 4.3
...
llvm-svn: 66876
2009-03-13 08:12:13 +00:00
bd5616271b
Unbreak build.
...
llvm-svn: 66874
2009-03-13 07:41:30 +00:00
8db9bc7ee4
split buffer management and diagnostic printing out of the tblgen
...
lexer into its own TGSourceMgr class.
llvm-svn: 66873
2009-03-13 07:05:43 +00:00
be0d672ac4
implement support for C-style string literal concatenation in td files.
...
llvm-svn: 66663
2009-03-11 17:08:13 +00:00
e3fc2d13be
Change various llvm utilities to use PrettyStackTraceProgram in
...
their main routines. This makes the tools print their argc/argv
commands if they crash.
llvm-svn: 66248
2009-03-06 05:34:10 +00:00
f6281fb47c
'append_cmd' should split its argument.
...
Makes '(append_cmd "-foo a b c")' work.
llvm-svn: 65623
2009-02-27 06:46:55 +00:00
265fc59cb2
these utils don't need exports.
...
llvm-svn: 65559
2009-02-26 19:02:23 +00:00
b402493161
Added support to have TableGen provide information if an intrinsic (core
...
or target) can be overloaded or not.
llvm-svn: 65404
2009-02-24 23:17:49 +00:00
c5437ea429
Overhaul my earlier submission due to feedback. It's a large patch, but most of
...
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
llvm-svn: 65379
2009-02-24 08:30:20 +00:00
786c5973f7
- Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit
...
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
need to investigate still.
llvm-svn: 65367
2009-02-24 02:35:30 +00:00
4d38d7272e
We have logic in there to emit a default debugging label at the beginning of a
...
function. Emitting another label after the prologue messes up the debugging. We
are doing that because the first DebugLoc object it sees is different from the
previous, which was nothing. Check for this situation, and don't emit one if
it's the first.
llvm-svn: 65180
2009-02-20 22:19:20 +00:00
0a0987d198
Add an accessor method to DwarfWriter to tell of debugging info should be emitted.
...
llvm-svn: 65092
2009-02-20 00:44:43 +00:00
82d8f120ec
Print out a new label only if the debug location *tuple* is different. The debug
...
locations may change, but the tuples may be the same.
llvm-svn: 65039
2009-02-19 09:16:38 +00:00
13aada6fc4
Forgot to check that debug information is supported.
...
llvm-svn: 65034
2009-02-19 08:06:12 +00:00
0f4c581c4a
Put code that generates debug labels into TableGen so that it can be used by
...
everyone.
llvm-svn: 64978
2009-02-18 23:12:06 +00:00
8cab4c44bb
Add explicit keywords.
...
llvm-svn: 64915
2009-02-18 16:37:45 +00:00
d1e179d992
Unbreak the build on win32.
...
Cleanup some warning.
Remark: when struct/class are declared differently than they are defined, this make problem for VC++ since it seems to mangle class differently that struct. These error are very hard to understand and find. So please, try to keep your definition/declaration in sync.
Only tested with VS2008. hope it does not break anything. feel free to revert.
llvm-svn: 64554
2009-02-14 16:06:42 +00:00
73247d2edc
Generalize some alias analysis logic from atomic
...
intrinsics to any IntrWriteArgMem intrinsics.
llvm-svn: 64551
2009-02-14 10:56:35 +00:00
b9946d9841
Eliminate a 'control reaches end of non-void function' warning.
...
llvm-svn: 64111
2009-02-09 03:07:24 +00:00
9f3f72f144
Get rid of one more non-DebugLoc getNode and
...
its corresponding getTargetNode. Lots of
caller changes.
llvm-svn: 63904
2009-02-06 01:31:28 +00:00
f80493bbfd
Remove a non-DebugLoc version of getNode.
...
llvm-svn: 63889
2009-02-05 22:07:54 +00:00
b842d529a3
Reapply 63765. Patches for clang and llvm-gcc to follow.
...
llvm-svn: 63812
2009-02-05 01:49:45 +00:00
f08a47bb70
Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
...
Adjust callers.
llvm-svn: 63789
2009-02-04 23:02:30 +00:00
ae616c2c61
Reverting 63765. This broke the build of both clang
...
and llvm-gcc.
llvm-svn: 63786
2009-02-04 22:47:25 +00:00
6ae3aa83d0
New feature: add support for target intrinsics being defined in the
...
target directories themselves. This also means that VMCore no longer
needs to know about every target's list of intrinsics. Future work
will include converting the PowerPC target to this interface as an
example implementation.
llvm-svn: 63765
2009-02-04 19:47:21 +00:00
3ed768868d
Fix PR3453 and probably a bunch of other potential
...
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
llvm-svn: 63494
2009-02-01 18:06:53 +00:00
33dddf3235
Explain why this is here.
...
llvm-svn: 63342
2009-01-29 23:19:43 +00:00
50338007b9
- Add DebugLoc to getTargetNode().
...
- Modify TableGen to add the DebugLoc when calling getTargetNode.
(The light-weight wrappers are only temporary. The non-DebugLoc version will be
removed once the whole debug info stuff is finished with.)
llvm-svn: 63273
2009-01-29 05:27:31 +00:00
84f0165273
Move the code that starts printing the Select_* functions
...
after the code that sorts the patterns. This doesn't
affect the output, but it makes the code a little easier
to follow.
llvm-svn: 63265
2009-01-29 01:37:18 +00:00
02b47b5e7a
Typo.
...
llvm-svn: 63174
2009-01-28 03:47:58 +00:00
2115d09a10
Add three new option properties.
...
Adds new option properties 'multi_val', 'one_or_more' and 'zero_or_one'.
llvm-svn: 63172
2009-01-28 03:47:20 +00:00
4a0bf66eb8
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
...
llvm-svn: 62762
2009-01-22 09:10:11 +00:00
9fc809e980
Make tblgen more portable, allowing it to build with ICC.
...
Patch by Robert Zeh!
llvm-svn: 62750
2009-01-22 05:10:16 +00:00
fbc89cecad
Change the hook API back to prevent memory leaks.
...
llvm-svn: 62686
2009-01-21 13:04:33 +00:00
bf9716e15d
Allow hooks with arguments.
...
llvm-svn: 62685
2009-01-21 13:04:00 +00:00
3289983d69
Avoid triggering an assertion failure when an instruction pattern
...
is a leaf node. Patch by Brandner!
llvm-svn: 62361
2009-01-16 21:30:55 +00:00
3e35fe8968
Add support for instructions with multiple ComplexPatterns, by
...
adding more information to the temporary variables names so that
they don't conflict.
llvm-svn: 62296
2009-01-16 02:05:52 +00:00
dc020f9c3c
Rename getABITypeSize to getTypePaddedSize, as
...
suggested by Chris.
llvm-svn: 62099
2009-01-12 20:38:59 +00:00
2089cd09ba
make tblgen autogenerate the nocapture intrinsics for
...
llvm.memcpy/memset/memmove. This allows removal of some
hackish code from basicaa.
llvm-svn: 62071
2009-01-12 02:41:37 +00:00
9d0a8770bd
add scaffolding to emit argument attributes. No functionality
...
change.
llvm-svn: 62067
2009-01-12 01:27:55 +00:00
49b7ee1b50
make tblgen emit the entire Intrinsic::getAttributes method,
...
not a random piece of it. No functionality change.
llvm-svn: 62066
2009-01-12 01:18:58 +00:00
9a3113aeb8
add nocapture attribute to llvm.mem* intrinsics and have tblgen
...
parse them. tblgen doesn't yet do anything with this info though.
llvm-svn: 62065
2009-01-12 01:12:03 +00:00
f76486ac8a
Improve support for type-generic vector intrinsics by teaching TableGen how
...
to handle LLVMMatchType intrinsic parameters, and by adding new subclasses
of LLVMMatchType to match vector types with integral elements that are
either twice as wide or half as wide as the elements of the matched type.
llvm-svn: 61834
2009-01-07 00:09:01 +00:00
49c42d5f57
Delete an unused variable and simplify the code.
...
llvm-svn: 61732
2009-01-05 19:31:28 +00:00
c9e772efc2
Handle iAny and fAny types in TreePatternNode::UpdateNodeType.
...
llvm-svn: 61713
2009-01-05 17:52:54 +00:00
1b97f3fcea
Fix spelling in some comments.
...
llvm-svn: 61702
2009-01-05 17:23:09 +00:00
f1fb65c747
Use dyn_cast intead of isa + cast in the generated DAGISel code. This
...
reduces the amount of code slightly when assertions are enabled.
llvm-svn: 61249
2008-12-19 18:13:39 +00:00
a501640ffa
Added support for vector widening.
...
llvm-svn: 61209
2008-12-18 20:03:17 +00:00
cf029824e1
Fix typo in error message.
...
llvm-svn: 61191
2008-12-18 04:06:58 +00:00
5932d8c986
Some enhancements for the 'case' expression.
...
Add (error) and (empty).
llvm-svn: 61117
2008-12-17 02:47:01 +00:00
e30a2820f6
Put Edge* classes into anonymous namespace.
...
Prevents conflicts between plugins.
llvm-svn: 60871
2008-12-11 10:34:18 +00:00
7f1bef5a55
Make 'extern' an option property.
...
Makes (forward) work better.
llvm-svn: 60667
2008-12-07 16:47:12 +00:00
4cc945da6e
Better error message.
...
llvm-svn: 60664
2008-12-07 16:45:12 +00:00
395cb25ac7
Re-apply Cedric's changes.
...
Use B instead of Beg (for consistency), but NodeA and NodeB instead of A
and B.
llvm-svn: 60663
2008-12-07 16:44:47 +00:00
0d88271490
Try to guess when the auto-generated cl::Sink option should be marked 'extern'.
...
This would be much easier to do if the CommandLine library didn't use
global state. Global state is evil.
llvm-svn: 60659
2008-12-07 16:42:47 +00:00
35a46f808b
Add a (progn)-like construct for (actions). Implemented as a DAG list.
...
llvm-svn: 60658
2008-12-07 16:42:22 +00:00
85467c71d2
Use (actions) instead of option properties, support external options.
...
Also includes a major refactoring. See documentation for more
information.
llvm-svn: 60656
2008-12-07 16:41:11 +00:00
af333378c9
The use of the construct:
...
for(Type1 B = ...;;) { Type2 B ; ... }
is bad: code is hard to read and VS VS don't like it (it ignore the second declaration of B).
This patch fix the problem in tablegen. Please don't write code like this.
llvm-svn: 60590
2008-12-05 13:37:30 +00:00
69cc2cbbff
Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.
...
llvm-svn: 60487
2008-12-03 18:15:48 +00:00
cc78cdf275
Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's
...
foldMemoryOperand how to "fold" them, by converting them into constant-pool
loads. When they aren't folded, they use xorps/cmpeqd, but for example when
register pressure is high, they may now be folded as memory operands, which
reduces register pressure.
Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will
remat it instead of copying zeros around (V_SETALLONES was already marked).
llvm-svn: 60461
2008-12-03 05:21:24 +00:00
ae3ba45eb2
Add a sanity-check to tablegen to catch the case where isSimpleLoad
...
is set but mayLoad is not set. Fix all the problems this turned up.
Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.
llvm-svn: 60459
2008-12-03 02:30:17 +00:00
cc2d0b2c4c
Support multiple compilation graph definitions. Not terribly useful, but makes the code more generic.
...
llvm-svn: 60199
2008-11-28 00:13:47 +00:00
3bb3da6f4c
Add 'hidden' and 'really_hidden' option properties.
...
llvm-svn: 60198
2008-11-28 00:13:25 +00:00
83bdb38965
On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size.
...
e.g.
movl 4(%esp), %eax
addl $4, %eax
is 2 bytes shorter than
movl $4, %eax
addl 4(%esp), %eax
llvm-svn: 60139
2008-11-27 00:49:46 +00:00
3ac10202c0
Small fix: the error message was incorrect in some cases.
...
llvm-svn: 60099
2008-11-26 10:55:45 +00:00
20313c954e
Support dependencies between plugins by priority-sorting.
...
llvm-svn: 59449
2008-11-17 17:30:25 +00:00
7549d568d5
Filter ToolPropertiesList to exclude all Tools not mentioned in the compilation graph.
...
llvm-svn: 59448
2008-11-17 17:29:42 +00:00
faae122e07
Add a layer of indirection to make plugins more flexible.
...
Use strings instead of TableGen defs in the compilation graph
definition. Makes it easier for the plugins to modify an existing graph.
llvm-svn: 59447
2008-11-17 17:29:18 +00:00
c35325c698
Fix to record comparator to make it work for return values > 1.
...
llvm-svn: 59242
2008-11-13 12:03:00 +00:00
3d2667c8f3
Put comma in correct place for call to StructType::get
...
llvm-svn: 59241
2008-11-13 10:18:35 +00:00
9182147f17
Modify the intrinsics pattern to separate out the "return" types from the
...
"parameter" types. An intrinsic can now return a multiple return values like
this:
def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
[LLVMMatchType<0>, LLVMMatchType<0>]>;
llvm-svn: 59237
2008-11-13 09:08:33 +00:00
a2909684b6
Check the return value of std::getenv.
...
When constructing std::strings from C strings, we should check the input
value to be not NULL so that the std::string constructor does not
segfault.
Fixes #3047 .
llvm-svn: 59131
2008-11-12 12:41:18 +00:00
1cb041242f
Add a bit of lazy evaluation to PopulateCompilationGraph().
...
Only the tools that are mentioned in the compilation graph definition
are now inserted by PopulateCompilationGraph(). This should cut down
plugin loading time a little.
llvm-svn: 59097
2008-11-12 00:05:17 +00:00
c1e7dbb1f7
Some cosmetic changes.
...
llvm-svn: 59096
2008-11-12 00:04:46 +00:00
f5a294d08d
Allow $CALL and $ENV in command names. Fixes #3025 .
...
llvm-svn: 58922
2008-11-08 19:43:32 +00:00
9278247502
Properly escape dashes in TableGen's LLVMC2 emitter.
...
Patch by Patrick Walton!
llvm-svn: 58901
2008-11-08 10:16:21 +00:00
cc0d2cfa01
Make tablegen print out a nice error message for a const char*
...
exception, like it does for a std::string exception.
llvm-svn: 58865
2008-11-07 21:01:13 +00:00
ce2417f4e1
Use an assert to check that SelectCode isn't called on
...
nodes that are already selected.
llvm-svn: 58763
2008-11-05 18:30:52 +00:00
f14b77ebf1
Eliminate the ISel priority queue, which used the topological order for a
...
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
llvm-svn: 58748
2008-11-05 04:14:16 +00:00
daca2240b1
Give tablegen's Type a destructor, to suppress spurious
...
"Type has virtual functions but non-virtual destructor"
warnings.
llvm-svn: 58710
2008-11-04 18:09:07 +00:00
ade09cd9d3
Add some asserts to verify MVT invariant assumptions.
...
llvm-svn: 58701
2008-11-04 16:03:56 +00:00
d7546abb8a
Change how extended types are represented in MVTs. Instead of fiddling
...
bits, use a union of a SimpleValueType enum and a regular Type*.
This increases the size of MVT on 64-bit hosts from 32 bits to 64 bits.
In most cases, this doesn't add significant overhead. There are places
in codegen that use arrays of MVTs, so these are now larger, but
they're small in common cases.
This eliminates restrictions on the size of integer types and vector
types that can be represented in codegen. As the included testcase
demonstrates, it's now possible to codegen very large add operations.
There are still some complications with using very large types. PR2880
is still open so they can't be used as return values on normal targets,
there are no libcalls defined for very large integers so operations
like multiply and divide aren't supported.
This also introduces a minimal tablgen Type library, capable of
handling IntegerType and VectorType. This will allow parts of
TableGen that don't depend on using SimpleValueType values to handle
arbitrary integer and vector types.
llvm-svn: 58623
2008-11-03 17:56:27 +00:00
ce2a938186
Have TableGen emit setSubgraphColor calls under control of a -gen-debug
...
flag. Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like. This really helps when debugging instruction selection.
llvm-svn: 58278
2008-10-27 21:56:29 +00:00
4e6ad3c12b
Remove tabs from my previous commit.
...
llvm-svn: 58263
2008-10-27 19:21:35 +00:00
d470f73e2c
Remove redundant word in tblgen error message.
...
llvm-svn: 58250
2008-10-27 15:59:43 +00:00
10a11f033c
Add a default constructor to AsmWriterOperand to make VS2008sp1 happy. (AsmWriterOperand is used in a std::pair, and VS need to generate the default constructor of this pair).
...
llvm-svn: 58185
2008-10-26 15:40:44 +00:00
9e50bff478
Unbreak LLVM on the MSVC compiler:
...
-Bring in int64_t for TableGen/Record.h and TableGen/TGLexer.h
-Define strtoull
llvm-svn: 57970
2008-10-22 09:54:13 +00:00
010e9b0760
Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers.
...
TableGen has been taught to generate the lists from instruction definitions.
llvm-svn: 57722
2008-10-17 21:00:09 +00:00
10549c29a8
Use INT64_C to emit constant values, to avoid problems with
...
constants that don't fit in an int. This fixes
"this decimal constant is unsigned only in ISO C90"
warnings.
llvm-svn: 57668
2008-10-17 04:40:39 +00:00
ca0546facc
Fun x86 encoding tricks: when adding an immediate value of 128,
...
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.
A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.
To support this, teach tablegen how to handle 64-bit constants.
llvm-svn: 57663
2008-10-17 01:33:43 +00:00
6e979020cd
Add support for having multiple predicates on a TreePatternNode.
...
This will allow predicates to be composed, which will allow the
predicate definitions to become less redundant, and eventually
will allow DAGISelEmitter.cpp to emit less redundant code.
llvm-svn: 57562
2008-10-15 06:17:21 +00:00
26ff6f9c54
Add <cstdio> include where needed by gcc-4.4.
...
Patch by Samuel Tardieu.
llvm-svn: 57291
2008-10-08 07:23:46 +00:00
758ce7260d
Fix shift overflow bug that would occur when a field was a full 32-bits
...
in tblgen. This is PR2827, thanks to Waldemar Knorr for tracking this
down.
llvm-svn: 57124
2008-10-05 18:31:58 +00:00
867d549fce
Handle some 64-bit atomics on x86-32, some of the time.
...
llvm-svn: 56963
2008-10-02 18:53:47 +00:00
b486350b15
Move the primary fast-isel top-level comments to FastISel.cpp, where
...
they'll be a little more visible. Also, update and reword them a bit.
llvm-svn: 56877
2008-09-30 20:48:29 +00:00
843fe14fab
Move the code that handles DAGISel error conditions into
...
helper functions instead of duplicating it inline each time
it is needed. This eliminates a few hundred or so copies
of this code in each target.
llvm-svn: 56759
2008-09-27 23:53:14 +00:00
6e0548336a
Rename ConstantSDNode's getSignExtended to getSExtValue, for
...
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
llvm-svn: 56700
2008-09-26 21:54:37 +00:00
4c758ea3e0
Large mechanical patch.
...
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
llvm-svn: 56622
2008-09-25 21:00:45 +00:00
53aa586844
Move llvmc2 header files under include/llvm/CompilerDriver
...
llvm-svn: 56466
2008-09-22 20:50:40 +00:00
47afe73081
Plugin support for llvmc2 (a-la opt).
...
llvm-svn: 56465
2008-09-22 20:49:34 +00:00
4825a0bb2f
Make comments a little bit more clear.
...
llvm-svn: 56463
2008-09-22 20:48:22 +00:00
8a2bdc74b2
Get rid of GlobalLanguageMap. Global state is evil.
...
llvm-svn: 56462
2008-09-22 20:47:46 +00:00
9c13f724fc
Add a (forward_as) option property
...
llvm-svn: 56459
2008-09-22 20:46:19 +00:00
b50080e6cb
Delete the file llvmc2/doc/LLVMC-Enhancements.rst + some minor language/spelling fixes.
...
llvm-svn: 56458
2008-09-22 20:45:17 +00:00
a229b3c9a7
Initial support for the CMake build system.
...
llvm-svn: 56419
2008-09-22 01:08:49 +00:00
038ca4aa0f
Add instruction names as comments to InstBits entries.
...
llvm-svn: 56275
2008-09-17 06:29:52 +00:00
24c79f28b1
Reverting r56249. On further investigation, this functionality isn't needed.
...
Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
8bc392fb1d
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
...
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
ec270fb640
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
...
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
llvm-svn: 56162
2008-09-12 18:08:03 +00:00
effb894453
Rename ConstantSDNode::getValue to getZExtValue, for consistency
...
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
2008-09-12 16:56:44 +00:00
c5af471be5
Indentation.
...
llvm-svn: 56107
2008-09-11 17:31:12 +00:00
56938af9e2
lib/Target/SubtargetFeature.cpp asserts that the FeatureKV[] table be sorted
...
by its first field, but TableGen doesn't actually enforce creating it that
way. TableGen sorts the records that will be used to create it by the names
of the records, not the Name field of those records.
This patch corrects the sort to use the "Name" field of the record as the
sort key.
llvm-svn: 56106
2008-09-11 17:05:32 +00:00
f66e1120c6
Change getSubReg semantics. It now returns zero if the specified register doesn't have a subreg of the specified index.
...
llvm-svn: 56099
2008-09-11 06:25:25 +00:00
f6ac018926
Fix typos in (generated) comments.
...
llvm-svn: 55916
2008-09-08 16:29:36 +00:00
ca14c07175
Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.
...
llvm-svn: 55893
2008-09-08 08:39:33 +00:00
105c581135
Eliminate a compile time warning.
...
llvm-svn: 55878
2008-09-07 09:00:57 +00:00
09638d34a5
Fix indentation of generated code.
...
llvm-svn: 55876
2008-09-07 08:23:06 +00:00
7cab17af29
Ignore multi-instruction patterns. e.g.
...
def : Pat<(i8 (trunc GR32:$src)),
(i8 (EXTRACT_SUBREG (MOV32to32_ GR32:$src), x86_subreg_8bit))>
llvm-svn: 55875
2008-09-07 08:19:51 +00:00
24422d4928
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
...
llvm-svn: 55679
2008-09-03 00:03:49 +00:00
34f3a962b0
Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
...
llvm-svn: 55623
2008-09-02 06:51:36 +00:00
0673a8af14
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
...
llvm-svn: 55545
2008-08-29 17:45:56 +00:00
d58f3e36d0
Add a target callback for FastISel.
...
llvm-svn: 55512
2008-08-28 23:21:34 +00:00
f304a7aa4d
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
...
llvm-svn: 55504
2008-08-28 21:40:38 +00:00
787f100462
Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling.
...
llvm-svn: 55480
2008-08-28 18:06:12 +00:00
6d153b02c9
Update a comment to reflect recent changes.
...
llvm-svn: 55418
2008-08-27 16:18:22 +00:00
5ca269e684
Basic FastISel support for floating-point constants.
...
llvm-svn: 55401
2008-08-27 01:09:54 +00:00
abfdf928d8
disallow direct access to SDValue::ResNo, provide a getter instead
...
llvm-svn: 55394
2008-08-26 22:36:50 +00:00
44003cc354
Refactor a bunch of FastISelEmitter code into a helper class, and
...
put each major step in a separate function. This makes the high
level sequence of events easier to follow.
llvm-svn: 55385
2008-08-26 21:21:20 +00:00
cf7154b2d6
- small bug corrected: incorrect iterator type.
...
- fix to please VS: add a return after an assert.
llvm-svn: 55380
2008-08-26 19:49:04 +00:00
3ea3efec44
We need to check that the return type is correct, even in cases where we don't
...
have a return type that differs from the operand types.
llvm-svn: 55376
2008-08-26 18:50:00 +00:00
491a930ea3
code simplification, no functionality change.
...
llvm-svn: 55363
2008-08-26 07:01:28 +00:00
345dcce5a6
stabilize more printing, this doesn't cause a problem
...
in the example attached to PR2590, but is a problem in general.
llvm-svn: 55361
2008-08-26 06:50:46 +00:00
ef820d2ef9
stablize SubRegsSet printing, part of PR2590
...
llvm-svn: 55360
2008-08-26 06:49:06 +00:00
bd7ccd0162
Stabilize 'getDwarfRegNumFull' output to not depend on random memory
...
orders, part of PR2590
llvm-svn: 55359
2008-08-26 06:43:25 +00:00
6f2db7238b
Throw the switch to allow FastISel to emit instructions whose return types different from their inputs. Next step: adding lowering pattens in FastISel that actually use these newly available opcodes.
...
llvm-svn: 55349
2008-08-26 01:22:59 +00:00
5f334d8215
Enhance TableGen to emit code for FastISel of opcodes with variadic return types without slowing down opcodes that are not variadic. No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch.
...
llvm-svn: 55347
2008-08-26 00:42:26 +00:00
8dd01ccdd8
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
...
type down. This is not currently used.
llvm-svn: 55345
2008-08-25 23:58:18 +00:00
5952cca7d1
Deepen the map structure tablegen uses to compute FastISel patterns, in preparation for having patterns
...
with return types that differ from their input types. This is not yet used.
llvm-svn: 55344
2008-08-25 23:43:09 +00:00
32635dbfb2
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
...
bitcast of constants in fast isel.
llvm-svn: 55325
2008-08-25 20:20:32 +00:00
eb0cee91f6
Move the point at which FastISel taps into the SelectionDAGISel
...
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
llvm-svn: 55219
2008-08-23 02:25:05 +00:00
9b29ec7ba9
Add a few comments.
...
llvm-svn: 55157
2008-08-22 00:28:15 +00:00
49e19e906f
Factor out the predicate check code from DAGISelEmitter.cpp
...
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
llvm-svn: 55156
2008-08-22 00:20:26 +00:00
fe9056584b
Basic fast-isel support for instructions with constant int operands.
...
llvm-svn: 55099
2008-08-21 01:41:07 +00:00
7b3932e5d8
Remove the code that limited FastISel to certain fixed signatures.
...
llvm-svn: 55096
2008-08-21 00:35:26 +00:00
7170623b16
Begin making more use of the FastISelEmitter class.
...
llvm-svn: 55093
2008-08-21 00:19:05 +00:00
e6724d404b
Remove an obsolete todo comment.
...
llvm-svn: 55080
2008-08-20 21:47:28 +00:00
3e2225dfd6
Factor the code for determining the target-specific instruction
...
namespace out of the isel emitters and into common code.
llvm-svn: 55079
2008-08-20 21:45:57 +00:00
02c84b8910
Simplify FastISel's constructor argument list, make the FastISel
...
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
llvm-svn: 55076
2008-08-20 21:05:57 +00:00
b93b489c54
Fix the string for MVT::isVoid.
...
llvm-svn: 55034
2008-08-20 01:44:30 +00:00
2dbebd7db5
For now, restrict FastISel to instructions that only involve one
...
register class.
llvm-svn: 55008
2008-08-19 20:58:14 +00:00
98e6f1c48a
Factor out the code to scan an instruction's operands into a
...
helper function.
llvm-svn: 55007
2008-08-19 20:56:30 +00:00
aa13b6f71b
Add more comments.
...
llvm-svn: 55004
2008-08-19 20:36:33 +00:00
49520b99a3
Fix indentation in FastISel tablegen-emitted code.
...
llvm-svn: 55003
2008-08-19 20:31:38 +00:00
a6c14d0ddb
Add more checking to filter out more kinds of things that
...
FastISel doesn't support yet.
llvm-svn: 55002
2008-08-19 20:30:54 +00:00
6a36fe912c
80 columns.
...
llvm-svn: 54998
2008-08-19 18:07:49 +00:00
dbd5328238
Add a few doxygen comments.
...
llvm-svn: 54997
2008-08-19 18:06:12 +00:00
522012fc56
Remove an unneeded #include.
...
llvm-svn: 54996
2008-08-19 17:53:16 +00:00
fa8b2ea41b
Speed up addRegisterDead by adding more fast checks before performing the expensive
...
subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.
llvm-svn: 54781
2008-08-14 18:34:18 +00:00
b2226e21c3
Initial checkin of the new "fast" instruction selection support. See
...
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
llvm-svn: 54751
2008-08-13 20:19:35 +00:00
e81ac0b66f
Oops, check in these files too, for the FastISel -> Fast rename.
...
llvm-svn: 54750
2008-08-13 19:55:00 +00:00
2c839d4b1e
Added support for overloading intrinsics (atomics) based on pointers
...
to different address spaces. This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
llvm-svn: 54195
2008-07-30 04:36:53 +00:00
2ce6f2ad5e
Rename SDOperand to SDValue.
...
llvm-svn: 54128
2008-07-27 21:46:04 +00:00
1705968102
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
...
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
llvm-svn: 53728
2008-07-17 19:10:17 +00:00
4a898c0b11
TargetRegisterDesc::Name field is the same as the abstract register name. There is no need for targets to specify register names in addition to their AsmName's.
...
llvm-svn: 53207
2008-07-07 22:19:41 +00:00
d6ec05077f
Refactor the tablegen DAGISelEmitter code for outputing calls to
...
getTargetNode and SelectNodeTo to reduce duplication, and to
make some of the getTargetNode code available to SelectNodeTo.
Use SelectNodeTo instead of getTargetNode in several new
interesting cases, as it mutates nodes in place instead of
creating new ones.
This triggers some scheduling behavior differences due to nodes
being presented to the scheduler in a different order. Some of the
arbitrary scheduling decisions it makes are now arbitrarily made
differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll,
where a trivial scheduling difference led to a trivial register
allocation difference.
llvm-svn: 53203
2008-07-07 21:00:17 +00:00
56e3f63ec5
Add explicit keywords.
...
llvm-svn: 53179
2008-07-07 18:00:37 +00:00
798d9bb97f
isel load folding is disabled at -fast. Now hoist the check up to the top level to save some time.
...
llvm-svn: 53096
2008-07-03 08:39:51 +00:00
22e9707480
Replace a few uses of SelectionDAG::getTargetNode with
...
SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
llvm-svn: 53057
2008-07-02 23:23:19 +00:00
3684013910
Make the subregister hashtable output more readable by wrapping the lines,
...
and mark it const along with the associated changes to TargetRegisterInfo.
llvm-svn: 52966
2008-07-01 17:34:38 +00:00
9e75cb2e7a
Use delete[] instead of free on an array created with new[].
...
llvm-svn: 52960
2008-07-01 15:56:31 +00:00
1760b92d27
Implement suggestions from Chris:
...
- Use a more accurate heuristic for the size of the hashtable.
- Use bitwise and instead of modulo since the size is a power of two.
- Use new[] instead of malloc().
llvm-svn: 52951
2008-07-01 07:02:30 +00:00
49cce257ae
Replace the dynamically computed std::set lookup method for subregisters with a hashtable-based
...
version that is computed by tblgen at the time LLVM is compiled.
llvm-svn: 52945
2008-07-01 00:18:52 +00:00
fb19f9402b
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
...
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
2008-07-01 00:05:16 +00:00
5447e4331b
Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.
...
llvm-svn: 52892
2008-06-30 07:32:56 +00:00
2e253b426f
check in anton's patch to make inlining happen in a determinstic order
...
and fix the bug that it uncovers: inlining a pattern fragment could bring
in other pattern fragments if the inlinee hadn't already been inlined.
llvm-svn: 52888
2008-06-30 03:02:03 +00:00
a2de8eab61
Fixes the last x86-64 test failure in compat.exp:
...
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)
llvm-svn: 52750
2008-06-26 01:51:13 +00:00
6a490371c9
Added MemOperands to Atomic operations since Atomics touches memory.
...
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
llvm-svn: 52706
2008-06-25 08:15:39 +00:00
49bad4c9e1
- Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
...
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.
llvm-svn: 52353
2008-06-16 20:29:38 +00:00
d4f2f2e86f
Remove some debug output from tblgen. This fixes a test.
...
llvm-svn: 52177
2008-06-10 14:53:49 +00:00
13237ac3b9
Wrap MVT::ValueType in a struct to get type safety
...
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
llvm-svn: 52044
2008-06-06 12:08:01 +00:00
6449690da4
Add #includes required by GCC 4.3, thanks for Zhongxing Xu
...
for reporting this.
llvm-svn: 51926
2008-06-04 04:46:14 +00:00
92d62b43c2
Fix the position of MemOperands in nodes that use variadic_ops
...
in DAGISelEmitter output. This bug was recently uncovered by the
addition of patterns for CALL32m and CALL64m, which are nodes
that now have both MemOperands and variadic_ops.
This bug was especially visible with PIC in various configurations,
because the new patterns are matching the indirect call code used
in many PIC configurations.
llvm-svn: 51877
2008-06-02 17:40:38 +00:00
10d2f50826
Initialize members properly during construction
...
llvm-svn: 51841
2008-06-01 16:22:49 +00:00
f970edf9b7
Callback was not executed on OS X when it was a function.
...
llvm-svn: 51814
2008-05-31 13:43:21 +00:00
bd3390c73a
Teach the DAGISelEmitter to not compute the variable_ops operand
...
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.
llvm-svn: 51808
2008-05-31 02:11:25 +00:00
401f3d6eab
Add a check for side effect-free options (specified only in the OptionList).
...
llvm-svn: 51759
2008-05-30 06:28:37 +00:00
c03ce6071c
Refactoring: remove code duplication introduced in the previous patch.
...
llvm-svn: 51757
2008-05-30 06:27:29 +00:00
e8cee23f67
Refactoring: split CollectProperties into two separate function objects.
...
llvm-svn: 51756
2008-05-30 06:27:02 +00:00
b9b010eb09
New feature: OptionList.
...
It can be handy to have all information about options gathered in a single place
to provide an overview of all supported options. This patch allows the following:
def Options : OptionList<[
(switch_option "E", (help "Help string")),
(alias_option "quiet", "q")
...
]>;
Tool-specific option properties (like 'append_cmd') have (obviously) no meaning in
this context, so the only properties that are allowed are 'help' and 'required'.
See usage example in examples/Clang.td.
llvm-svn: 51754
2008-05-30 06:26:08 +00:00
c8bd3517d5
A small optimization: use static char* array instead of StrVector.
...
llvm-svn: 51752
2008-05-30 06:24:49 +00:00
bf14dd7dc3
Make it possible to test if the '-o' option is provided.
...
The following is now allowed:
(case (not_empty "o"), do_something, ...)
This didn't work previously because "-o" is built-in.
llvm-svn: 51751
2008-05-30 06:24:07 +00:00
f83f33e8d3
Fix: 'sink' handling was broken.
...
llvm-svn: 51750
2008-05-30 06:23:29 +00:00
b043663cf9
Add support for option aliases.
...
llvm-svn: 51749
2008-05-30 06:22:52 +00:00
bf1552d866
Allow nesting of case expressions.
...
The following is now legal:
(case (in_language "c"),
(case (switch_on "E"), "gcc -x c -E $INFILE", (default), "gcc -x c $INFILE"),
(default),
"gcc $INFILE $OUTFILE")
llvm-svn: 51748
2008-05-30 06:22:15 +00:00
d1a6a34cc5
Small error message improvement.
...
llvm-svn: 51747
2008-05-30 06:21:48 +00:00
763cc577b3
Remove RequireDefault parameter from EmitCaseConstructHandler.
...
There are now no situations when 'default' is required.
llvm-svn: 51746
2008-05-30 06:21:21 +00:00
5916ade717
Fix some headers.
...
llvm-svn: 51745
2008-05-30 06:20:54 +00:00
2f51489a62
New tests for the 'case' expression: not_empty, in_language.
...
llvm-svn: 51744
2008-05-30 06:19:52 +00:00
1f7a028929
Make it possible to have multiple input languages for a single tool.
...
llvm-svn: 51742
2008-05-30 06:18:16 +00:00
326d508303
Better error reporting for the 'case' construct.
...
llvm-svn: 51738
2008-05-30 06:15:47 +00:00
9e58d5958f
Do not generate empty 'if's for the output_suffix property.
...
llvm-svn: 51737
2008-05-30 06:15:20 +00:00
6db24d96cd
Make it possible to use hooks like this: '$CALL(MyHook)/path/to/file'.
...
llvm-svn: 51734
2008-05-30 06:13:29 +00:00
73edde26f0
Make it possible to change the output file suffix based on command-line options.
...
For instance, the following command:
llvmc2 -E hello.c
now generates a file with the correct suffix (hello.i).
llvm-svn: 51733
2008-05-30 06:13:02 +00:00
fc4ed7ad83
Add support for user-provided hooks and environment variable reads to the cmd_line tool property.
...
Used like this: (cmd_line "$CALL(MyHook) --option -o $ENV(VARIABLE) $CALL(AnotherHook)")
Also works with case expressions.
Hook declarations are auto-generated, the definitions should be provided by the user
(just drop a .cpp file in the tools/llvmc2 directory).
Hooks should live in the "hooks" namespace and have type std::string hooks::Hook(void).
llvm-svn: 51732
2008-05-30 06:12:24 +00:00
f1c87ff378
Some small tweaks to make the generated code prettier.
...
llvm-svn: 51729
2008-05-30 06:10:47 +00:00
e57a403338
Make it possible to use the generalised 'case' construct in the cmd_line property.
...
llvm-svn: 51728
2008-05-30 06:10:19 +00:00
8fedbb7b02
Add a generalised 'case' construct.
...
Besides assigning edge weights, it will also be used by the cmd_line tool property.
llvm-svn: 51727
2008-05-30 06:08:50 +00:00
96af4ddb62
Add patterns for CALL32m and CALL64m. They aren't matched in most
...
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.
This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.
llvm-svn: 51706
2008-05-29 21:50:34 +00:00
6e582c449f
Fix a tblgen problem handling variable_ops in tblgen instruction
...
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.
This fixes "rdar://5791600", whatever that is ;-).
llvm-svn: 51699
2008-05-29 19:57:41 +00:00
3f6bb2713e
Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
...
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.
llvm-svn: 51660
2008-05-28 22:54:52 +00:00
52a005ac13
Do not generate by TableGen the hard-coded standard, target-independent part of
...
DAG instruction selectors. Introudce a dedicated header file for this part:
include/llvm/CodeGen/DAGISelHeader.h
TableGen now only generates the include preprocessor directive to include this
new header.
This is a preparation for supporting multiple implementations of instruction
selectors in the future.
Reviewed and approved by Evan and Dan.
llvm-svn: 51102
2008-05-14 10:17:11 +00:00
c79304461a
Filter option names to escape symbols not allowed as C++ identifiers.
...
Makes it possible to use options with names like "Wa,".
Also fixes the -Wall option handling as a side-effect.
llvm-svn: 50973
2008-05-12 16:33:06 +00:00
22ce861ffe
Reapply 50867: A small refactoring (extract method) + some comment fixes.
...
Fixed the build breakage, sorry for that.
llvm-svn: 50895
2008-05-09 08:27:26 +00:00
93cea9fd18
Revertin 50867 since it was breaking the build.
...
llvm-svn: 50871
2008-05-08 21:54:20 +00:00
d7e151f868
A small refactoring (extract method) + some comment fixes.
...
llvm-svn: 50867
2008-05-08 20:02:03 +00:00
41318a15d0
Use Doxygen-style comments.
...
llvm-svn: 50833
2008-05-07 21:50:19 +00:00
eeac27e38c
Change from llvm::SmallSet<std::string> to llvm::StringMap<char>.
...
llvm-svn: 50766
2008-05-06 18:18:58 +00:00
5e9d6a3dd8
Add new edge property combinator: weight.
...
llvm-svn: 50765
2008-05-06 18:18:20 +00:00
a02084cff7
Use edge weights to choose the right linker based on input language names.
...
llvm-svn: 50759
2008-05-06 18:15:12 +00:00
1b056e9e5a
Add weights to graph edges. Choose between edges based on their weight.
...
llvm-svn: 50757
2008-05-06 18:14:24 +00:00
3a2f5c423e
Remove the UnpackValues() function.
...
llvm-svn: 50756
2008-05-06 18:13:45 +00:00
7f6ed20009
Add a --linker command-line option, make all tests pass.
...
llvm-svn: 50755
2008-05-06 18:13:00 +00:00
20c18c344b
Naming fix: LLVMCCConfigurationEmitter -> LLVMCConfigurationEmitter.
...
llvm-svn: 50754
2008-05-06 18:12:03 +00:00
1002d5f33f
Rename LLVMCCConfigurationEmitter to LLVMCConfigurationEmitter
...
llvm-svn: 50748
2008-05-06 18:09:29 +00:00
d4918dd32c
Add output redirection, rename namespace llvmcc to namespace llvmc.
...
llvm-svn: 50746
2008-05-06 18:08:59 +00:00
7ed45e2261
Small output formatting fix.
...
llvm-svn: 50739
2008-05-06 17:27:15 +00:00
2709e1a2c9
Add inward edge counters to Nodes; Associate JoinLists with JoinTools.
...
llvm-svn: 50738
2008-05-06 17:26:53 +00:00
baa0b592d0
Return const char* instead of std::string in Tool classes
...
llvm-svn: 50733
2008-05-06 17:24:26 +00:00
1c41c6d734
Refactoring: extract method.
...
llvm-svn: 50731
2008-05-06 17:23:14 +00:00
59eb254092
Add new edge properties: parameter_equals, element_in_list, and.
...
llvm-svn: 50730
2008-05-06 17:22:47 +00:00
681df41f2c
Implemented switch_on edge property.
...
llvm-svn: 50729
2008-05-06 17:22:03 +00:00
251280ce0b
More work on edge properties. Use Edge classes instead of strings in CompilationGraph.
...
llvm-svn: 50726
2008-05-06 16:36:50 +00:00
459df48de7
Ongoing work: add an edge typechecker, rudimentary support for edge properties.
...
llvm-svn: 50725
2008-05-06 16:36:06 +00:00
adcb08d1b3
Convert internal representation to use DAG. This gives us more flexibility and enables future improvements.
...
llvm-svn: 50724
2008-05-06 16:35:25 +00:00
a8276c5323
Code reorg
...
llvm-svn: 50722
2008-05-06 16:34:12 +00:00
c6a47e8a79
VisualStudio project files updated. #include <algorithm> added to make VisualStudio happy. Also had to undefine setjmp because of #include <csetjmp> turning setjmp into _setjmp in VisualStudio.
...
llvm-svn: 49743
2008-04-15 21:27:11 +00:00
ba7126064a
Sort sub-registers and super-registers lists according to super-sub register relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed).
...
llvm-svn: 49714
2008-04-15 07:56:03 +00:00
57dd77462b
produce an error on invalid input instead of asserting:
...
def : Pat<((v2f64 (vector_shuffle immAllZerosV_bc,
^
llvm-svn: 49462
2008-04-10 04:48:34 +00:00
a6063118c6
Fix a bug where an incorrect bit mask would be generated if a target's last asm
...
string began at a power of 2 in the string index. For example, if "ret" started
at position 16, the ret instruction would be assigned code 16, but the mask would be AsmChars[] + Code & 15, not Code & 31.
llvm-svn: 49433
2008-04-09 16:24:11 +00:00
5ed17b67d2
Fix generation of multi-stage instruction itineraries. Patch by
...
giuma.cordes@gmail.com
llvm-svn: 49276
2008-04-06 17:38:14 +00:00
fc4ad7de66
Move instruction flag inference out of InstrInfoEmitter and into
...
CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags.
This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.
llvm-svn: 49123
2008-04-03 00:02:49 +00:00
20c9e4cbee
Add new CC lowering rule: provide a list of registers, which can be 'shadowed',
...
when some another register is used for argument passing.
Currently is used on Win64.
llvm-svn: 49079
2008-04-02 05:23:57 +00:00
6f2ffdb73f
Change the MemoryBuffer::getFile* methods to take just a pointer to the
...
start of a filename, not a filename+length. All clients can produce a
null terminated name, and the system api's require null terminated
strings anyway.
llvm-svn: 49041
2008-04-01 18:04:03 +00:00
abb139c3f8
Fix build breakage on Windows with GCC 4.3. References bug #2176 .
...
llvm-svn: 48874
2008-03-27 09:53:47 +00:00
c60c67fc37
Add explicit keywords.
...
llvm-svn: 48801
2008-03-25 22:06:05 +00:00
bdc24adaaf
A quick nm audit turned up several fixed tables and objects that were
...
marked read-write. Use const so that they can be allocated in a
read-only segment.
llvm-svn: 48800
2008-03-25 21:45:14 +00:00
70548d835e
Add first proof-of-concept universal compiler driver framework based
...
on ideas mentioned in PR686.
Written by Mikhail Glushenkov and contributed by Codedgers, Inc.
Old llvmc will be removed soon after new one will have all its properties.
llvm-svn: 48699
2008-03-23 08:57:20 +00:00
d97eea372a
Introduce a new node for holding call argument
...
flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
llvm-svn: 48640
2008-03-21 09:14:45 +00:00
a7cca362af
detabify llvm, patch by Mike Stump!
...
llvm-svn: 48577
2008-03-20 01:22:40 +00:00
fbbe80b597
Add support for escaping {} in asm strings, based on patch from Nick Burns.
...
llvm-svn: 48450
2008-03-17 07:26:14 +00:00
d3d0ad3f58
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
...
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
ec7533b620
Remove isImplicitDef TargetInstrDesc flag.
...
llvm-svn: 48381
2008-03-15 00:19:36 +00:00
0e7b00d79f
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
...
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
dd55d3f1b2
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
...
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
a731239c30
Recommitting changes after more testing. These appear to cause no problems.
...
llvm-svn: 48222
2008-03-11 09:33:47 +00:00
6aa4f515bb
emit an ID # for each regclass ID. Chris doesn't like to have to count.
...
llvm-svn: 48200
2008-03-11 00:00:23 +00:00
d4e1d9eeb2
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
...
llvm-svn: 48167
2008-03-10 19:31:26 +00:00
80b928e600
Revert accidentally committed local changes.
...
llvm-svn: 48126
2008-03-10 04:16:09 +00:00
0faed2a9a6
Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!
...
llvm-svn: 48125
2008-03-10 04:13:41 +00:00
4e622ec86d
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
...
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
llvm-svn: 48122
2008-03-10 02:17:22 +00:00
944207423b
This patch fixes a problem encountered by the CellSPU backend where variants
...
were being pruned in patterns where a variable was used more than once, e.g.:
(or (and R32C:$rA, R32C:$rC), (and R32C:$rB, (not R32C:$rC)))
In this example, $rC is used more than once and is actually significant to
instruction selection pattern matching when commuted variants are produced.
This patch scans the pattern's clauses and collects the variables, creating
a set of variables that are used more than once. TreePatternNode::isIsomorphicTo()
also understands that multiply-used variables are significant.
llvm-svn: 47950
2008-03-05 17:49:05 +00:00
d7a258d325
Rename PrintableName to Name.
...
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
c24ea4fb41
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
...
would have been a Godsend here!
llvm-svn: 47625
2008-02-26 21:11:01 +00:00
e65d2afdb1
De-tabify.
...
llvm-svn: 47595
2008-02-26 10:45:29 +00:00
a7d1ed4c98
Some platforms use the same name for 32-bit and 64-bit registers (like
...
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
2008-02-24 00:56:13 +00:00
579f07135a
Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings.
...
llvm-svn: 47367
2008-02-20 11:08:44 +00:00
a3cefeaf0c
Make tblgen a little smarter about constants smaller than i32. Currently,
...
tblgen will complain if a sign-extended constant does not fit into a
data type smaller than i32, e.g., i16. This causes a problem when certain
hex constants are used, such as 0xff for byte masks or immediate xor
values.
tblgen will try the sign-extended value first and, if the sign extended
value would overflow, it tries to see if the unsigned value will fit.
Consequently, a software developer can now safely incant:
(XORHIr16 R16C:$rA, 0xffff)
which is somewhat clearer and more informative than incanting:
(XORHIr16 R16C:$rA, (i16 -1))
even if the two are bitwise equivalent.
Tblgen also outputs the 64-bit unsigned constant in the generated ISel code
when getTargetConstant() is invoked.
llvm-svn: 47188
2008-02-15 23:05:48 +00:00
6ca3ccf519
Rewrite tblgen handling of subtarget features so
...
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to. Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.
llvm-svn: 47143
2008-02-14 23:35:16 +00:00
53e1b3f9d5
Change how FP immediates are handled.
...
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
llvm-svn: 47121
2008-02-14 08:57:00 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
17bedbc500
Tablegen support for insert & extract element matching
...
llvm-svn: 46901
2008-02-09 01:37:05 +00:00
2d489b5081
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
87fbd66f9f
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
...
llvm-svn: 46776
2008-02-05 22:50:29 +00:00
2cb9068c78
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
...
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
b2b9d6f0fb
Change the 'global modification' APIs in SelectionDAG to take a new
...
DAGUpdateListener object pointer instead of just returning a vector
of deleted nodes. This makes the interfaces more efficient (no more
allocating a vector [at least a malloc], filling it in, then walking
it) and more clean. This also allows the client to be notified of
nodes that are *changed* but not deleted.
llvm-svn: 46677
2008-02-03 06:49:24 +00:00
32e5347eb8
Get rid of the annoying blank lines before labels.
...
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
efd142a920
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
...
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
llvm-svn: 46659
2008-02-02 04:07:54 +00:00
27b32b87ed
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
...
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
1c6c16ea11
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
...
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
0592cf7e74
Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets
...
the pattern when generating matchin code.
The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern.
llvm-svn: 46606
2008-01-31 07:27:46 +00:00
3646fdda67
Create a new class, MemOperand, for describing memory references
...
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
2008-01-31 00:25:39 +00:00
167502a508
Fix to bug 1951: tblgen gratuitously renames variables when no temporary was
...
generated. This feature would only show up in fairly complex patterns, such
as this one in CellSPU:
def : Pat<(add (SPUhi tconstpool:$in, 0), (SPUlo tconstpool:$in, 0)),
(IOHLlo (ILHUhi tconstpool:$in), tconstpool:$in)>;
which generated the following emit code:
SDNode *Emit_0(const SDOperand &N, unsigned Opc0, unsigned Opc1, MVT::ValueType VT0, MVT::ValueType VT1) DISABLE_INLINE {
SDOperand N0 = N.getOperand(0);
SDOperand N00 = N0.getOperand(0);
SDOperand N01 = N0.getOperand(1);
SDOperand N1 = N.getOperand(1);
SDOperand N10 = N1.getOperand(0);
SDOperand N11 = N1.getOperand(1);
SDOperand Tmp3(CurDAG->getTargetNode(Opc0, VT0, N00), 0);
return CurDAG->SelectNodeTo(N.Val, Opc1, VT1, Tmp3, Tmp2); /* Tmp2 s/b N00 */
}
Tested against the test suites without incident.
llvm-svn: 46487
2008-01-29 02:29:31 +00:00
010bd77372
Add interator interface to DAGInit also
...
llvm-svn: 46250
2008-01-22 11:00:07 +00:00
e49cc26380
Provide iterator access to ListInit contents
...
llvm-svn: 46223
2008-01-21 22:30:26 +00:00
fe2714fab3
Add files to windows project files. Also include <algorithm> explicitly so that vstudio build works
...
llvm-svn: 46013
2008-01-15 21:43:17 +00:00
4d70ba3134
Rename CCIfStruct to CCIfByVal and CCStructAssign to CCPassByVal. Remove unused parameters of CCStructAssign and add size and alignment requirement info.
...
llvm-svn: 45997
2008-01-15 03:34:58 +00:00
a9ecdf6927
Revert my last commit. Not needed.
...
llvm-svn: 45994
2008-01-15 03:10:35 +00:00
02e78103ab
ByVal arguments are passed on stack. Make sure to allocate a slot using size and alignment information on the parameter attribute.
...
llvm-svn: 45897
2008-01-12 01:07:41 +00:00
c8226f32e9
Simplify the side effect stuff a bit more and make licm/sinking
...
both work right according to the new flags.
This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.
It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.
I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.
llvm-svn: 45843
2008-01-10 23:08:24 +00:00
317332fc2a
Start inferring side effect information more aggressively, and fix many bugs in the
...
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects. It would be really nice if we could
write patterns for copy instructions.
I have audited all the x86 instructions down to MOVDQAmr. The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.
llvm-svn: 45829
2008-01-10 07:59:24 +00:00
70ddafaf45
Fix a crash on code like: let x = 1 {x
...
llvm-svn: 45827
2008-01-10 07:01:53 +00:00
86c458a178
if an instr lacks a pattern, assume it has side effects (unless never has s-e is true).
...
llvm-svn: 45823
2008-01-10 05:40:54 +00:00
42c63ef96e
start inferring 'no side effects'.
...
llvm-svn: 45822
2008-01-10 05:39:30 +00:00
9e69654461
Infer mayload
...
llvm-svn: 45819
2008-01-10 04:44:48 +00:00
1ca2068227
realize that instructions who match intrinsics that read memory read memory.
...
Also, instructions with any nodes that are SDNPMayLoad also read memory.
llvm-svn: 45817
2008-01-10 04:38:57 +00:00
07fde9bde1
add a mayLoad property for machine instructions, a correlary to mayStore.
...
This is currently not set by anything.
llvm-svn: 45748
2008-01-08 18:05:21 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
e99a6caee4
Rename all the M_* flags to be namespace qualified enums, and switch
...
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
llvm-svn: 45692
2008-01-07 06:42:05 +00:00
f376c99ea0
rename hasVariableOperands() -> isVariadic(). Add some comments.
...
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
llvm-svn: 45687
2008-01-07 05:19:29 +00:00
fd548c96cc
Move M_* flags down in the file. Move SchedClass up in the
...
TargetInstrDescriptor class and shrink to 16-bits, saving a
word in TargetInstrDescriptor. Add some comments.
llvm-svn: 45686
2008-01-07 05:06:49 +00:00
6f8713decb
the name field of instructions is never set to a non-empty string,
...
just unconditionally use the def name of the instruction.
llvm-svn: 45684
2008-01-07 04:57:31 +00:00
e55e115616
Add predicates methods to TargetOperandInfo, and switch all clients
...
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
llvm-svn: 45677
2008-01-07 02:39:19 +00:00
a4ce4f6987
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
...
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
10324d0175
rename isStore -> mayStore to more accurately reflect what it captures.
...
llvm-svn: 45656
2008-01-06 08:36:04 +00:00
a348f55ec6
Change the 'isStore' inferrer to look for 'SDNPMayStore'
...
instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
llvm-svn: 45654
2008-01-06 06:44:58 +00:00
89c6566577
set the 'isstore' flag for instructions whose pattern is an
...
intrinsic that writes to memory.
llvm-svn: 45650
2008-01-06 05:36:50 +00:00
e457fd1e9b
remove some old hacky code that tried to infer whether a store
...
occured in a pattern, but failed miserably. The new code works for
any instruction that has a store in its pattern, including all the
x86 mem op mem instructions.
The only target-independent code that uses this is branch folding,
so this won't change anything in practice.
llvm-svn: 45648
2008-01-06 02:16:26 +00:00
27a4c1515a
rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet.
...
llvm-svn: 45647
2008-01-06 01:53:37 +00:00
d5326def4a
improve const correctness.
...
llvm-svn: 45646
2008-01-06 01:52:22 +00:00
ea2d52d867
Split the impl of CodeGenInstruction out to its own .cpp file, add a getName() accessor.
...
llvm-svn: 45645
2008-01-06 01:35:39 +00:00
85467a17ae
final cleanups.
...
llvm-svn: 45644
2008-01-06 01:21:51 +00:00
626b89daa4
further simplifications and cleanup
...
llvm-svn: 45643
2008-01-06 01:20:13 +00:00
827efa451f
simplify some code
...
llvm-svn: 45642
2008-01-06 01:12:44 +00:00
ab3242fd46
rename CodegenDAGPatterns -> CodeGenDAGPatterns
...
llvm-svn: 45641
2008-01-06 01:10:31 +00:00
e59a3c79e5
split enum emission out from InstrInfoEmitter into it's own tblgen backend.
...
llvm-svn: 45640
2008-01-06 00:49:05 +00:00
78ac0747e7
fix build on case sensitive file systems.
...
llvm-svn: 45639
2008-01-05 23:37:52 +00:00
7980bba549
now that computing CodegenDAGPatterns doesn't implicitly print stuff
...
out, DAGISelEmitter can compute it in its ctor, which simplifies some code.
Now we can use CodegenDAGPatterns in other parts of tblgen that want access
to dag pattern info, woo!
llvm-svn: 45636
2008-01-05 22:58:54 +00:00
cc43e79bcd
move Node Transformation printing from CodeGenDAGPatterns -> DAGISelEmitter.
...
The only difference in output is that we now print them in alphabetical
order instead of reverse alphabetical order.
llvm-svn: 45635
2008-01-05 22:54:53 +00:00
e7170df043
move predicate printing code from CodeGenDAGPatterns -> DAGISelEmitter.
...
llvm-svn: 45634
2008-01-05 22:43:57 +00:00
9abe77b2d0
fix a fixme by improving const correctness.
...
llvm-svn: 45633
2008-01-05 22:30:17 +00:00
8cab021ca2
change getQualifiedName to be a global function.
...
Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
llvm-svn: 45632
2008-01-05 22:25:12 +00:00
69ea01446e
Change the builtin matcher to emit a decision tree, which should help out
...
the VC++ 'nesting depth' issue.
llvm-svn: 45567
2008-01-04 04:38:35 +00:00
a47634ecb1
Don't let IntrinsicID be uninitialized if it doesn't match.
...
llvm-svn: 45563
2008-01-04 03:32:52 +00:00
ddc77f8e4c
Remove the default else. This was ending in code that looked like this:
...
if (!strcmp(Target, "x86")) {
// ...
}
else
IntrinsicID = Intrinsic::not_intrinsic;
llvm-svn: 45557
2008-01-03 23:02:16 +00:00
91678fc457
Fix a build problem with VC++ by not doing the target prefix
...
comparison for every builtin. This reduces the depth of
the if/elseif chain dramatically.
llvm-svn: 45500
2008-01-02 21:24:22 +00:00
dc3c9050f8
tblgen shouldn't include headers from llvm codegen.
...
llvm-svn: 45429
2007-12-30 00:25:23 +00:00
8adcd9f32e
remove attributions from utils.
...
llvm-svn: 45419
2007-12-29 20:37:13 +00:00
8fa21acd25
remove attributions from tools/utils makefiles.
...
llvm-svn: 45414
2007-12-29 20:07:17 +00:00
edf0788758
Change the PointerType api for creating pointer types. The old functionality of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space.
...
llvm-svn: 45082
2007-12-17 01:12:55 +00:00
cb77f04e1f
Add flags to indicate that there are "never" side effects or that there "may be"
...
side effects for machine instructions.
llvm-svn: 45022
2007-12-14 01:48:59 +00:00
687567bca5
Oops. Forgot these.
...
llvm-svn: 44969
2007-12-13 00:42:35 +00:00
38ef3a8ec7
Rather than having special rules like "intrinsics cannot
...
throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
llvm-svn: 44544
2007-12-03 20:06:50 +00:00
084b0eb3ca
Add TGParser files to VStudio project files. Removed generated files section from TableGen project file as it is no longer needed. #Include <algorithm> directly from TGParser.cpp so it can see std::reverse.
...
llvm-svn: 44340
2007-11-26 23:19:59 +00:00
176d048901
add missing #include
...
llvm-svn: 44282
2007-11-22 23:19:05 +00:00
5241695dca
resolve the last fixme's in the new tblgen parser.
...
llvm-svn: 44277
2007-11-22 21:06:59 +00:00
695506c046
change the Init print methods to return strings, and implement
...
print in terms of that.
llvm-svn: 44276
2007-11-22 21:05:25 +00:00
1b1e96b8d7
eliminate a bunch of print methods that are duplicate with the getAsString() method.
...
llvm-svn: 44275
2007-11-22 20:51:34 +00:00
f4127dd48e
Rewrite the tblgen parser in a recursive descent style, eliminating the bison parser.
...
This makes the parser much easier to understand, eliminates a ton of global variables,
and gives tblgen nice caret diagnostics. It is also faster, but tblgen probably doesn't
care about performance.
There are a couple of FIXMEs which I will take care of next.
llvm-svn: 44274
2007-11-22 20:49:04 +00:00
738fa17c4e
Switching back to strtoll. Including config.h. On VStudio builds, this overrides strtoll.
...
llvm-svn: 44264
2007-11-21 19:36:25 +00:00
07b57d2626
This change does a couple of things. First it gets the Visual Studio builds working.
...
I added the lexing files to the VStudio projects and removed the .l files from the
VStudio projects. There was a problem with use of strtoll in TGLexer.cpp and Chris
suggested switching to strtol, so that's included here.
Additionally, this checkin adds minimal x64 builds to the VStudio builds. Build issues
related to x64 in the windows specific files for DynamicLibrary.inc and Singals.inc
are worked around, but not ultimately solved. Binaries used to be stored in
...\win32\{Debug|Release}
but are now kept in
...\win32\bin\{win32|x64}\{Debug|Release}
intermediate files will continue to be stored in the individual project directories under
win32.
Some names will likely change in the future to reflect that the vstudio projects
are no longer 32-bit only, but I wanted to get things up and running today so kept away
from bigger restructuring.
llvm-svn: 44260
2007-11-21 00:37:56 +00:00
8b9ecdad0c
Add the ability to convert a tblgen type to a string.
...
llvm-svn: 44257
2007-11-20 22:25:16 +00:00
4205d25f06
Record the start of the current token, for use in error reporting.
...
llvm-svn: 44227
2007-11-19 07:43:52 +00:00
1a26296453
Add carat diagnostics to tblgen lexer errors.
...
llvm-svn: 44226
2007-11-19 07:38:58 +00:00
6070028736
minor cleanups
...
llvm-svn: 44212
2007-11-18 05:48:46 +00:00
98c39513ab
ensure header is self contained.
...
llvm-svn: 44211
2007-11-18 05:25:45 +00:00
da4ab67127
reimplement the tblgen lexer with a simple hand-written lexer. This eliminates
...
one dependency on flex and gets rid of two ".cvs" files.
llvm-svn: 44210
2007-11-18 02:57:27 +00:00
e2287ed552
Eliminate the recently introduced CCAssignToStackABISizeAlign
...
in favour of teaching CCAssignToStack that size 0 and/or align
0 means to use the ABI values. This seems a neater solution.
It is safe since no legal value type has size 0.
llvm-svn: 44107
2007-11-14 08:29:13 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
...
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
933b5b7e62
Add a flag for indirect branch instructions.
...
Target maintainers: please check that the instructions for your target are correctly marked.
llvm-svn: 44012
2007-11-12 07:39:39 +00:00
55f4e5d2dd
Fix on 64-bit machines.
...
llvm-svn: 44001
2007-11-12 00:56:04 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
...
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
a468a11d80
Add convenient helper to obtain list of ints
...
llvm-svn: 43993
2007-11-11 11:19:37 +00:00
b988e7e8cd
Add CCAssignToStackABISizeAlign for convenience in
...
dealing with types whose size & alignment are
different on different subtargets. Use it for x86 f80.
llvm-svn: 43988
2007-11-10 22:07:15 +00:00
fbe69d2cd6
Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
...
Much improvement in exception handling.
llvm-svn: 43794
2007-11-07 00:25:05 +00:00
758d0fd736
Remove some unnecessary C-style statics.
...
Restore an assertion that arithmetic can be performed on this format.
llvm-svn: 43638
2007-11-02 15:10:05 +00:00
0083d8f38d
switch some calls to SelectionDAG::getTargetNode to use
...
the one that takes an operand list instead of explicit
operands. There is one left though, the more interesting
one :)
llvm-svn: 43290
2007-10-24 06:25:09 +00:00
604b2314c8
tblgen uses dynamic_cast heavily, so it needs rtti info
...
llvm-svn: 43126
2007-10-18 15:54:45 +00:00
0ab3d27641
Reverting unnecessary commit of generated files.
...
llvm-svn: 43095
2007-10-17 21:36:08 +00:00
ef5d08f4ea
Switching TargetMachineRegistry to use the new generic Registry.
...
llvm-svn: 43094
2007-10-17 21:28:48 +00:00
ec8a8d1f51
Updated VC++ build system.
...
Silenced some VC warnings.
I'm getting linker errors, though: unresolved externals:
llvm::Split<class llvm::BasicBlock *,struct llvm::GraphTraits<class llvm::BasicBlock *> >(class llvm::DominatorTreeBase<class llvm::BasicBlock> &,class llvm::BasicBlock *)
and
llvm::Split<struct llvm::Inverse<class llvm::BasicBlock *>,struct llvm::GraphTraits<struct llvm::Inverse<class llvm::BasicBlock *> > >(class llvm::DominatorTreeBase<class llvm::BasicBlock> &,class llvm::BasicBlock *)
Where are these defined?
llvm-svn: 43073
2007-10-17 14:56:40 +00:00
3cfb56d489
One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
...
take a deleted nodes vector, instead of requiring it.
One more significant change: Implement the start of a legalizer that
just works on types. This legalizer is designed to run before the
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.
This design/impl has the following advantages:
1. When finished, this will *significantly* reduce the amount of code in
LegalizeDAG.cpp. It will remove all the code related to promotion and
expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike
LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of
deallocating and reallocating the entire graph that points to some
mutated node.
5. The code nicely separates out handling of operations with invalid
results from operations with invalid operands, making some cases
simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :),
allowing you to easily understand what legalize types is doing.
This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing. However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine. The
biggest issues are:
1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.
Hey, at least it is a step in the right direction :). If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If
this explodes it will tell you what needs to be implemented. Help is
certainly appreciated.
Once this goes in, we can do three things:
1. Add a new pass of dag combine between the "type legalizer" and "operation
legalizer" passes. This will let us catch some long-standing isel issues
that we miss because operation legalization often obfuscates the dag with
target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
making it much smaller and simpler. When that happens we can then
reimplement the core functionality left in it in a much more efficient and
non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
selectiondags maybe...
llvm-svn: 42981
2007-10-15 06:10:22 +00:00
2e3d609da6
Fix typos.
...
llvm-svn: 42896
2007-10-12 08:39:02 +00:00
25a00a63eb
Add sqrt and powi intrinsics for long double.
...
llvm-svn: 42423
2007-09-28 01:08:20 +00:00
43686dad3d
Rename keyword "modify" -> "implicit".
...
llvm-svn: 42282
2007-09-25 01:48:59 +00:00
f73fb6261b
Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
...
between two registers in the specific class.
llvm-svn: 42123
2007-09-19 01:35:01 +00:00
ffd6995cc7
Bug fix and minor clean up of generated code.
...
llvm-svn: 42069
2007-09-17 22:26:41 +00:00
1406f7143b
regenerate
...
llvm-svn: 42036
2007-09-17 17:40:48 +00:00
58c468fb09
Remove spurious consts. This fixes warnings with compilers that
...
are strict about such things.
llvm-svn: 41956
2007-09-14 20:08:19 +00:00
59c39dc197
Initial support for multi-result patterns:
...
1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
(modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.
llvm-svn: 41897
2007-09-12 23:30:14 +00:00
c7852a689a
Allow set operators with multiple destinations, i.e. (set x, y, (op a, b)).
...
llvm-svn: 41861
2007-09-11 19:52:18 +00:00
cef2c0efcc
TableGen no longer emit CopyFromReg nodes for implicit results in physical
...
registers. The scheduler is now responsible for emitting them.
llvm-svn: 41781
2007-09-07 23:59:02 +00:00
20711a8b9a
Always check the type of node. This prevents situations such as selecting 32-bit rotate target instruction for a 64-bit node when 64-bit pattern is missing.
...
llvm-svn: 41710
2007-09-04 20:18:28 +00:00
febf946ea7
Add MVT::fAny for overloading intrinsics on floating-point types.
...
llvm-svn: 41128
2007-08-16 21:57:19 +00:00
66011c17d5
propagate struct size and alignment of byval arguments to the DAG
...
llvm-svn: 40986
2007-08-10 14:44:42 +00:00
bebc3bb2e3
This resolves a regression of BasicAA which failed to find any memory information for overloaded intrinsics (PR1600). This resolves that issue, and improves the matching scheme to use a BitVector rather than a binary search.
...
llvm-svn: 40872
2007-08-06 20:57:16 +00:00
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
...
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
c9de9cec18
Added TargetInstrDescriptor::numDefs - num of results.
...
llvm-svn: 40709
2007-08-02 00:20:17 +00:00
e379f08b19
More explicit keywords.
...
llvm-svn: 40589
2007-07-30 14:51:59 +00:00
1a39a2d13d
VStudio compiler errors and placing Function*->ExFunc map under ManagedStatic control.
...
This commit fixes two things. One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop. I fixed these
by renaming one of the two variables. Additionally, I've made the Function*->ExFunc map in
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown. In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.
llvm-svn: 40558
2007-07-27 18:26:35 +00:00
336718dd5c
Fix a pasto in a comment.
...
llvm-svn: 40527
2007-07-26 15:11:00 +00:00
2f3becc49c
Have register info provide the inverse mapping of register->superregisters. PR1350
...
llvm-svn: 40519
2007-07-26 08:01:58 +00:00
cde0ee5221
Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
...
llvm-svn: 40518
2007-07-26 07:48:21 +00:00
c9ea29456a
Teach TableGen about the new vector types.
...
llvm-svn: 40513
2007-07-26 06:41:18 +00:00
Eric Christopher