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Author SHA1 Message Date
Changpeng Fang 6f4922ccc9 AMDGPU: Add Selection patterns to support add of one bit. 
Summary:
  We generate s_xor to lower add of i1s in general cases, and s_not to
lower add with a one-bit imm of -1 (true).

Reviewers:
  rampitec

Differential Revision:
  https://reviews.llvm.org/D52518

llvm-svn: 343030
 2018-09-25 21:21:18 +00:00