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66 Commits

Author SHA1 Message Date
Matheus Almeida 5be0cd8720 [mips][msa] Direct Object Emission support for VEC instructions. 
List of instructions:
and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v.

llvm-svn: 192588
 2013-10-14 12:57:18 +00:00
Matheus Almeida 7d65ea76ea [mips][msa] Direct Object Emission of INSVE.{b,h,w,d}. 
llvm-svn: 192587
 2013-10-14 12:38:17 +00:00
Matheus Almeida bc189eb318 [mips][msa] Direct Object Emission for the majority of the ELM instructions. 
List of instructions:
copy_s.{b,h,w}
copy_u.{b,h,w}
sldi.{b,h,w,d}
splati.{b,h,w,d}

llvm-svn: 192586
 2013-10-14 12:22:43 +00:00
Matheus Almeida b74293dc55 [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction. 
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.

llvm-svn: 192582
 2013-10-14 11:49:30 +00:00
Matheus Almeida 3372c6adb1 This reverts 192447 because of compiler warning generated on darwin build. 
llvm-svn: 192451
 2013-10-11 13:58:32 +00:00
Matheus Almeida 599446af66 This reverts r192449 because of compiler warning generated on darwin build. 
llvm-svn: 192450
 2013-10-11 13:56:12 +00:00
Matheus Almeida aa5138b538 [mips][msa] Direct Object Emission for the majority of the ELM instructions. 
llvm-svn: 192449
 2013-10-11 13:39:49 +00:00
Matheus Almeida 3d0933c425 [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction. 
INSERT is the first type of MSA instruction that requires a change to the way MSA registers are parsed. 
This happens because MSA registers may be suffixed by an index in the form of an immediate or a
 general purpose register. The changes to parseMSARegs reflect that requirement.

llvm-svn: 192447
 2013-10-11 13:29:36 +00:00
Jack Carter 8ff70e3e26 [mips][msa] Direct Object Emission for I8 instructions. 
This patch adds Direct Object Emission support for I8 instructions: andi.b, bmnzi.b, bmzi.b, bseli.b, nori.b, ori.b, shf.{b,h,w} and xori.b.


Patch by Matheus Almeida

llvm-svn: 191688
 2013-09-30 18:05:18 +00:00
Jack Carter c3b25686b9 [mips][msa] Direct Object Emission for I5 instructions. 
This patch adds Direct Object Emission support for I5 instructions: addvi.{b,h,w,d}, ceqi.{b,h,w,d}, clei_s.{b,h,w,d}, clei_u.{b,h,w,d}, clti_s.{b,h,w,d}, clti_u.{b,h,w,d}, maxi_s.{b,h,w,d}, maxi_u.{b,h,w,d}, mini_s.{b,h,w,d}, mini_u.{b,h,w,d}, subvi.{b,h,w,d}.


Patch by Matheus Almeida

llvm-svn: 191687
 2013-09-30 17:58:07 +00:00
Jack Carter 92e6e0f171 [mips][msa] Direct Object Emission for 2R instructions. 
This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}.  


Patch by Matheus Almeida

llvm-svn: 191685
 2013-09-30 17:52:33 +00:00
Jack Carter 6eed9cc6a8 [PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR 
and not an MSA register

Patch by Matheus Almeida

llvm-svn: 191684
 2013-09-30 17:43:04 +00:00
Jack Carter cb8b40b08d [mips][msa] Direct Object Emission for 3RF instructions. 
Patch by Matheus Almeida

llvm-svn: 191461
 2013-09-26 21:31:43 +00:00
Jack Carter 3eb663b037 [mips][msa] Direct Object Emission for 3R instructions. 
This is the first set of instructions with a ".b" modifier thus we need to add the required code to disassemble a MSA128B register class.
 
Patch by Matheus Almeida

llvm-svn: 191415
 2013-09-26 00:09:46 +00:00
Jack Carter 3381298227 [mips][msa] Direct Object Emission for 2RF instructions. 
Patch by Matheus Almeida

llvm-svn: 191413
 2013-09-25 23:56:25 +00:00
Jack Carter 5dc8ac92b9 [mips][msa] Direct Object Emission support for the MSA instruction set. 
In more detail, this patch adds the ability to parse, encode and decode MSA registers ($w0-$w31). The format of 2RF instructions (MipsMSAInstrFormat.td) was updated so that we could attach a test case to this patch i.e., the test case parses, encodes and decodes 2 MSA instructions. Following patches will add the remainder of the instructions.

Note that DecodeMSA128BRegisterClass is missing from MipsDisassembler.td because it's not yet required at this stage and having it would cause a compiler warning (unused function).

Patch by Matheus Almeida

llvm-svn: 191412
 2013-09-25 23:50:44 +00:00