Commit Graph

807 Commits

Author SHA1 Message Date
Joerg Sonnenberger 1f5984ca82 From Matt Thomas: use long long for [u]int64_t and [u]intmax_t on
NetBSD/aarch64 to simplify code sharing with NetBSD/arm.

llvm-svn: 204798
2014-03-26 11:48:29 +00:00
Will Schmidt 22d2435a00 [PPC64LE] Add a CALL_ELF macro to indicate use of the ELFv2 ABI.
Additional clarification from Uli for the background on _CALL_ELF:
"Historically GCC has provided various _CALL_... predefines depending on the
ABI currently being compiled for. (_CALL_SYSV,_CALL_AIXDESC, _CALL_DARWIN )
When we needed a new define for the current ABI, we decided on using _CALL_ELF
since the official name of the ABI is the OpenPower ElfV2 ABI, with the
current Linux ABI retro-actively being renamed the ELFv1 ABI
and so we decided on using _CALL_ELF to identify the Linux (+BSD etc.) ELF ABI,
with _CALL_ELF=1 for the v1 ABI and _CALL_ELF=2 for the v2 ABI.
(Note that this matches the gcc compiler switch -mabi=elfv1 vs. -mabi=elfv2)."

In code, a (_CALL_ELF==2) check will indicate when the ELFv2 ABI is
to be used.   This is the desired default for the PPC64 LE target.

llvm-svn: 204627
2014-03-24 17:27:03 +00:00
Will Schmidt 0c67b7e3f2 Update DataLayout/DescriptionString for ppc64le
Update DataLayout/DescriptionString for ppc64le

Similar LLVM change made in r203664

Testcase included.

llvm-svn: 204613
2014-03-24 15:48:02 +00:00
Christian Pirker 227f5ed547 AArch64_BE test case for predefined macros
llvm-svn: 204604
2014-03-24 13:57:21 +00:00
Craig Topper e6f17d0cac De-virtualize a method since it doesn't override anything and isn't overridden itself.
llvm-svn: 203538
2014-03-11 04:07:52 +00:00
Craig Topper 3164f33f8f [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203537
2014-03-11 03:39:26 +00:00
Robert Lytton 2c942c64fb Make __LITTLE_ENDIAN__/__BIG_ENDOAN__ common PredefinedMacros
llvm-svn: 203455
2014-03-10 12:06:29 +00:00
Ahmed Charles dfca6f97bc [C++11] Replace OwningPtr include with <memory>.
llvm-svn: 203389
2014-03-09 11:36:40 +00:00
Ahmed Charles b89843299a Replace OwningPtr with std::unique_ptr.
This compiles cleanly with lldb/lld/clang-tools-extra/llvm.

llvm-svn: 203279
2014-03-07 20:03:18 +00:00
Ahmed Charles 9a16beb8bc Change OwningPtr::take() to OwningPtr::release().
This is a precursor to moving to std::unique_ptr.

llvm-svn: 203275
2014-03-07 19:33:25 +00:00
Saleem Abdulrasool 29b82b631d Update for LLVM API change
Use the new getObjectFormat/setObjectFormat instead of Environment now that the
file format is a separate field.

llvm-svn: 203161
2014-03-06 20:47:19 +00:00
Hal Finkel f7a07a5010 Add a PPC inline asm constraint type for single CR bits
This adds support for the PPC "wc" inline asm constraint (used for allocating
individual CR bits). Support for this constraint type was recently added to the
LLVM PowerPC backend. Although gcc does not currently support allocating
individual CR bits, this identifier choice has been coordinated with the gcc
PowerPC team, and will be marked as reserved for this purpose in the gcc
constraints.md file.

Prior to this change, none of the multi-character PPC constraints were handled
correctly (the '^' escape character was not being added as required by the
parsing code in LLVM). This should now be fixed. I'll add tests for these other
constraints as support is added for them in the backend.

llvm-svn: 202658
2014-03-02 18:24:18 +00:00
Roman Divacky b1ae3d4937 Give sparcv9 the ability to set the target cpu. Change it from accepting
-march which doesnt exist on sparc gcc to -mcpu. While here adjust a
few tests to not write an unused temporary file.

llvm-svn: 202177
2014-02-25 18:35:30 +00:00
Christian Pirker 9b019ae899 Add AArch64 big endian Target (aarch64_be)
llvm-svn: 202151
2014-02-25 13:51:00 +00:00
Kevin Qin ad64f6d4e5 [AArch64] Change int64_t from 'long long int' to 'long int' for AArch64 target.
Most 64-bit targets define int64_t as long int, and AArch64 should
make same definition to follow LP64 model. In GNU tool chain, int64_t
is defined as long int for 64-bit target. So to get consistent with GNU,
it's better Changing int64_t from 'long long int' to 'long int',
otherwise clang will get different name mangling suffix compared with g++.

llvm-svn: 202004
2014-02-24 02:45:03 +00:00
Daniel Sanders 5a1449dab4 [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846

llvm-svn: 201792
2014-02-20 14:58:19 +00:00
Tim Northover 02e38609e7 ARM: implement support for crypto intrinsics in arm_neon.h
llvm-svn: 200708
2014-02-03 17:28:04 +00:00
Joerg Sonnenberger 9864bd5858 NetBSD uses signed wchar_t on AArch64. It also wants __LITTLE_ENDIAN__ /
__BIG_ENDIAN__ as on other architectures.

llvm-svn: 200655
2014-02-02 21:55:10 +00:00
Tim Northover c322f838bc ARM & AArch64: share the BI__builtin_neon enum defs.
llvm-svn: 200470
2014-01-30 14:47:51 +00:00
Jakob Stoklund Olesen 5b630b4e96 SPARCv9 supports atomic operations up to 64 bits.
Patch by Roman Divacky!

llvm-svn: 200452
2014-01-30 04:48:04 +00:00
Artyom Skrobov e72a6f7a70 Cortex-M3 and Cortex-M4 should not enable hwdiv-arm (committing again, with an updated test)
llvm-svn: 200385
2014-01-29 09:43:07 +00:00
Reid Kleckner 2c35b3b029 Revert "Cortex-M3 and Cortex-M4 should not enable hwdiv-arm"
This reverts commit r200233.

The test required a registered ARM target, it was testing LLVM's
generated assembly, and it should have been an IRGen test.

llvm-svn: 200242
2014-01-27 19:26:39 +00:00
Artyom Skrobov 1c66c3a7f2 Cortex-M3 and Cortex-M4 should not enable hwdiv-arm
llvm-svn: 200233
2014-01-27 18:44:25 +00:00
Robert Lytton 1a2292614c XCore target exception handling
Implement __builtin_eh_return_data_regno()

llvm-svn: 200231
2014-01-27 17:56:25 +00:00
Simon Atanasyan 26292ccc91 [Mips] Fix __mips macro definition.
llvm-svn: 200223
2014-01-27 13:59:11 +00:00
Simon Atanasyan 1a3665b676 [Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively.
llvm-svn: 200222
2014-01-27 13:59:04 +00:00
Evan Cheng 31dd9a6cc1 Fix r195149. Triple should correctly reflect that target. If it contains ios,
e.g. thumbv7m-apple-ios3.0.0-eabi, then it should mean it's an iOS target. For
embedded targets, the OS should be unknown, e.g. thumbv7m-apple-unknown-macho.
Since Tim has recently fixed the triple, r195149 is no longer needed.
rdar://15911035

llvm-svn: 200164
2014-01-26 23:12:43 +00:00
Joerg Sonnenberger f19dc30518 Use canonical spelling of NetBSD
llvm-svn: 200157
2014-01-26 20:02:03 +00:00
Weiming Zhao fb5c21a70b PR18465: [Thumbv8] add predefined macros
currently, for thumbv8, two predefined macros are missing:
 define __THUMB_INTERWORK__ 1
 define __THUMB_INTERWORK__ 1

This patch adds them for thumbv8.

llvm-svn: 199819
2014-01-22 18:42:13 +00:00
Bradley Smith 0f28f0cfc1 [ARM] Add ACLE enum/wchar size predefines
llvm-svn: 199642
2014-01-20 10:52:00 +00:00
Jakob Stoklund Olesen 497332c05f SPARCv9 implements long double as an IEEE quad.
llvm-svn: 199399
2014-01-16 16:43:19 +00:00
Tim Northover 157d911b42 MachO: use *-*-*-macho for MachO embedded targets.
Previously we had bodged together some hacks mapping MachO embedded
targets (i.e. mainly ARM v6M and v7M) to the "*-*-darwin-eabi" triple.
This is incorrect in both details (they don't run Darwin and they're
not EABI in any real sense).

This commit appropriates the existing "MachO" environment for the
purpose instead.

llvm-svn: 199367
2014-01-16 08:48:16 +00:00
Bob Wilson b767d15d1e Remove support for armv7f slice. <rdar://problem/12478440>
This was never used for anything so we should just get rid of it.

llvm-svn: 199336
2014-01-15 21:43:40 +00:00
Jan Wen Voung 1f9c4ee464 Ensure i686-nacl long long is aligned 8 bytes (like malign-double)
Set NaCl OSTargetInfo to have LongLongAlign = 64. Otherwise, it will
pick up the setting of 32 from X86_32TargetInfo.

llvm-svn: 199335
2014-01-15 21:42:41 +00:00
Hans Wennborg c9bd88e681 Remove the -cxx-abi command-line flag.
This makes the C++ ABI depend entirely on the target: MS ABI for -win32 triples,
Itanium otherwise. It's no longer possible to do weird combinations.

To be able to run a test with a specific ABI without constraining it to a
specific triple, new substitutions are added to lit: %itanium_abi_triple and
%ms_abi_triple can be used to get the current target triple adjusted to the
desired ABI. For example, if the test suite is running with the i686-pc-win32
target, %itanium_abi_triple will expand to i686-pc-mingw32.

Differential Revision: http://llvm-reviews.chandlerc.com/D2545

llvm-svn: 199250
2014-01-14 19:35:09 +00:00
Joerg Sonnenberger 9853439b5b Hook up NetBSD/aarch64.
llvm-svn: 199124
2014-01-13 18:25:15 +00:00
Rafael Espindola 26d0f7ce7d Use 'w' instead of 'c' to represent the win32 mangling.
This change was requested to avoid confusion if we ever support non windows
coff systems.

llvm-svn: 198939
2014-01-10 13:42:17 +00:00
Rafael Espindola c418ae93a8 Update for llvm's DataLayout including mangling information.
llvm-svn: 198439
2014-01-03 19:22:05 +00:00
Rafael Espindola 29db13a753 Reformat the description strings. No functionality change.
llvm-svn: 198430
2014-01-03 18:13:17 +00:00
Rafael Espindola 961728064e Remove the now unused 's' specifications.
llvm-svn: 198308
2014-01-02 14:06:59 +00:00
Rafael Espindola d8da90b008 Pass the aapcs and apcs features down to llvm.
No functionality change, but unblocks asserting that llvm's and clang's
datalayout strings are the same.

llvm-svn: 198306
2014-01-02 13:57:18 +00:00
Rafael Espindola 9ec8d08eb1 Small simplification: p0 is the same as p.
llvm-svn: 197700
2013-12-19 16:54:10 +00:00
Matt Arsenault 8ba4882c4b Update SI datalayout for 32-bit private pointers
llvm-svn: 197660
2013-12-19 05:33:14 +00:00
Rafael Espindola dc265edb3b On spacv8 f128 is only aligned to 64 bits.
LLVM already got this right.

Found on "Figure 3-1: Scalar Types" on http://sparc.com/standards/psABI3rd.pdf.

llvm-svn: 197651
2013-12-19 03:03:04 +00:00
Rafael Espindola 1c09b264e3 Fix the DataLayout string produced by clang for NaCl.
Reviewed by Derek Schuff.

llvm-svn: 197628
2013-12-18 23:41:04 +00:00
Rafael Espindola afa854c15e Make setABIAPCS and setABIAAPCS easier to reason about.
These functions now always set the same variables in the same order and they
don't overlap with thep constructor.

llvm-svn: 197604
2013-12-18 20:24:51 +00:00
Rafael Espindola d6c2b720ae Split setABI in two helpers. No functionality change.
llvm-svn: 197603
2013-12-18 19:47:32 +00:00
Rafael Espindola 0ea96eba43 Add -f64:32:64 to the darwin ppc32 DataLayout.
A f64 inside a struct can be 32 bit aligned on darwin.

llvm-svn: 197577
2013-12-18 15:16:50 +00:00
Rafael Espindola 4960968509 Print the 'p' specification before the 'i' specification.
No functionality change.

llvm-svn: 197548
2013-12-18 04:14:53 +00:00
Rafael Espindola c2e60f52ae Add a 's' specifications to AArch64.
This has no functionality change as clang adds explicit alignment info for
byval arguments. The only difference is that now the clang produced
DataLayout string for AArch64 is identical to the LLVM produced one.

llvm-svn: 197538
2013-12-17 23:30:58 +00:00
Rafael Espindola f034b6e4c2 Remove -f128:128 from the DataLayout strings. It is the default.
llvm-svn: 197504
2013-12-17 16:07:35 +00:00
Rafael Espindola 12256302cf The PS3 is a ppc64 and has 64 bit registers. Update DataLayout accordingly.
llvm-svn: 197502
2013-12-17 15:40:00 +00:00
Rafael Espindola 26c67b7879 Remove -f16:16:32 from the XCore DataLayout string.
This makes it identical to the string llvm produces.

llvm-svn: 197500
2013-12-17 14:34:42 +00:00
Rafael Espindola 8ddf8bce91 Reorder these DataLayout entries to match the order LLVM uses.
This completes the cleanup/refactoring of DataLayout on the clang side. Next
is figuring out the differences between the llvm and clang produced strings

llvm-svn: 197442
2013-12-17 00:04:48 +00:00
Rafael Espindola 2da3532aba The preferred alignment defaults to the ABI one. Omit it if it is the same.
llvm-svn: 197440
2013-12-16 23:27:41 +00:00
Rafael Espindola 91b0cbf3fc Remove another default I missed before.
llvm-svn: 197437
2013-12-16 23:03:23 +00:00
Rafael Espindola 04c685b5e4 Clang DataLayout string cleanup: don't print other defaults.
I missed these in previous commits.

llvm-svn: 197435
2013-12-16 22:50:41 +00:00
Rafael Espindola 7f53473de7 Remove dead data.
The f80:128:128 was followed by a f80:32:32 and so never used. Looks like this
was there since r91746.

llvm-svn: 197433
2013-12-16 22:15:35 +00:00
Rafael Espindola 47debc0136 Clang DataLayout string cleanup: don't print the pointer defaults.
llvm-svn: 197430
2013-12-16 21:59:14 +00:00
Rafael Espindola 61a69257a4 Clang DataLayout string cleanup: don't print the aggregate defaults.
llvm-svn: 197429
2013-12-16 21:51:30 +00:00
Rafael Espindola 8a91f2fd85 Clang DataLayout string cleanup: don't print the vector defaults.
llvm-svn: 197427
2013-12-16 21:38:22 +00:00
Rafael Espindola 20b0d92767 Clang DataLayout string cleanup: don't print the FP defaults.
llvm-svn: 197422
2013-12-16 20:34:33 +00:00
Rafael Espindola 32083d503b Clang DataLayout string cleanup: don't print the integer defaults.
llvm-svn: 197421
2013-12-16 20:21:07 +00:00
Rafael Espindola bf34990ed9 Delete dead code.
This is always overwritten by the one in NaClTargetInfo.

llvm-svn: 197346
2013-12-15 17:21:28 +00:00
Rafael Espindola 49806f4dbe Delete dead code.
llvm-svn: 197270
2013-12-13 20:27:54 +00:00
Rafael Espindola f62bcc0d9c Use a: and s: instead of a0: and s0: in the DataLayout strings.
They are equivalent and the size of 'a' and 's' is unused.

llvm-svn: 197256
2013-12-13 18:40:15 +00:00
Tim Northover 8f24b178f3 ARM: teach Sema that "r" can match 64-bit values
We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.

llvm-svn: 196724
2013-12-08 15:24:55 +00:00
Ana Pazos dd6068d400 Added support for mcpu krait
- krait processor currently modeled with the same features as A9.
- Krait processor additionally has VFP4 (fused multiply add/sub)
and hardware division features enabled.
- krait has currently the same Schedule model as A9
- krait cpu flag is not recognized by the GNU assembler yet,
it is replaced with march=armv7-a to avoid a lower march
from being used.

llvm-svn: 196618
2013-12-06 22:43:17 +00:00
Joerg Sonnenberger fbd51bef13 Assume ARMv6 for NetBSD for now for strex/ldrex.
llvm-svn: 196115
2013-12-02 16:12:05 +00:00
Joerg Sonnenberger 7c7fcec329 NetBSD uses long derived size_t / ssize_t in all ARM ABIs.
llvm-svn: 196114
2013-12-02 16:09:34 +00:00
Joerg Sonnenberger 84c7ca8851 NetBSD uses signed wchar_t on ARM platforms.
llvm-svn: 195970
2013-11-30 00:38:16 +00:00
Richard Barton 3b82ed3948 Add support for Cortex-A12.
Patch by Oliver Stannard!

llvm-svn: 195449
2013-11-22 11:53:28 +00:00
Tim Northover 5bb34ca4df ARM: define & use __ARM_NEON on ARM32 (as per ACLE)
There seem to be quite a few references to the old macro __ARM_NEON__ on the
internet, so I don't think it's a good idea to remove it entirely (at least
yet), but the canonical name does not have the trailing underscores so we
should use that ourselves.

llvm-svn: 195353
2013-11-21 12:36:34 +00:00
Jim Grosbach e2bfac497d ARM: embedded v7 'darwin' doesn't get min-version defines.
Make sure armv7 doesn't get the iOS deployment version definitions when
it's being used for non-iOS.

rdar://15497681

llvm-svn: 195149
2013-11-19 20:18:39 +00:00
Jiangning Liu c8b0a1ad95 Clean up predefined macros for AArch64 to follow ACLE 2.0.
llvm-svn: 195068
2013-11-19 01:33:17 +00:00
Tom Stellard 5558304ba2 R600: Add processor type for Hawaii
llvm-svn: 194751
2013-11-14 23:45:53 +00:00
Daniel Sanders 8b59af15ed [mips][msa] Enable inlinse assembly for MSA.
Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
  asm ("ldi.w %w0, 1", "=f"(result));

Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.

MSA registers (including control registers) are supported in clobber lists.

llvm-svn: 194476
2013-11-12 12:56:01 +00:00
Robert Lytton cc4246614f XCore target Type defines.
Change SizeType, PtrDiffType, IntPtrType, WCharType, WIntType
to follow the XMOS llvm-gcc front end's settings.

llvm-svn: 194461
2013-11-12 10:09:30 +00:00
Akira Hatanaka c4baedd71d [mips] Partially revert r193640. Stack alignment should not be determined by
the floating point register mode.

llvm-svn: 194426
2013-11-11 22:10:46 +00:00
Tim Northover e77f78cbad Darwin(ish): we don't want __ARM_EABI__ even on v7a embedded targets.
llvm-svn: 194408
2013-11-11 19:11:22 +00:00
Joerg Sonnenberger 0e921f2bd9 NetBSD 6.99.26 switched to default rounding mode, so adjust
__FLT_EVAL_METHOD__ accordingly. Add test case for this and the SSE2
variances on NetBSD.

llvm-svn: 194377
2013-11-11 14:00:37 +00:00
Benjamin Kramer d9a5e2a490 Driver: Add support for -march=bdver3 on x86.
llvm-svn: 193985
2013-11-04 10:29:51 +00:00
Amara Emerson 703da2ea98 [AArch64] Add some CPU targets for "generic", A-53 and A-57.
Enables the clang driver to begin targeting specific CPUs. Introduced a
"generic" CPU which will ensure that the optional FP feature is enabled
by default when it gets to LLVM, without needing any extra arguments.
Cortex-A53 and A-57 are also introduced with tests, although backend
handling of them does not yet exist.

llvm-svn: 193740
2013-10-31 09:32:33 +00:00
Akira Hatanaka babd67e6ce [mips] Delete unused functions.
llvm-svn: 193674
2013-10-30 02:38:17 +00:00
Akira Hatanaka 618b29813a [mips] Align the stack to 16-bytes for -mfp64.
llvm-svn: 193640
2013-10-29 19:00:35 +00:00
Akira Hatanaka 9064e36551 [mips] Move setDescriptionString to base class MipsTargetInfoBase and call it
at the end of handleTargetFeatures.

No intended functionality change.

llvm-svn: 193636
2013-10-29 18:30:33 +00:00
Tom Stellard 08ded12ffb R600: Add Sea Islands GPUs
llvm-svn: 193622
2013-10-29 16:38:29 +00:00
Bernard Ogden 18b5701a68 ARM: Add -m[no-]crc to dis/enable CRC subtargetfeature from clang
Allow users to disable or enable CRC subtarget feature.

Differential Revision: http://llvm-reviews.chandlerc.com/D2037

llvm-svn: 193600
2013-10-29 09:47:51 +00:00
Bernard Ogden da13af380a Add driver support for FP, SIMD and crypto defaults.
Although we wire up a bit for v8fp for macro setting
purposes, we don't set a macro yet. Need to ask list
about that.

Change-Id: Ic9819593ce00882fbec72757ffccc6f0b18160a0
llvm-svn: 193367
2013-10-24 18:32:51 +00:00
Bernard Ogden 58a05cff97 Clean up char/numeric comparisons in ARM getTargetDefines
Change-Id: Ie07228411b68252adcd5cf80b27ccd2eb3b031d9
llvm-svn: 193366
2013-10-24 18:32:44 +00:00
Bernard Ogden 021d7dacd0 Teach clang driver about Cortex-A53 and Cortex-A57.
Adds some Cortex-A53 strings where they were missing before.
Cortex-A57 is entirely new to clang.

Doesn't touch code only used by Darwin, in consequence of which
one of the A53 lines has been removed.

Change-Id: I5edb58f6eae93947334787e26a8772c736de6483
llvm-svn: 193364
2013-10-24 18:32:36 +00:00
Tim Northover 901dee4d28 ARM-Darwin: Use the *-*-darwin-eabi triple for v6m & v7m archs
These arch arguments are used for embedded targets (obviously) which need a
different calling convention to iOS.

llvm-svn: 193328
2013-10-24 10:48:50 +00:00
Silviu Baranga e5690463e2 Set the default hardware division features for ARM cpus. Also set it as default for A32 armv8.
llvm-svn: 193075
2013-10-21 10:59:33 +00:00
Silviu Baranga f9671dd09d Add the __ARM_ARCH_EXT_IDIV__ predefine. It is set to 1 if we have hardware divide in the mode that we are compiling in (depending on the target features), not defined if we don't. Should be compatible with the GCC conterpart. Also adding a -hwdiv option to overide the default behavior.
llvm-svn: 193074
2013-10-21 10:54:53 +00:00
Simon Atanasyan 2c97a81e81 [Mips] Define __mips_fpr and _MIPS_FPSET macros.
llvm-svn: 192969
2013-10-18 13:13:53 +00:00
Eric Christopher 3ff21b3195 Rename HandleTargetFeatures->handleTargetFeatures to match
everything else in the class.

llvm-svn: 192851
2013-10-16 21:26:26 +00:00
Eric Christopher 2fe3b4a490 Add preprocessor support for powerpc vsx.
The test should be expanded upon for more powerpc checking.

llvm-svn: 192849
2013-10-16 21:19:26 +00:00
Eric Christopher c04fe09c1d Fix comments.
llvm-svn: 192847
2013-10-16 21:19:19 +00:00
Yunzhong Gao 6108936fa6 Enabling 3DNow! prefetch instruction support for a few AMD processors in the
clang front end. This change will allow the __PRFCHW__ macro to be set on these
processors and hence include prfchwintrin.h in x86intrin.h header. Support for
the intrinsic itself seems to have already been added in r178041.

Differential Revision: http://llvm-reviews.chandlerc.com/D1934

llvm-svn: 192829
2013-10-16 19:07:02 +00:00
Nick Lewycky 50e8f480ea Add support for -mcx16, and predefine __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 when
it is enabled. Also enable it on the same architectures that GCC does.

llvm-svn: 192045
2013-10-05 20:14:27 +00:00