Commit Graph

4367 Commits

Author SHA1 Message Date
Daniel Kiss 37ced5a571 [clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines
Summary:
As defined by Arm C Language Extensions (ACLE) these macro defines
should be set to specific values depending on -mbranch-protection.

Reviewers: chill

Reviewed By: chill

Subscribers: danielkiss, cfe-commits, kristof.beyls

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77134
2020-04-02 12:54:21 +02:00
Daniel Kiss 7314aea5a4 [clang] Move branch-protection from CodeGenOptions to LangOptions
Summary:
Reason: the option has an effect on preprocessing.

Also see thread: http://lists.llvm.org/pipermail/cfe-dev/2020-March/065014.html

Reviewers: chill, efriedma

Reviewed By: efriedma

Subscribers: efriedma, danielkiss, cfe-commits, kristof.beyls

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77131
2020-04-02 10:31:52 +02:00
WangTianQing d08fadd662 [X86] Add SERIALIZE instruction.
Summary: For more details about this instruction, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77193
2020-04-02 16:19:23 +08:00
Johannes Doerfert 1858f4b50d Revert "[OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`"
This reverts commit c18d55998b.

Bots have reported uses that need changing, e.g.,
  clang-tools-extra/clang-tidy/openmp/UseDefaultNoneCheck.cp
as reported by
  http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/46591
2020-04-02 02:23:22 -05:00
Johannes Doerfert c18d55998b [OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`
This is a cleanup and normalization patch that also enables reuse with
Flang later on. A follow up will clean up and move the directive ->
clauses mapping.

Differential Revision: https://reviews.llvm.org/D77112
2020-04-02 01:39:07 -05:00
Adrian Prantl f4754ea0ed Remove const qualifier from Modules returned by ExternalASTSource. (NFC)
This API is used by LLDB to attach owning module information to
Declarations deserialized from DWARF.

Differential Revision: https://reviews.llvm.org/D75561
2020-04-01 17:46:02 -07:00
Sid Manning 81194bfeea [Hexagon] MaxAtomicPromoteWidth and MaxAtomicInlineWidth are not getting set.
Noticed when building llvm's c++ library.

Differential Revision: https://reviews.llvm.org/D76546
2020-03-30 12:33:51 -05:00
Yonghong Song ced0d1f42b [BPF] support 128bit int explicitly in layout spec
Currently, bpf does not specify 128bit alignment in its
layout spec. So for a structure like
  struct ipv6_key_t {
    unsigned pid;
    unsigned __int128 saddr;
    unsigned short lport;
  };
clang will generate IR type
  %struct.ipv6_key_t = type { i32, [12 x i8], i128, i16, [14 x i8] }
Additional padding is to ensure later IR->MIR can generate correct
stack layout with target layout spec.

But it is common practice for a tracing program to be
first compiled with target flag (e.g., x86_64 or aarch64) through
clang to generate IR and then go through llc to generate bpf
byte code. Tracing program often refers to kernel internal
data structures which needs to be compiled with non-bpf target.

But such a compilation model may cause a problem on aarch64.
The bcc issue https://github.com/iovisor/bcc/issues/2827
reported such a problem.

For the above structure, since aarch64 has "i128:128" in its
layout string, the generated IR will have
  %struct.ipv6_key_t = type { i32, i128, i16 }

Since bpf does not have "i128:128" in its spec string,
the selectionDAG assumes alignment 8 for i128 and
computes the stack storage size for the above is 32 bytes,
which leads incorrect code later.

The x86_64 does not have this issue as it does not have
"i128:128" in its layout spec as it does permits i128 to
be alignmented at 8 bytes at stack. Its IR type looks like
  %struct.ipv6_key_t = type { i32, [12 x i8], i128, i16, [14 x i8] }

The fix here is add i128 support in layout spec, the same as
aarch64. The only downside is we may have less optimal stack
allocation in certain cases since we require 16byte alignment
for i128 instead of 8. But this is probably fine as i128 is
not used widely and in most cases users should already
have proper alignment.

Differential Revision: https://reviews.llvm.org/D76587
2020-03-28 11:46:29 -07:00
Yaxun (Sam) Liu 369e26ca9e [AMDGPU] Add __builtin_amdgcn_workgroup_size_x/y/z
The main purpose of introducing these builtins is to add a range
metadata [1, 1025) on the work group size loaded from dispatch
ptr, which cannot be done by source code.

Differential Revision: https://reviews.llvm.org/D76772
2020-03-28 01:03:20 -04:00
Johannes Doerfert 095cecbe0d [OpenMP] `omp begin/end declare variant` - part 1, parsing
This is the first part extracted from D71179 and cleaned up.

This patch provides parsing support for `omp begin/end declare variant`,
as defined in OpenMP technical report 8 (TR8) [0].

A major purpose of this patch is to provide proper math.h/cmath support
for OpenMP target offloading. See PR42061, PR42798, PR42799. The current
code was developed with this feature in mind, see [1].

[0] https://www.openmp.org/wp-content/uploads/openmp-TR8.pdf
[1] https://reviews.llvm.org/D61399#change-496lQkg0mhRN

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D74941
2020-03-27 02:30:58 -05:00
David Blaikie 819e540208 Use llvm_unreachable after a fully covered/always-returning switch 2020-03-26 20:09:57 -07:00
Sid Manning b0da094983 [Hexagon] Add support for Linux/Musl ABI (part 2)
A continuation of https://reviews.llvm.org/D72701.  This
adds support needed in clang.

Differential Revision: https://reviews.llvm.org/D75638
2020-03-26 17:19:46 -05:00
Ties Stuij 71ae267d1f [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support
Summary:
This patch introduces command-line support for the Armv8.6-a architecture and assembly support for BFloat16. Details can be found
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

in addition to the GCC patch for the 8..6-a CLI:
https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg02647.html

In detail this patch

- march options for armv8.6-a
- BFloat16 assembly

This is part of a patch series, starting with command-line and Bfloat16
assembly support. The subsequent patches will upstream intrinsics
support for BFloat16, followed by Matrix Multiplication and the
remaining Virtualization features of the armv8.6-a architecture.

Based on work by:
- labrinea
- MarkMurrayARM
- Luke Cheeseman
- Javed Asbar
- Mikhail Maltsev
- Luke Geeson

Reviewers: SjoerdMeijer, craig.topper, rjmccall, jfb, LukeGeeson

Reviewed By: SjoerdMeijer

Subscribers: stuij, kristof.beyls, hiraditya, dexonsmith, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D76062
2020-03-26 09:17:20 +00:00
Michael Liao d264f02c6f Fix `-Wreturn-type` warning. NFC. 2020-03-26 00:53:24 -04:00
zoecarver b915aec6b5 Add method to TargetInfo to get CPU cache line size
Summary:
This patch adds a virtual method `getCPUCacheLineSize()` to `TargetInfo`. Currently, I've only implemented the method in `X86TargetInfo`. It's extremely important that each CPU's cache line size correct (e.g., we can't just define it as `64` across the board) so, it has been a little slow getting to this point.

I'll work on the ARM CPUs next, but that will probably come later in a different patch.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74918
2020-03-25 09:50:38 -07:00
Hans Wennborg c278e8f8f9 Build fix: AttributeCommonInfo::AS_C2x 2020-03-25 15:42:21 +01:00
John Brawn bc3f171090 Don't normalise CXX11/C2X attribute names to start with ::
Currently square-bracket-style (CXX11/C2X) attribute names are normalised to
start with :: if they don't have a namespace. This is a bit odd, as such
names are rejected when parsing, so don't do this.

Differential Revision: https://reviews.llvm.org/D76704
2020-03-25 14:33:44 +00:00
Alexey Bataev 1236eb6c31 [OPENMP50]Add 'default' modifier in reduction clauses.
Added full support for 'default' modifier in the reduction clauses.
2020-03-23 18:18:08 -04:00
Alexey Bataev 63828a35da [OPENMP50]Bassic support for exclusive clause.
Added basic support (parsing/sema/serialization) for exclusive clause in
scan directives.
2020-03-23 13:12:52 -04:00
Alexey Bataev 06dea73307 [OPENMP50]Initial support for inclusive clause.
Added parsing/sema/serialization support for inclusive clause in scan
directive.
2020-03-20 14:20:38 -04:00
Alexey Bataev fcba7c3534 [OPENMP50]Initial support for scan directive.
Addedi basic parsing/sema/serialization support for scan directive.
2020-03-20 07:58:15 -04:00
Sid Manning 430c9a80c1 [Hexagon] Enable linux #defines
Enable standard linux defines when the triple is Linux and the
environment is musl.

Differential Revision: https://reviews.llvm.org/D76310
2020-03-19 14:33:49 -05:00
Alexey Bataev 2f8894a5b8 [OPENMP50]Add support for extended device clause in target directives.
Added parsing/sema/serialization support for extended device clause in
executable target directives.
2020-03-18 15:02:37 -04:00
Sander de Smalen c5b81466c2 Reland D75470 [SVE] Auto-generate builtins and header for svld1.
Reworked the patch to avoid sharing a header (SVETypeFlags.h) between
include/clang/Basic and utils/TableGen/SveEmitter.cpp. Now the patch
generates the enum/flags which is included in TargetBuiltins.h.

Also renamed one of the SveEmitter options to be in line with MVE.

Summary:

This is a first patch in a series for the SveEmitter to generate the arm_sve.h
header file and builtins.

I've tried my best to strip down this patch as best as I could, but there
are still a few changes that are not necessarily exercised by the load intrinsics
in this patch, mostly around the SVEType class which has some common logic to
represent types from a type and prototype string. I thought it didn't make
much sense to remove that from this patch and split it up.
2020-03-18 11:16:28 +00:00
Nick Desaulniers 5d90f886bc [clang][AArch64] readd support for 'p' inline asm constraint
Summary:
Was accidentally removed by commit af64948e2a when it overrode
TargetInfo::convertConstraint.

Fixes: pr/45225

Reviewers: eli.friedman, sdesmalen

Reviewed By: sdesmalen

Subscribers: echristo, sdesmalen, kristof.beyls, cfe-commits, kmclaughlin, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76297
2020-03-17 10:51:25 -07:00
Alexey Bataev 0f0564bb9a [OPENMP50]Initial support for detach clause in task directive.
Added parsing/sema/serialization support for detach clause.
2020-03-17 09:19:03 -04:00
Ayke van Laethem 4add249205
[AVR] Add support for the -mdouble=x flag
This flag is used by avr-gcc (starting with v10) to set the width of the
double type. The double type is by default interpreted as a 32-bit
floating point number in avr-gcc instead of a 64-bit floating point
number as is common on other architectures. Starting with GCC 10, a new
option has been added to control this behavior:
https://gcc.gnu.org/wiki/avr-gcc#Deviations_from_the_Standard

This commit keeps the default double at 32 bits but adds support for the
-mdouble flag (-mdouble=32 and -mdouble=64) to control this behavior.

Differential Revision: https://reviews.llvm.org/D76181
2020-03-17 13:21:03 +01:00
Kerry McLaughlin af64948e2a [SVE][Inline-Asm] Add constraints for SVE ACLE types
Summary:
Adds the constraints described below to ensure that we
can tie variables of SVE ACLE types to operands in inline-asm:
 - y: SVE registers Z0-Z7
 - Upl: One of the low eight SVE predicate registers (P0-P7)
 - Upa: Full range of SVE predicate registers (P0-P15)

Reviewers: sdesmalen, huntergr, rovka, cameron.mcinally, efriedma, rengolin

Reviewed By: efriedma

Subscribers: miyuki, tschuett, rkruppe, psnobl, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75690
2020-03-17 11:04:19 +00:00
Sander de Smalen 6ce537ccfc Revert "[SVE] Auto-generate builtins and header for svld1."
This reverts commit 8b409eabaf.

Reverting this patch for now because it breaks some buildbots.
2020-03-16 15:22:15 +00:00
Sander de Smalen 8b409eabaf [SVE] Auto-generate builtins and header for svld1.
This is a first patch in a series for the SveEmitter to generate the arm_sve.h
header file and builtins.

I've tried my best to strip down this patch as best as I could, but there
are still a few changes that are not necessarily exercised by the load intrinsics
in this patch, mostly around the SVEType class which has some common logic to
represent types from a type and prototype string. I thought it didn't make
much sense to remove that from this patch and split it up.

Reviewers: efriedma, rovka, SjoerdMeijer, rsandifo-arm, rengolin

Reviewed By: SjoerdMeijer

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75470
2020-03-16 10:52:37 +00:00
Reid Kleckner e08464fb45 Avoid including FileManager.h from SourceManager.h
Most clients of SourceManager.h need to do things like turning source
locations into file & line number pairs, but this doesn't require
bringing in FileManager.h and LLVM's FS headers.

The main code change here is to sink SM::createFileID into the cpp file.
I reason that this is not performance critical because it doesn't happen
on the diagnostic path, it happens along the paths of macro expansion
(could be hot) and new includes (less hot).

Saves some includes:
    309 -    /usr/local/google/home/rnk/llvm-project/clang/include/clang/Basic/FileManager.h
    272 -    /usr/local/google/home/rnk/llvm-project/clang/include/clang/Basic/FileSystemOptions.h
    271 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/VirtualFileSystem.h
    267 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/FileSystem.h
    266 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/Chrono.h

Differential Revision: https://reviews.llvm.org/D75406
2020-03-11 13:53:12 -07:00
Reid Kleckner c915cb957d Avoid including Module.h from ExternalASTSource.h
Module.h takes 86ms to parse, mostly parsing the class itself. Avoid it
if possible. ASTContext.h depends on ExternalASTSource.h.

A few NFC changes were needed to make this possible:

- Move ASTSourceDescriptor to Module.h. This needs Module to be
  complete, and seems more related to modules and AST files than
  external AST sources.
- Move "import complete" bit from Module* pointer int pair to
  NextLocalImport pointer. Required because PointerIntPair<Module*,...>
  requires Module to be complete, and now it may not be.

Reviewed By: aaron.ballman, hans

Differential Revision: https://reviews.llvm.org/D75784
2020-03-11 13:37:41 -07:00
Mikhail Maltsev cdeeb548bb [ARM,CDE] Implement CDE feature test macros
Summary:
This patch implements feature test macros for the CDE extension
according to the upcoming ACLE specification.

The following 2 macros are being added:
- __ARM_FEATURE_CDE - defined as '1' when any coprocessor is
  configured as a CDE coprocessor
- __ARM_FEATURE_CDE_COPROC - defined as an 8-bit mask, each bit of the
  mask corresponds to a coprocessor and is set when the corresponding
  coprocessor is configured as CDE (and cleared otherwise).

The patch also exposes the value of __ARM_FEATURE_CDE_COPROC in the
target-independent method TargetInfo::getARMCDECorpocMask, the method
will be used in follow-up patches implementing semantic checks of CDE
intrinsics (we want to diagnose the cases when CDE intrinsics are used
with coprocessors that are not configured as CDE).

Reviewers: simon_tatham, dmgreen, ostannard, MarkMurrayARM

Reviewed By: simon_tatham

Subscribers: kristof.beyls, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75843
2020-03-09 16:14:06 +00:00
Alexey Bataev 82f7c207f5 [OPENMP50]Support 'update' clause for 'depobj' directive.
Added basic support (parsing/sema/serialization) for 'update' clause in
'depobj' directive.
2020-03-03 13:59:32 -05:00
Alexey Bataev 375437ab92 [OPENMP50]Support 'destroy' clause on 'depobj' directives.
Added basic support (parsing/sema/serialization) for 'destroy' clause in
depobj directives.
2020-03-02 14:40:53 -05:00
Alexey Bataev c112e941a0 [OPENMP50]Add basic support for depobj construct.
Added basic parsing/sema/serialization support for depobj directive.
2020-03-02 13:10:32 -05:00
Reid Kleckner bc8836651f Forward declare FileEntry and DirectoryEntry in Module.h
FileManager.h is an expensive header (~350ms for me in isolation), so
try to do without it.

Notably, we need to avoid checking the alignment of FileEntry, which
happens for DenseMap<FileEntry*> and PointerUnion<FileEntry*>. I
adjusted the code to avoid PointerUnion, and moved the DenseMap
insertion to the .cpp file.

Globally, this only saved about ~17 includes of the related headers
because SourceManager.h still includes FileManager.h, and it is more
popular than Module.h.
2020-02-27 10:18:06 -08:00
Reid Kleckner 04da3dfecc Forward declare special case lists
This avoids pulling in unordered_map from TrigramIndex.h:

$ diff -u thedeps-before.txt thedeps-after.txt | \
        grep '^[-+] ' | sort | uniq -c | sort -nr
    976 -    ../llvm/include/llvm/Support/TrigramIndex.h
    976 -    ../llvm/include/llvm/Support/SpecialCaseList.h
    976 -    ../clang/include/clang/Basic/SanitizerSpecialCaseList.h
    502 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/unordered_map
    467 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/xhash
    467 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/xbit_ops.h
    212 -    ../llvm/include/llvm/ADT/StringSet.h
2020-02-27 10:05:30 -08:00
John Brawn 75d4d4bd02 Add an attribute registry so plugins can add attributes
When constructing a ParsedAttr the ParsedAttrInfo gets looked up in the
AttrInfoMap, which is auto-generated using tablegen. If that lookup fails then
we look through the ParsedAttrInfos that plugins have added to the registry and
check if any has a spelling that matches.

Differential Revision: https://reviews.llvm.org/D31338
2020-02-27 17:23:16 +00:00
Xiangling Liao 8bee52bdb5 [AIX][Frontend] C++ ABI customizations for AIX boilerplate
This PR enables "XL" C++ ABI in frontend AST to IR codegen. And it is driven by
static init work. The current kind in Clang by default is Generic Itanium, which
has different behavior on static init with IBM xlclang compiler on AIX.

Differential Revision: https://reviews.llvm.org/D74015
2020-02-24 10:26:51 -05:00
Roland McGrath 271f964773 [Preprocessor][X86] Fix __code_model_*__ predefine macros
GCC defines __code_model_*__ (two trailing underscores), not
__code_model_*_ (one trailing underscore).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D75003
2020-02-21 23:30:07 -08:00
Roland McGrath d2e949eed5 [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does
Make Clang on aarch64 targets predefine `__AARCH64_CMODEL_SMALL__`
or `__AARCH64_CMODEL_TINY__`, etc.  These are the names that GCC
uses for its predefines.

Reviewed By: tamur, MaskRay

Differential Revision: https://reviews.llvm.org/D75002
2020-02-21 23:27:36 -08:00
Sid Manning d37cbda5f9 [Hexagon] Define __ELF__ by default.
Differential Revision: https://reviews.llvm.org/D74972
2020-02-21 16:10:31 -06:00
Yaxun (Sam) Liu ed07c89fc5 Add cl_khr_mipmap_image_writes as supported to AMDGPU
Differential Revision: https://reviews.llvm.org/D74807
2020-02-19 17:40:40 -05:00
Krzysztof Parzyszek b1d47467e2 [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1
This commit removes the artificial types <512 x i1> and <1024 x i1>
from HVX intrinsics, and makes v512i1 and v1024i1 no longer legal on
Hexagon.

It may cause existing bitcode files to become invalid.

* Converting between vector predicates and vector registers must be
  done explicitly via vandvrt/vandqrt instructions (their intrinsics),
  i.e. (for 64-byte mode):
    %Q = call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %V, i32 -1)
    %V = call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %Q, i32 -1)

  The conversion intrinsics are:
    declare  <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32>, i32)
    declare <128 x i1> @llvm.hexagon.V6.vandvrt.128B(<32 x i32>, i32)
    declare <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1>, i32)
    declare <32 x i32> @llvm.hexagon.V6.vandqrt.128B(<128 x i1>, i32)
  They are all pure.

* Vector predicate values cannot be loaded/stored directly. This directly
  reflects the architecture restriction. Loading and storing or vector
  predicates must be done indirectly via vector registers and explicit
  conversions via vandvrt/vandqrt instructions.
2020-02-19 14:14:56 -06:00
Jim Lin 466f8843f5 [NFC] Remove trailing space
sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h,td}
2020-02-18 10:49:13 +08:00
Atmn Patel 577c9b02ab [OpenMP][NFCI] Use the libFrontend DefaultKind in Clang
This swaps out the OpenMPDefaultClauseKind enum with a
llvm::omp::DefaultKind enum which is stored in OMPConstants.h.

This should not change any functionality.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D74513
2020-02-15 00:38:12 -06:00
Johannes Doerfert 1228d42dda [OpenMP][Part 2] Use reusable OpenMP context/traits handling
This patch implements an almost complete handling of OpenMP
contexts/traits such that we can reuse most of the logic in Flang
through the OMPContext.{h,cpp} in llvm/Frontend/OpenMP.

All but construct SIMD specifiers, e.g., inbranch, and the device ISA
selector are define in `llvm/lib/Frontend/OpenMP/OMPKinds.def`. From
these definitions we generate the enum classes `TraitSet`,
`TraitSelector`, and `TraitProperty` as well as conversion and helper
functions in `llvm/lib/Frontend/OpenMP/OMPContext.{h,cpp}`.

The above enum classes are used in the parser, sema, and the AST
attribute. The latter is not a collection of multiple primitive variant
arguments that contain encodings via numbers and strings but instead a
tree that mirrors the `match` clause (see `struct OpenMPTraitInfo`).

The changes to the parser make it more forgiving when wrong syntax is
read and they also resulted in more specialized diagnostics. The tests
are updated and the core issues are detected as before. Here and
elsewhere this patch tries to be generic, thus we do not distinguish
what selector set, selector, or property is parsed except if they do
behave exceptionally, as for example `user={condition(EXPR)}` does.

The sema logic changed in two ways: First, the OMPDeclareVariantAttr
representation changed, as mentioned above, and the sema was adjusted to
work with the new `OpenMPTraitInfo`. Second, the matching and scoring
logic moved into `OMPContext.{h,cpp}`. It is implemented on a flat
representation of the `match` clause that is not tied to clang.
`OpenMPTraitInfo` provides a method to generate this flat structure (see
`struct VariantMatchInfo`) by computing integer score values and boolean
user conditions from the `clang::Expr` we keep for them.

The OpenMP context is now an explicit object (see `struct OMPContext`).
This is in anticipation of construct traits that need to be tracked. The
OpenMP context, as well as the `VariantMatchInfo`, are basically made up
of a set of active or respectively required traits, e.g., 'host', and an
ordered container of constructs which allows duplication. Matching and
scoring is kept as generic as possible to allow easy extension in the
future.

---

Test changes:

The messages checked in `OpenMP/declare_variant_messages.{c,cpp}` have
been auto generated to match the new warnings and notes of the parser.
The "subset" checks were reversed causing the wrong version to be
picked. The tests have been adjusted to correct this.
We do not print scores if the user did not provide one.
We print spaces to make lists in the `match` clause more legible.

Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim

Subscribers: merge_guards_bot, rampitec, mgorny, hiraditya, aheejin, fedor.sergeev, simoncook, bollu, guansong, dexonsmith, jfb, s.egerton, llvm-commits, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71830
2020-02-14 16:37:42 -06:00
Alexey Bataev 2fb6268854 [OPENMP50]Add support for hint clause in atomic directive.
According to OpenMP 5.0, hint clause is alowed to be used in atomic
directives.
2020-02-13 13:28:43 -05:00
Alexey Bataev 9a8defcc34 [OPENMP50]Add support for relaxed clause in atomic directive.
Added full support for relaxed clause.
2020-02-11 11:54:46 -05:00
Alexey Bataev 9559834a5c [OPENMP50]Add support for 'release' clause.
Added full support for 'release' clause in flush|atomic directives.
2020-02-10 16:01:41 -05:00
Alexey Bataev 04a830f80a [OPENMP50]Support for acquire clause.
Added full support for acquire clause in flush|atomic directives.
2020-02-10 14:51:46 -05:00
serge_sans_paille e67cbac812 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with proper LiveIn
declaration, better option handling and more portable testing.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-09 10:42:45 +01:00
serge-sans-paille 4546211600 Revert "Support -fstack-clash-protection for x86"
This reverts commit 0fd51a4554.

Failures:

http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/4354
2020-02-09 10:06:31 +01:00
serge_sans_paille 0fd51a4554 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with proper LiveIn
declaration, better option handling and more portable testing.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-09 09:35:42 +01:00
serge-sans-paille 658495e6ec Revert "Support -fstack-clash-protection for x86"
This reverts commit e229017732.

Failures:

http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-debian/builds/2604
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/4308
2020-02-08 14:26:22 +01:00
serge_sans_paille e229017732 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with better option
handling and more portable testing

Differential Revision: https://reviews.llvm.org/D68720
2020-02-08 13:31:52 +01:00
Nico Weber b03c3d8c62 Revert "Support -fstack-clash-protection for x86"
This reverts commit 4a1a0690ad.
Breaks tests on mac and win, see https://reviews.llvm.org/D68720
2020-02-07 14:49:38 -05:00
serge_sans_paille 4a1a0690ad Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with correct option
flags set.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-07 19:54:39 +01:00
Alexey Bataev ea9166b5a8 [OPENMP50]Add parsing/sema for acq_rel clause.
Added basic support (representation + parsing/sema/(de)serialization)
for acq_rel clause in flush/atomic directives.
2020-02-07 09:21:10 -05:00
serge-sans-paille f6d98429fc Revert "Support -fstack-clash-protection for x86"
This reverts commit 39f50da2a3.

The -fstack-clash-protection is being passed to the linker too, which
is not intended.

Reverting and fixing that in a later commit.
2020-02-07 11:36:53 +01:00
serge_sans_paille 39f50da2a3 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

Differential Revision: https://reviews.llvm.org/D68720
2020-02-07 10:56:15 +01:00
Momchil Velikov 3627c91ead [ARM][TargetParser] Improve handling of dependencies between target features
The patch at https://reviews.llvm.org/D64048 added "negative"
dependency handling in `ARM::appendArchExtFeatures`: feature "noX"
removes all features, which imply "X".

This patch adds the "positive" handling: feature "X" adds all the
feature strings implied by "X".

(This patch also comes from the suggestion here
https://reviews.llvm.org/D72633#inline-658582)

Differential Revision: https://reviews.llvm.org/D72762
2020-02-05 16:07:51 +00:00
Thomas Lively 8c3e6af71b [WebAssembly] Add experimental multivalue calling ABI
Summary:
For now, this ABI simply expands all possible aggregate arguments and
returns all possible aggregates directly. This ABI will change rapidly
as we prototype and benchmark a new ABI that takes advantage of
multivalue return and possibly other changes from the MVP ABI.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72972
2020-02-04 21:09:49 -08:00
Matt Arsenault a3c814d234 Separately track input and output denormal mode
AMDGPU and x86 at least both have separate controls for whether
denormal results are flushed on output, and for whether denormals are
implicitly treated as 0 as an input. The current DAGCombiner use only
really cares about the input treatment of denormals.
2020-02-04 12:59:21 -05:00
Jonas Paulsson 563e84790f [SystemZ] Support -msoft-float
This is needed when building the Linux kernel.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D72189
2020-02-04 10:32:45 -05:00
Mikhail Maltsev 7128aace60 [ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI
Summary:
This patch changes the underlying type of the ARM::ArchExtKind
enumeration to uint64_t and adjusts the related code.

The goal of the patch is to prepare the code base for a new
architecture extension.

Reviewers: simon_tatham, eli.friedman, ostannard, dmgreen

Reviewed By: dmgreen

Subscribers: merge_guards_bot, kristof.beyls, hiraditya, cfe-commits, llvm-commits, pbarrio

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73906
2020-02-04 11:24:18 +00:00
Alexey Bataev cb8e69148d [OPENMP50]Basic parsing/sema analysis for order(concurrent) clause.
Added parsing/sema/serialization support for order(concurrent) clause in
loop|simd-based directives.
2020-02-03 10:31:02 -05:00
Benjamin Kramer bb39b52950 Fix conversions in clang and examples 2020-01-29 02:48:15 +01:00
Benjamin Kramer 2b36e85542 GCC5 buildbot made it to clang. Fix implicit conversions it found. 2020-01-29 02:19:49 +01:00
Benjamin Kramer adcd026838 Make llvm::StringRef to std::string conversions explicit.
This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly mechanical from a custom clang-tidy check, with a lot of
manual fixups. It uncovers a lot of minor inefficiencies.

This doesn't actually modify StringRef yet, I'll do that in a follow-up.
2020-01-28 23:25:25 +01:00
Artem Belevich 12fefeef20 [CUDA] Assume the latest known CUDA version if we've found an unknown one.
This makes clang somewhat forward-compatible with new CUDA releases
without having to patch it for every minor release without adding
any new function.

If an unknown version is found, clang issues a warning (can be disabled
with -Wno-cuda-unknown-version) and assumes that it has detected
the latest known version. CUDA releases are usually supersets
of older ones feature-wise, so it should be sufficient to keep
released clang versions working with minor CUDA updates without
having to upgrade clang, too.

Differential Revision: https://reviews.llvm.org/D73231
2020-01-28 10:11:42 -08:00
Konstantin Pyzhov 6d614a82a4 Summary:
This CL adds clang declarations of built-in functions for AMDGPU MFMA intrinsics and instructions.
OpenCL tests for new built-ins are included.

Differential Revision: https://reviews.llvm.org/D72723
2020-01-28 03:51:27 -05:00
Diogo Sampaio bce360b704 Detect source location overflow due includes
Summary:
As discussed in http://lists.llvm.org/pipermail/cfe-dev/2019-October/063459.html
the overflow of the souce locations (limited to 2^31 chars) can generate all sorts of
weird things (bogus warnings, hangs, crashes, miscompilation and correct compilation).
In debug mode this assert would fail. So it might be a good start, as in PR42301,
to detect the failure and exit with a proper error message.

Reviewers: rsmith, thakis, miyuki

Reviewed By: miyuki

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70183
2020-01-24 23:56:47 +00:00
Duncan P. N. Exon Smith 1e487e4c16 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c
Since 2009 (in r63846) we've been `#define`-ing OBJC_NEW_PROPERTIES all
the time on Darwin, but this macro only makes sense for `-x objective-c`
and `-x objective-c++`.  Restrict it to those cases (for which there is
already separate logic).

https://reviews.llvm.org/D72970
rdar://problem/10050342
2020-01-24 14:55:12 -08:00
Heejin Ahn 65eb11306e [WebAssembly] Update bleeding-edge CPU features
Summary:
This adds bulk memory and tail call to "bleeding-edge" CPU, since their
implementation in LLVM/clang seems mostly complete.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73322
2020-01-24 14:27:35 -08:00
Heejin Ahn 764f4089e8 [WebAssembly] Add reference types target feature
Summary:
This adds the reference types target feature. This does not enable any
more functionality in LLVM/clang for now, but this is necessary to embed
the info in the target features section, which is used by Binaryen and
Emscripten. It turned out that after D69832 `-fwasm-exceptions` crashed
because we didn't have the reference types target feature.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73320
2020-01-24 14:26:27 -08:00
Yuta Saito c5bd3d0726 Support Swift calling convention for WebAssembly targets
This adds basic support for the Swift calling convention with WebAssembly
targets.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D71823
2020-01-24 10:30:46 -08:00
Saar Raz 67c608a969 [Concepts] Deprecate -fconcepts-ts, enable Concepts under -std=c++2a
Now with concepts support merged and mostly complete, we do not need -fconcepts-ts
(which was also misleading as we were not implementing the TS) and can enable
concepts features under C++2a. A warning will be generated if users still attempt
to use -fconcepts-ts.
2020-01-24 00:48:59 +02:00
Krzysztof Parzyszek 305bf5b21d [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
Krzysztof Parzyszek c12a5917d2 [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
Matt Arsenault a4451d88ee Consolidate internal denormal flushing controls
Currently there are 4 different mechanisms for controlling denormal
flushing behavior, and about as many equivalent frontend controls.

- AMDGPU uses the fp32-denormals and fp64-f16-denormals subtarget features
- NVPTX uses the nvptx-f32ftz attribute
- ARM directly uses the denormal-fp-math attribute
- Other targets indirectly use denormal-fp-math in one DAGCombine
- cl-denorms-are-zero has a corresponding denorms-are-zero attribute

AMDGPU wants a distinct control for f32 flushing from f16/f64, and as
far as I can tell the same is true for NVPTX (based on the attribute
name).

Work on consolidating these into the denormal-fp-math attribute, and a
new type specific denormal-fp-math-f32 variant. Only ARM seems to
support the two different flush modes, so this is overkill for the
other use cases. Ideally we would error on the unsupported
positive-zero mode on other targets from somewhere.

Move the logic for selecting the flush mode into the compiler driver,
instead of handling it in cc1. denormal-fp-math/denormal-fp-math-f32
are now both cc1 flags, but denormal-fp-math-f32 is not yet exposed as
a user flag.

-cl-denorms-are-zero, -fcuda-flush-denormals-to-zero and
-fno-cuda-flush-denormals-to-zero will be mapped to
-fp-denormal-math-f32=ieee or preserve-sign rather than the old
attributes.

Stop emitting the denorms-are-zero attribute for the OpenCL flag. It
has no in-tree users. The meaning would also be target dependent, such
as the AMDGPU choice to treat this as only meaning allow flushing of
f32 and not f16 or f64. The naming is also potentially confusing,
since DAZ in other contexts refers to instructions implicitly treating
input denormals as zero, not necessarily flushing output denormals to
zero.

This also does not attempt to change the behavior for the current
attribute. The LangRef now states that the default is ieee behavior,
but this is inaccurate for the current implementation. The clang
handling is slightly hacky to avoid touching the existing
denormal-fp-math uses. Fixing this will be left for a future patch.

AMDGPU is still using the subtarget feature to control the denormal
mode, but the new attribute are now emitted. A future change will
switch this and remove the subtarget features.
2020-01-17 20:09:53 -05:00
Ian Levesque 97ba483026 [xray] Allow instrumenting only function entry and/or only function exit
Extend -fxray-instrumentation-bundle to split function-entry and
function-exit into two separate options, so that it is possible to
instrument only function entry or only function exit.  For use cases
that only care about one or the other this will save significant overhead
and code size.

Differential Revision: https://reviews.llvm.org/D72890
2020-01-17 13:32:34 -08:00
Nico Weber fb5fafb23c Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.
When LLVM_APPEND_VC_REV=OFF is set, the current git hash is no
longer embedded into binaries (mostly for --version output).
Without it, most binaries need to relink after every single
commit, even if they didn't change otherwise (due to, say,
a documentation-only commit).

LLVM_APPEND_VC_REV is ON by default, so this doesn't change the
default behavior of anything.

With this, all clients of GenerateVersionFromVCS.cmake honor
LLVM_APPEND_VC_REV.

Differential Revision: https://reviews.llvm.org/D72855
2020-01-16 19:04:08 -05:00
Krzysztof Parzyszek 6f3effbbf0 [Hexagon] Update autogenerated intrinsic info in clang
In addition to that, use target features to validate intrinsic
availability on a given target.
2020-01-16 14:20:12 -06:00
Nico Weber fb9413cb84 Remove some SVN-specific code.
$URL$ is an SVN keyword substitution enabled via
`svn propset svn:keywords "URL" tools/clang/lib/Basic/Version.cpp`.
Now that we no longer use SVN, it's no longer being replaced by
anything, and we no longer offer svn exports. So remove the
$URL$-specific logic.

The "cfe" path prefix removal also no longer makes sense now that
we're on git: Both CLANG_REPOSITORY and LLVM_REPOSITORY are usually
set to https://github.com/llvm/llvm-project.git

So remove that too, and remove the "llvm" prefix removal for symmetry.
With the github url, "llvm" _is_ found in the string, but not in
the place the function expected. Nobody noticed since the llvm
repository path is only used if CLANG_REVISION and LLVM_REVISION are
different, which in the git monorepo world they never should be.
(I might remove the "// Support LLVM in a separate repository"
block in a separate commit.)

Differential Revision: https://reviews.llvm.org/D72848
2020-01-16 11:02:52 -05:00
Scott Egerton cbe681bd83 Revert "[RISCV] Add Clang frontend support for Bitmanip extension"
This reverts commit 57cf6ee9c8.
2020-01-15 10:43:42 +00:00
Scott Egerton 57cf6ee9c8 [RISCV] Add Clang frontend support for Bitmanip extension
Summary: This adds the __riscv_bitmanip macro and the 'b' target feature to enable it.

Reviewers: asb, simoncook, lewis-revill, PaoloS, lenary

Reviewed By: lenary

Subscribers: Jim, rbar, johnrusso, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, pzheng, sameer.abuasal, apazos, luismarques, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71553
2020-01-14 17:45:45 +00:00
Fangrui Song ba91dffafe [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
Follow-up of D72014. It is more appropriate to use a target
feature instead of a SubTypeArch to express the difference.

Reviewed By: #powerpc, jhibbits

Differential Revision: https://reviews.llvm.org/D72433
2020-01-10 11:43:17 -08:00
Jan Korous f28972facc [clang] Fix out-of-bounds memory access in ComputeLineNumbers
Differential Revision: https://reviews.llvm.org/D72409
2020-01-10 11:22:41 -08:00
Justin Hibbits ff0311c4b3 [PowerPC]: Add powerpcspe target triple subarch component
Summary:
This allows the use of '-target powerpcspe-unknown-linux-gnu' or
'powerpcspe-unknown-freebsd' to be used, instead of
'-target powerpc-unknown-linux-gnu -mspe'.

Reviewed By: dim
Differential Revision: https://reviews.llvm.org/D72014
2020-01-08 19:10:53 -06:00
Fangrui Song 8edf759ca7 [PowerPC][Triple] Use elfv2 on freebsd>=13 and linux-musl
Summary:
Every powerpc64le platform uses elfv2.

For powerpc64, the environments "elfv1" and "elfv2" were added for
FreeBSD ELFv1->ELFv2 migration in D61950.  FreeBSD developers have
decided to use OS versions to select ABI, and no one is relying on the
environments.

Also use elfv2 on powerpc64-linux-musl.

Users can always use -mabi=elfv1 and -mabi=elfv2 to override the default
ABI.

Reviewed By: adalava

Differential Revision: https://reviews.llvm.org/D72352
2020-01-07 11:40:56 -08:00
Johannes Doerfert 6c5d1f40ff [OpenMP][NFCI] Use the libFrontend ProcBindKind in Clang
This removes the OpenMPProcBindClauseKind enum in favor of
llvm::omp::ProcBindKind which lives in OpenMPConstants.h and was
introduced in D70109.

No change in behavior is expected.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D70289
2019-12-26 11:04:07 -06:00
Alexey Bataev 93dc40dddd [OPENMP50]Basic support for conditional lastprivate.
Added parsing/sema checks for conditional lastprivates.
2019-12-24 12:22:05 -05:00
Craig Topper d35bcbbb5d [Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.
The validateOutputSize and validateInputSize need to check whether
AVX or AVX512 are enabled. But this can be affected by the
target attribute so we need to factor that in.

This patch moves some of the code from CodeGen to create an
appropriate feature map that we can pass to the function.

Differential Revision: https://reviews.llvm.org/D68627
2019-12-23 11:23:30 -08:00
Yaxun (Sam) Liu eca40066eb [NFC] Move OptionUtils from Basic to Driver
Differential Revision: https://reviews.llvm.org/D71802
2019-12-23 08:11:23 -05:00
Yonghong Song e3d8ee35e4 reland "[DebugInfo] Support to emit debugInfo for extern variables"
Commit d77ae1552f
("[DebugInfo] Support to emit debugInfo for extern variables")
added deebugInfo for extern variables for BPF target.
The commit is reverted by 891e25b02d
as the committed tests using %clang instead of %clang_cc1 causing
test failed in certain scenarios as reported by Reid Kleckner.

This patch fixed the tests by using %clang_cc1.

Differential Revision: https://reviews.llvm.org/D71818
2019-12-22 18:28:50 -08:00
Reid Kleckner 891e25b02d Revert "[DebugInfo] Support to emit debugInfo for extern variables"
This reverts commit d77ae1552f.

The tests committed along with this change do not pass, and should be
changed to use %clang_cc1.
2019-12-22 12:54:06 -08:00
Yaxun (Sam) Liu 7376d9eb38 [NFC] Separate getLastArgIntValue to Basic
getLastArgIntValue is a useful utility function to get command line argument as an integer.
Currently it is in Frontend so that it can only be used by clang -cc1. Move it to basic so
that it can also be used by clang driver.

Differential Revision: https://reviews.llvm.org/D71080
2019-12-21 20:39:31 -05:00
Karl-Johan Karlsson e8efac4b15 [clang] Fix the canonicalization of paths in -fdiagnostics-absolute-paths
In the current implementation of clang the canonicalization of paths in
diagnostic messages (when using -fdiagnostics-absolute-paths) only works
if the symbolic link is in the directory part of the filename, not if
the file itself is a symbolic link to another file.

This patch adds support to canonicalize the complete path including the
file.

Reviewers: rsmith, hans, rnk, ikudrin

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D70527
2019-12-20 09:16:33 +01:00
Amy Huang a85f5efd95 Add support for the MS qualifiers __ptr32, __ptr64, __sptr, __uptr.
Summary:
This adds parsing of the qualifiers __ptr32, __ptr64, __sptr, and __uptr and
lowers them to the corresponding address space pointer for 32-bit and 64-bit pointers.
(32/64-bit pointers added in https://reviews.llvm.org/D69639)

A large part of this patch is making these pointers ignore the address space
when doing things like overloading and casting.

https://bugs.llvm.org/show_bug.cgi?id=42359

Reviewers: rnk, rsmith

Subscribers: jholewinski, jvesely, nhaehnle, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71039
2019-12-18 10:41:12 -08:00
Alexey Bataev b6e7084e25 [OPENMP50]Add parsing/sema analysis for nontemporal clause.
Add basic support for parsing/sema analysis of the nontemporal clause in
simd-based directives.
2019-12-17 14:46:32 -05:00
Anastasia Stulova ed8dadb37c [Sema] Improve diagnostic about addr spaces for overload candidates
Allow sending address spaces into diagnostics to simplify and improve
error reporting. Improved wording of diagnostics for address spaces
in overloading.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71111
2019-12-13 12:35:18 +00:00
Warren Ristow bcae3a77af [PS4] Predefine the __SCE__ macro for the x86_64-scei-ps4 triple 2019-12-12 11:00:09 -08:00
Alexey Bataev 7b774b7cd4 [OPENMP50]Add if clause in teams distribute simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-12-11 12:30:18 -05:00
Yonghong Song d77ae1552f [DebugInfo] Support to emit debugInfo for extern variables
Extern variable usage in BPF is different from traditional
pure user space application. Recent discussion in linux bpf
mailing list has two use cases where debug info types are
required to use extern variables:
  - extern types are required to have a suitable interface
    in libbpf (bpf loader) to provide kernel config parameters
    to bpf programs.
    https://lore.kernel.org/bpf/CAEf4BzYCNo5GeVGMhp3fhysQ=_axAf=23PtwaZs-yAyafmXC9g@mail.gmail.com/T/#t
  - extern types are required so kernel bpf verifier can
    verify program which uses external functions more precisely.
    This will make later link with actual external function no
    need to reverify.
    https://lore.kernel.org/bpf/87eez4odqp.fsf@toke.dk/T/#m8d5c3e87ffe7f2764e02d722cb0d8cbc136880ed

This patch added clang support to emit debuginfo for extern variables
with a TargetInfo hook to enable it. The debuginfo for the
extern variable is emitted only if that extern variable is
referenced in the current compilation unit.

Currently, only BPF target enables to generate debug info for
extern variables. The emission of such debuginfo is disabled for C++
 at this moment since BPF only supports a subset of C language.
Emission with C++ can be enabled later if an appropriate use case
is identified.

-fstandalone-debug permits us to see more debuginfo with the cost
of bloated binary size. This patch did not add emission of extern
variable debug info with -fstandalone-debug. This can be
re-evaluated if there is a real need.

Differential Revision: https://reviews.llvm.org/D70696
2019-12-10 08:09:51 -08:00
Johannes Doerfert eb3e81f43f [OpenMP][NFCI] Introduce llvm/IR/OpenMPConstants.h
Summary:
The new OpenMPConstants.h is a location for all OpenMP related constants
(and helpers) to live.

This patch moves the directives there (the enum OpenMPDirectiveKind) and
rewires Clang to use the new location.

Initially part of D69785.

Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim

Subscribers: jholewinski, ppenzin, penzn, llvm-commits, cfe-commits, jfb, guansong, bollu, hiraditya, mgorny

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69853
2019-12-10 00:10:09 -06:00
Reid Kleckner eff08f4097 Revert "[Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize."
This reverts commit e1578fd2b7.

It introduces a dependency on Attr.h which I am removing from
ASTContext.h.
2019-12-06 15:42:14 -08:00
Craig Topper e1578fd2b7 [Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.
The validateOutputSize and validateInputSize need to check whether
AVX or AVX512 are enabled. But this can be affected by the
target attribute so we need to factor that in.

This patch copies some of the code from CodeGen to create an
appropriate feature map that we can pass to the function. Probably
need some refactoring here to share more code with Codegen. Is
there a good place to do that? Also need to support the cpu_specific
attribute as well.

Differential Revision: https://reviews.llvm.org/D68627
2019-12-06 15:30:59 -08:00
Alexey Bataev 779a180d96 [OPENMP50]Add if clause in distribute simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-12-06 14:49:49 -05:00
cchen 47d6094d7f [OpenMP50] Add parallel master construct
Reviewers: ABataev, jdoerfert

Reviewed By: ABataev

Subscribers: rnk, jholewinski, guansong, arphaman, jfb, cfe-commits, sandoval, dreachem

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70726
2019-12-05 14:35:27 -05:00
Reid Kleckner 33f6d465d7 Revert "[OpenMP50] Add parallel master construct, by Chi Chun Chen."
This reverts commit 713dab21e2.

Tests do not pass on Windows.
2019-12-04 14:50:06 -08:00
Soumi Manna 9c29aed698 Bug 43965 - Value of _MSVC_LANG doesn't match MSVC++ VS2019 /std:c++latest mode
Summary:
The patch adds correct value of _MSVC_LANG to match with MSVC++ VS2019 /std:c++latest mode.

    Bugzilla - Bug 43965
    https://bugs.llvm.org/show_bug.cgi?id=43965

    The value for a MS specific macro differs from Microsoft starting with VS2019 in /std:c++latest mode.

    -bash-4.2$ cat msvclang.cpp
    _MSVC_LANG

    -bash-4.2$ cl /std:c++latest -E msvclang.cpp
    Microsoft (R) C/C++ Optimizing Compiler Version 19.20.27508.1 for x64
    Copyright (C) Microsoft Corporation.  All rights reserved.

    /std:c++latest is provided as a preview of language features from the latest C++
    working draft, and we're eager to hear about bugs and suggestions for improvements.
    However, note that these features are provided as-is without support, and subject
    to changes or removal as the working draft evolves. See
    https://go.microsoft.com/fwlink/?linkid=2045807 for details.

    msvclang.cpp

    201705L

    -bash-4.2$ clang-cl /std:c++latest -E  msvclang.cpp
    201704L

Reviewers: rnk

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D70996
2019-12-04 14:39:41 -08:00
cchen 713dab21e2 [OpenMP50] Add parallel master construct, by Chi Chun Chen.
Reviewers: ABataev, jdoerfert

Reviewed By: ABataev

Subscribers: jholewinski, guansong, arphaman, jfb, cfe-commits, sandoval, dreachem

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70726
2019-12-04 14:53:17 -05:00
Petr Hosek 9c3f9b9c12 [Clang] Define Fuchsia C++ABI
Currently, it is a modified version of the Itanium ABI, with the only
change being that constructors and destructors return 'this'.

Differential Revision: https://reviews.llvm.org/D70575
2019-12-03 18:35:57 -08:00
Victor Campos dcf11c5e86 [ARM][AArch64] Complex addition Neon intrinsics for Armv8.3-A
Summary:
Add support for vcadd_* family of intrinsics. This set of intrinsics is
available in Armv8.3-A.

The fp16 versions require the FP16 extension, which has been available
(opt-in) since Armv8.2-A.

Reviewers: t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D70862
2019-12-02 14:38:39 +00:00
Carey Williams 76fd58d0fe Revert "[ARM] Allocatable Global Register Variables for ARM"
This reverts commit 2d739f98d8.
2019-11-29 17:01:05 +00:00
Simon Atanasyan f4d32ae75b [mips] Check that features required by built-ins are enabled
Now Clang does not check that features required by built-in functions
are enabled. That causes errors in the backend reported in PR44018.

This patch fixes this bug by checking that required features
are enabled.

This should fix PR44018.

Differential Revision: https://reviews.llvm.org/D70808
2019-11-29 00:23:00 +03:00
Petr Hosek 68a3a3b281 [Clang] Enable RISC-V support for Fuchsia
We don't have a full sysroot yet, so for now we only include compiler
support and compiler-rt builtins, the rest of the runtimes will get
enabled later.

Differential Revision: https://reviews.llvm.org/D70477
2019-11-21 16:02:26 -08:00
Stefan Pintilie 5fcf89f778 [PowerPC] Add new Future CPU for PowerPC
This patch will add -mcpu=future into clang for PowerPC.

A CPU type is required for work that may possibly be enabled for some future
Power CPU. The CPU type future will serve that purpose. This patch introduces
no new functionality. It is an incremental patch on top of which Power PC work
for some future CPU can be done.

Differential Revision: https://reviews.llvm.org/D70262
2019-11-21 13:35:48 -06:00
Alexey Bataev 103f3c9e3b [OPENMP50]Add if clause in for simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-11-21 09:29:12 -05:00
Ilya Biryukov aa981c1802 Reland 9f3fdb0d7fab: [Driver] Use VFS to check if sanitizer blacklists exist
With updates to various LLVM tools that use SpecialCastList.

It was tempting to use RealFileSystem as the default, but that makes it
too easy to accidentally forget passing VFS in clang code.
2019-11-21 11:56:09 +01:00
Ilya Biryukov 9f3fdb0d7f Revert "[Driver] Use VFS to check if sanitizer blacklists exist"
This reverts commit ba6f906854.
Commit caused compilation errors on llvm tests. Will fix and re-land.
2019-11-21 11:31:14 +01:00
Ilya Biryukov ba6f906854 [Driver] Use VFS to check if sanitizer blacklists exist
Summary:
This is a follow-up to 590f279c45, which
moved some of the callers to use VFS.

It turned out more code in Driver calls into real filesystem APIs and
also needs an update.

Reviewers: gribozavr2, kadircet

Reviewed By: kadircet

Subscribers: ormris, mgorny, hiraditya, llvm-commits, jkorous, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D70440
2019-11-21 11:00:30 +01:00
Alexey Bataev d08c056695 [OPENMP50]Add if clause in simd directive.
According to OpenMP 5.0, if clause can be used in simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-11-19 15:58:19 -05:00
Anna Welker 2d739f98d8 [ARM] Allocatable Global Register Variables for ARM
Provides support for using r6-r11 as globally scoped
      register variables. This requires a -ffixed-rN flag
      in order to reserve rN against general allocation.

      If for a given GRV declaration the corresponding flag
      is not found, or the the register in question is the
      target's FP, we fail with a diagnostic.

      Differential Revision: https://reviews.llvm.org/D68862
2019-11-18 10:07:37 +00:00
Momchil Velikov aa6d48fa70 Implement target(branch-protection) attribute for AArch64
This patch implements `__attribute__((target("branch-protection=...")))`
in a manner, compatible with the analogous GCC feature:

https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gcc/AArch64-Function-Attributes.html#AArch64-Function-Attributes

Differential Revision: https://reviews.llvm.org/D68711
2019-11-15 15:40:46 +00:00
Justin Hibbits bc4bc5aa0d Add 8548 CPU definition and attributes
8548 CPU is GCC's name for the e500v2, so accept this in clang.  The
e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well,
as GCC does.

Differential Revision:  https://reviews.llvm.org/D67787
2019-11-12 20:34:34 -06:00
Tim Northover 44e5879f0f AArch64: add arm64_32 support to Clang. 2019-11-12 12:45:18 +00:00
Duncan P. N. Exon Smith eef6902160 clang/Modules: Delay err_module_file_conflict if a diagnostic is in flight
As part of an audit of whether all errors are being reported from the
ASTReader, delay err_module_file_conflict if a diagnostic is already in
flight when it is hit.  This required plumbing an extra argument through
the delayed diagnostic mechanics in DiagnosticsEngine.
2019-11-11 15:34:52 -08:00
Alexey Bataev fde11e9f23 [OPENMP50]Generalize handling of context matching/scoring.
Summary:
Untie context matching/scoring from the attribute for declare variant
directive to simplify future uses in other context-dependent directives.

Reviewers: jdoerfert

Subscribers: guansong, kkwli0, caomhin, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69952
2019-11-11 14:41:10 -05:00
Alex Suhan b314414570 Basic: fix FileManager invalidation issue for file redirect
Insertion into SeenFileEntries can invalidate iterators, we need to do
another lookup on the re-intern path.
2019-11-08 17:02:44 -05:00
Jan Korous 590f279c45 [clang] Add VFS support for sanitizers' blacklists
Differential Revision: https://reviews.llvm.org/D69648
2019-11-08 10:58:50 -08:00
Nick Desaulniers 51adeae1c9 remove redundant LLVM version from version string when setting CLANG_VENDOR
Summary:
When downstream LLVM distributions (like AOSP) set the CLANG_VENDOR
cmake variable, the version string printed by the clang driver looks
like:

$ clang --version
[CLANG_VENDOR] clang version X.X.X ([CLANG_REPOSITORY_STRING] sha) (based on LLVM X.X.X)

Rather than the more standard:
$ clang --version
clang version X.X.X ([CLANG_REPOSITORY_STRING] sha)

Based on feedback the the version string is a little long, the trailing
"(based on LLVM X.X.X)" is redundant and makes less sense after moving
LLVM to the monorepo. And it is only added should vendors set the cmake
variable CLANG_VENDOR. Let's remove it.

Reviewers: jyknight, eli.friedman, rsmith, rjmccall, efriedma

Reviewed By: efriedma

Subscribers: arphaman, efriedma, cfe-commits, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69925
2019-11-08 09:24:17 -08:00
Simon Atanasyan a751f557d8 [mips] Set macros for Octeon+ CPU 2019-11-07 13:58:51 +03:00
Simon Atanasyan 3552d3e0f7 [mips] Add `octeon+` to the list of CPUs accepted by the driver 2019-11-07 13:58:50 +03:00
Craig Topper a8ccb48f69 [X86] Add 'fxsr' feature to -march=pentium2 to match X86.td and gcc. 2019-11-06 10:27:53 -08:00
Craig Topper ba73aad4f6 [X86] Add 'mmx' to all CPUs that have a version of 'sse' and weren't already enabling '3dnow'
All SSE capable CPUs have MMX. 3dnow implicitly enables MMX.

We have code that detects if sse is enabled and implicitly enables
MMX unless -mno-mmx is passed. So in most cases we were already
enabling MMX if march passed a CPU that supported SSE.

The exception to this is if you pass -march for a cpu supports SSE
and also pass -mno-sse. We should still enable MMX since its part
of the CPU capability.
2019-11-06 10:02:40 -08:00
Simon Atanasyan 0d14656b9d [mips] Set __OCTEON__ macros 2019-11-05 12:10:58 +03:00
Simon Atanasyan e578d0fd29 [mips] Fix `__mips_isa_rev` macros value for Octeon CPU 2019-11-05 12:10:58 +03:00
Alexey Bataev 14a388f43b [OPENMP50]Add support for parallel master taskloop simd directive.
Added full support for parallel master taskloop simd directive.
2019-10-30 10:23:33 -04:00
Guillaume Chatelet 1c85a2e8dc isBuiltinFunc() uses StringRef instead of const char*
Summary: This prevents a bug when passing nullptr, StringRef ctor would call strlen(nullptr).

Reviewers: vlad.tsyrklevich

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69569
2019-10-29 17:36:55 +01:00
Krzysztof Parzyszek 99f51960fd [Hexagon] Handle remaining registers in getRegisterByName()
This fixes https://llvm.org/PR43829.
2019-10-29 08:56:01 -05:00
paulhoad 8fa5e98fd1 [clang-format] Remove duplciate code from Invalid BOM detection
Summary:
Review comments on {D68767} asked that this duplicated code in clang-format was moved to one central location that being SourceManager (where it had originally be copied from I assume)

Moved function into static function  ContentCache::getInvalidBOM(...)  - (closest class to where it was defined before)
Updated clang-format to call this static function

Added unit tests for said new function in BasicTests

Sorry not my normal code area so may have the wrong reviewers. (but your names were on the recent history)

Reviewers: bruno, arphaman, klimek, owenpan, mitchell-stellar, dexonsmith

Reviewed By: owenpan

Subscribers: cfe-commits

Tags: #clang, #clang-format, #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D68914
2019-10-24 20:24:44 +01:00
Bjorn Pettersson 78424e5f84 Prune include of DataLayout.h from include/clang/Basic/TargetInfo.h. NFC
Summary:
Use a forward declaration of DataLayout instead of including
DataLayout.h in clangs TargetInfo.h. This reduces include
dependencies toward DataLayout.h (and other headers such as
DerivedTypes.h, Type.h that is included by DataLayout.h).

Needed to move implemantation of TargetInfo::resetDataLayout
from TargetInfo.h to TargetInfo.cpp.

Reviewers: rnk

Reviewed By: rnk

Subscribers: jvesely, nhaehnle, cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69262

llvm-svn: 375438
2019-10-21 17:58:14 +00:00
Alexey Bataev b8552abfe7 [OPENMP50]Add support for master taskloop simd.
Added  trsing/semantics/codegen for combined construct master taskloop simd.

llvm-svn: 375255
2019-10-18 16:47:35 +00:00
Alexey Bataev 5bbceadfc8 [OPENMP50]Add support for 'parallel master taskloop' construct.
Added parsing/sema/codegen support for 'parallel master taskloop'
constructs. Some of the clauses, like 'grainsize', 'num_tasks', 'final'
and 'priority' are not supported in full, only constant expressions can
be used currently in these clauses.

llvm-svn: 374791
2019-10-14 17:17:41 +00:00
Volodymyr Sapsai e8752a9d1b [Stats] Convert some ad-hoc header search stats to ALWAYS_ENABLED_STATISTIC.
rdar://problem/55715134

Reviewers: dsanders, bogner, rtereshin

Reviewed By: dsanders

Subscribers: hiraditya, jkorous, dexonsmith, ributzka, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68252

llvm-svn: 374581
2019-10-11 18:22:34 +00:00
Alexey Bataev 60e51c4803 [OPENMP50]Support for 'master taskloop' directive.
Added full support for master taskloop directive.

llvm-svn: 374437
2019-10-10 20:13:02 +00:00
Yonghong Song 05e46979d2 [BPF] do compile-once run-everywhere relocation for bitfields
A bpf specific clang intrinsic is introduced:
   u32 __builtin_preserve_field_info(member_access, info_kind)
Depending on info_kind, different information will
be returned to the program. A relocation is also
recorded for this builtin so that bpf loader can
patch the instruction on the target host.
This clang intrinsic is used to get certain information
to facilitate struct/union member relocations.

The offset relocation is extended by 4 bytes to
include relocation kind.
Currently supported relocation kinds are
 enum {
    FIELD_BYTE_OFFSET = 0,
    FIELD_BYTE_SIZE,
    FIELD_EXISTENCE,
    FIELD_SIGNEDNESS,
    FIELD_LSHIFT_U64,
    FIELD_RSHIFT_U64,
 };
for __builtin_preserve_field_info. The old
access offset relocation is covered by
    FIELD_BYTE_OFFSET = 0.

An example:
struct s {
    int a;
    int b1:9;
    int b2:4;
};
enum {
    FIELD_BYTE_OFFSET = 0,
    FIELD_BYTE_SIZE,
    FIELD_EXISTENCE,
    FIELD_SIGNEDNESS,
    FIELD_LSHIFT_U64,
    FIELD_RSHIFT_U64,
};

void bpf_probe_read(void *, unsigned, const void *);
int field_read(struct s *arg) {
  unsigned long long ull = 0;
  unsigned offset = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_OFFSET);
  unsigned size = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_SIZE);
 #ifdef USE_PROBE_READ
  bpf_probe_read(&ull, size, (const void *)arg + offset);
  unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64);
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  lshift = lshift + (size << 3) - 64;
 #endif
 #else
  switch(size) {
  case 1:
    ull = *(unsigned char *)((void *)arg + offset); break;
  case 2:
    ull = *(unsigned short *)((void *)arg + offset); break;
  case 4:
    ull = *(unsigned int *)((void *)arg + offset); break;
  case 8:
    ull = *(unsigned long long *)((void *)arg + offset); break;
  }
  unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64);
 #endif
  ull <<= lshift;
  if (__builtin_preserve_field_info(arg->b2, FIELD_SIGNEDNESS))
    return (long long)ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64);
  return ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64);
}

There is a minor overhead for bpf_probe_read() on big endian.

The code and relocation generated for field_read where bpf_probe_read() is
used to access argument data on little endian mode:
        r3 = r1
        r1 = 0
        r1 = 4  <=== relocation (FIELD_BYTE_OFFSET)
        r3 += r1
        r1 = r10
        r1 += -8
        r2 = 4  <=== relocation (FIELD_BYTE_SIZE)
        call bpf_probe_read
        r2 = 51 <=== relocation (FIELD_LSHIFT_U64)
        r1 = *(u64 *)(r10 - 8)
        r1 <<= r2
        r2 = 60 <=== relocation (FIELD_RSHIFT_U64)
        r0 = r1
        r0 >>= r2
        r3 = 1  <=== relocation (FIELD_SIGNEDNESS)
        if r3 == 0 goto LBB0_2
        r1 s>>= r2
        r0 = r1
LBB0_2:
        exit

Compare to the above code between relocations FIELD_LSHIFT_U64 and
FIELD_LSHIFT_U64, the code with big endian mode has four more
instructions.
        r1 = 41   <=== relocation (FIELD_LSHIFT_U64)
        r6 += r1
        r6 += -64
        r6 <<= 32
        r6 >>= 32
        r1 = *(u64 *)(r10 - 8)
        r1 <<= r6
        r2 = 60   <=== relocation (FIELD_RSHIFT_U64)

The code and relocation generated when using direct load.
        r2 = 0
        r3 = 4
        r4 = 4
        if r4 s> 3 goto LBB0_3
        if r4 == 1 goto LBB0_5
        if r4 == 2 goto LBB0_6
        goto LBB0_9
LBB0_6:                                 # %sw.bb1
        r1 += r3
        r2 = *(u16 *)(r1 + 0)
        goto LBB0_9
LBB0_3:                                 # %entry
        if r4 == 4 goto LBB0_7
        if r4 == 8 goto LBB0_8
        goto LBB0_9
LBB0_8:                                 # %sw.bb9
        r1 += r3
        r2 = *(u64 *)(r1 + 0)
        goto LBB0_9
LBB0_5:                                 # %sw.bb
        r1 += r3
        r2 = *(u8 *)(r1 + 0)
        goto LBB0_9
LBB0_7:                                 # %sw.bb5
        r1 += r3
        r2 = *(u32 *)(r1 + 0)
LBB0_9:                                 # %sw.epilog
        r1 = 51
        r2 <<= r1
        r1 = 60
        r0 = r2
        r0 >>= r1
        r3 = 1
        if r3 == 0 goto LBB0_11
        r2 s>>= r1
        r0 = r2
LBB0_11:                                # %sw.epilog
        exit

Considering verifier is able to do limited constant
propogation following branches. The following is the
code actually traversed.
        r2 = 0
        r3 = 4   <=== relocation
        r4 = 4   <=== relocation
        if r4 s> 3 goto LBB0_3
LBB0_3:                                 # %entry
        if r4 == 4 goto LBB0_7
LBB0_7:                                 # %sw.bb5
        r1 += r3
        r2 = *(u32 *)(r1 + 0)
LBB0_9:                                 # %sw.epilog
        r1 = 51   <=== relocation
        r2 <<= r1
        r1 = 60   <=== relocation
        r0 = r2
        r0 >>= r1
        r3 = 1
        if r3 == 0 goto LBB0_11
        r2 s>>= r1
        r0 = r2
LBB0_11:                                # %sw.epilog
        exit

For native load case, the load size is calculated to be the
same as the size of load width LLVM otherwise used to load
the value which is then used to extract the bitfield value.

Differential Revision: https://reviews.llvm.org/D67980

llvm-svn: 374099
2019-10-08 18:23:17 +00:00
Alexey Bataev dba792c522 [OPENMP]Use standard parsing for 'match' clause, NFC.
Reused standard clauses parsing scheme for parsing/matching 'match'
clause in 'declare variant' directive.

llvm-svn: 372635
2019-09-23 18:13:31 +00:00
Ulrich Weigand 48b40834dc [SystemZ] Support z15 processor name
The recently announced IBM z15 processor implements the architecture
already supported as "arch13" in LLVM.  This patch adds support for
"z15" as an alternate architecture name for arch13.

Corrsponding LLVM support was committed as rev. 372435.

llvm-svn: 372436
2019-09-20 23:06:03 +00:00
Eli Friedman 33054a02f7 [ARM] Update clang for removal of vfp2d16 and vfp2d16sp
Matching fix for https://reviews.llvm.org/D67375 (r372186).

Differential Revision: https://reviews.llvm.org/D67467

llvm-svn: 372187
2019-09-17 21:43:19 +00:00
Kito Cheng 6455938441 [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctly
RISC-V LLVM was only implement small/medlow code model, so it defined
__riscv_cmodel_medlow directly without check.

Now, we have medium/medany code model in RISC-V back-end, it should
define according the actually code model.

Reviewed By: lewis-revill

Differential Revision: https://reviews.llvm.org/D67065

llvm-svn: 372078
2019-09-17 08:09:56 +00:00
Erich Keane b79f331958 Move some definitions from Sema to Basic to fix shared libs build
r371875 moved some functionality around to a Basic header file, but
didn't move its definitions as well.  This patch moves some things
around so that shared library building can work.

llvm-svn: 371985
2019-09-16 13:58:59 +00:00
Alexey Bataev d158cf64d6 [OPENMP5.0]Add basic support for declare variant directive.
Added basic support for declare variant directive and its match clause
with user context selector.

llvm-svn: 371892
2019-09-13 20:18:17 +00:00
Amy Huang 7b1d793713 Reland "Change the X86 datalayout to add three address spaces
for 32 bit signed, 32 bit unsigned, and 64 bit pointers."
This reverts 57076d3199.

Original review at https://reviews.llvm.org/D64931.
Review for added fix at https://reviews.llvm.org/D66843.

llvm-svn: 371568
2019-09-10 23:15:38 +00:00
David Candler a59bffb576 [ARM] Add support for the s,j,x,N,O inline asm constraints
A number of inline assembly constraints are currently supported by LLVM, but rejected as invalid by Clang:

Target independent constraints:

s: An integer constant, but allowing only relocatable values

ARM specific constraints:

j: An immediate integer between 0 and 65535 (valid for MOVW)
x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3
N: An immediate integer between 0 and 31 (Thumb1 only)
O: An immediate integer which is a multiple of 4 between -508 and 508. (Thumb1 only)

This patch adds support to Clang for the missing constraints along with some checks to ensure that the constraints are used with the correct target and Thumb mode, and that immediates are within valid ranges (at least where possible). The constraints are already implemented in LLVM, but just a couple of minor corrections to checks (V8M Baseline includes MOVW so should work with 'j', 'N' and 'O' shouldn't be valid in Thumb2) so that Clang and LLVM are in line with each other and the documentation.

Differential Revision: https://reviews.llvm.org/D65863

Change-Id: I18076619e319bac35fbb60f590c069145c9d9a0a
llvm-svn: 371079
2019-09-05 15:17:25 +00:00
Justin Hibbits 3dac214273 Add -m(no)-spe to clang
Summary:
r337347 added support for the Signal Processing Engine (SPE) to LLVM.
This follows that up with the clang side.

This adds -mspe and -mno-spe, to match GCC.

Subscribers: nemanjai, kbarton, cfe-commits

Differential Revision: https://reviews.llvm.org/D49754

llvm-svn: 371066
2019-09-05 13:38:46 +00:00
Matt Arsenault 281f2e2c37 AMDGPU: Add builtins for is_shared/is_private
llvm-svn: 371010
2019-09-05 03:00:43 +00:00
Sam Elliott 03c9e139c7 [RISCV] Correct Logic around ilp32e macros
Summary:
GCC seperates the `__riscv_float_abi_*` macros and the
`__riscv_abi_rve` macro. If the chosen abi is ilp32e, `gcc -march=rv32i
-mabi=ilp32i -E -dM` shows that both `__riscv_float_abi_soft` and
`__riscv_abi_rve` are set.

This patch corrects the compiler logic around these defines.

At the moment, this patch will not change clang's behaviour, because we do not
accept the `ilp32e` abi yet.

Reviewers: luismarques, asb

Reviewed By: luismarques

Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66591

llvm-svn: 370709
2019-09-03 08:47:58 +00:00
Alex Lorenz 0377ca641c Introduce a DirectoryEntryRef that stores both a reference and an
accessed name to the directory entry

This commit introduces a parallel API that returns a DirectoryEntryRef
to the FileManager, similar to the parallel FileEntryRef API. All
uses will have to be update in follow-up patches. The immediate use of the new API in this
patch fixes the issue where a file manager was reused in clang-scan-deps,
but reported an different file path whenever a framework lookup was done through a symlink.

Differential Revision: https://reviews.llvm.org/D67026

llvm-svn: 370562
2019-08-31 01:26:04 +00:00
Duncan P. N. Exon Smith e1b7f22b34 ASTReader: Bypass overridden files when reading PCHs
If contents of a file that is part of a PCM are overridden when reading
it, but weren't overridden when the PCM was being built, the ASTReader
will emit an error.  Now it creates a separate FileEntry for recovery,
bypassing the overridden content instead of discarding it.  The
pre-existing testcase clang/test/PCH/remap-file-from-pch.cpp confirms
that the new recovery method works correctly.

This resolves a long-standing FIXME to avoid hypothetically invalidating
another precompiled module that's already using the overridden contents.

This also removes ContentCache-related API that would be unsafe to use
across `CompilerInstance`s in an implicit modules build.  This helps to
unblock us sinking it from SourceManager into FileManager in the future,
which would allow us to delete `InMemoryModuleCache`.

https://reviews.llvm.org/D66710

llvm-svn: 370546
2019-08-30 22:59:25 +00:00
Duncan P. N. Exon Smith 122705b911 FileManager: Remove ShouldCloseOpenFile argument from getBufferForFile, NFC
Remove this dead code.  We always close it.

llvm-svn: 370488
2019-08-30 16:56:26 +00:00
Volodymyr Sapsai 0785f8d0bb Remove `FileManager::invalidateCache` as it has no callers anymore. NFC.
llvm-svn: 370400
2019-08-29 19:51:25 +00:00
Craig Topper 5a43fdd313 [X86] Remove what little support we had for MPX
-Deprecate -mmpx and -mno-mpx command line options
-Remove CPUID detection of mpx for -march=native
-Remove MPX from all CPUs
-Remove MPX preprocessor define

I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything.

gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX

Differential Revision: https://reviews.llvm.org/D66669

llvm-svn: 370393
2019-08-29 18:09:02 +00:00
Vlad Tsyrklevich 57076d3199 Revert "Change the X86 datalayout to add three address spaces for 32 bit signed,"
This reverts commit r370083 because it caused check-lld failures on
sanitizer-x86_64-linux-fast.

llvm-svn: 370142
2019-08-28 01:08:54 +00:00
Amy Huang 1299945b81 Change the X86 datalayout to add three address spaces for 32 bit signed,
32 bit unsigned, and 64 bit pointers.

llvm-svn: 370083
2019-08-27 17:46:53 +00:00
Sam Elliott f260630e8f [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics
Summary: This ensures that libcalls aren't generated when the target supports atomics. Atomics aren't in the base RV32I/RV64I instruction sets, so MaxAtomicInlineWidth and MaxAtomicPromoteWidth are set only when the atomics extension is being targeted. This must be done in setMaxAtomicWidth, as this should be done after handleTargetFeatures has been called.

Reviewers: jfb, jyknight, wmi, asb

Reviewed By: asb

Subscribers: pzheng, MaskRay, s.egerton, lenary, dexonsmith, psnobl, benna, Jim, JohnLLVM, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, lewis-revill, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57450

llvm-svn: 370073
2019-08-27 15:41:16 +00:00
Duncan P. N. Exon Smith f584819085 ContentCache: Drop getBuffer's dependency on SourceManager
Refactor ContentCache::IsSystemFile to IsFileVolatile, checking
SourceManager::userFilesAreVolatile at construction time.  This is a
step toward lowering ContentCache down from SourceManager to
FileManager.

No functionality change intended.

https://reviews.llvm.org/D66713

llvm-svn: 369958
2019-08-26 20:32:05 +00:00
Richard Smith 4d3a336612 [msvc] Add necessary #include to make compiler intrinsics available.
llvm-svn: 369944
2019-08-26 18:33:15 +00:00
Duncan P. N. Exon Smith 9ef6c49baf FileManager: Use llvm::Expected in new getFileRef API
`FileManager::getFileRef` is a modern API which we expect to convert to
over time.  We should modernize the error handling as well, using
`llvm::Expected` instead of `llvm::ErrorOr`, to help clients that care
about errors to ensure nothing is missed.

However, not all clients care.  I've also added another path for those
that don't:

- `FileEntryRef` is now copy- and move-assignable (using a pointer
  instead of a reference).
- `FileManager::getOptionalFileRef` returns an `llvm::Optional` instead
  of `llvm::Expected`.
- Added an `llvm::expectedToOptional` utility in case this is useful
  elsewhere.

https://reviews.llvm.org/D66705

llvm-svn: 369943
2019-08-26 18:29:51 +00:00
Richard Smith ac1d5986c8 Fix file header.
llvm-svn: 369941
2019-08-26 18:21:13 +00:00
Richard Smith 26a92d5852 Improve behavior in the case of stack exhaustion.
Summary:
Clang performs various recursive operations (such as template instantiation),
and may use non-trivial amounts of stack space in each recursive step (for
instance, due to recursive AST walks). While we try to keep the stack space
used by such steps to a minimum and we have explicit limits on the number of
such steps we perform, it's impractical to guarantee that we won't blow out the
stack on deeply recursive template instantiations on complex ASTs, even with
only a moderately high instantiation depth limit.

The user experience in these cases is generally terrible: we crash with
no hint of what went wrong. Under this patch, we attempt to do better:

 * Detect when the stack is nearly exhausted, and produce a warning with a
   nice template instantiation backtrace, telling the user that we might
   run slowly or crash.

 * For cases where we're forced to trigger recursive template
   instantiation in arbitrarily-deeply-nested contexts, check whether
   we're nearly out of stack space and allocate a new stack (by spawning
   a new thread) after producing the warning.

Reviewers: rnk, aaron.ballman

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66361

llvm-svn: 369940
2019-08-26 18:18:07 +00:00
Richard Smith 98f9e94e57 Fix use of invalidated iterator introduced by r369680.
llvm-svn: 369932
2019-08-26 17:31:06 +00:00
Duncan P. N. Exon Smith 894b8d1d85 FileManager: Factor duplicated code in getBufferForFile, NFC
Incidentally, this also unifies the two versions (removing an
unnecessary call to `SmallString::c_str`).

llvm-svn: 369861
2019-08-25 01:18:35 +00:00
Alexey Bataev 729e242a79 [OPENMP5.0]Add support for device_type clause in declare target
construct.

OpenMP 5.0 introduced new clause for declare target directive, device_type clause, which may accept values host, nohost, and any. Host means
that the function must be emitted only for the host, nohost - only for
the device, and any - for both, device and the host.

llvm-svn: 369775
2019-08-23 16:11:14 +00:00
Alex Lorenz 4dc5573acc Introduce FileEntryRef and use it when handling includes to report correct dependencies
when the FileManager is reused across invocations

This commit introduces a parallel API to FileManager's getFile: getFileEntryRef, which returns
a reference to the FileEntry, and the name that was used to access the file. In the case of
a VFS with 'use-external-names', the FileEntyRef contains the external name of the file,
not the filename that was used to access it.

The new API is adopted only in the HeaderSearch and Preprocessor for include file lookup, so that the
accessed path can be propagated to SourceManager's FileInfo. SourceManager's FileInfo now can report this accessed path, using
the new getName method. This API is then adopted in the dependency collector, which now correctly reports dependencies when a file
is included both using a symlink and a real path in the case when the FileManager is reused across multiple Preprocessor invocations.

Note that this patch does not fix all dependency collector issues, as the same problem is still present in other cases when dependencies
are obtained using FileSkipped, InclusionDirective, and HasInclude. This will be fixed in follow-up commits.

Differential Revision: https://reviews.llvm.org/D65907

llvm-svn: 369680
2019-08-22 18:15:50 +00:00
Alex Lorenz 06abd69695 NFCI: Simplify SourceManager::translateFile by removing code path that should never be taken
I noticed that SourceManager::translateFile has code that doesn't really make sense.
In particular, if it fails to find a FileID by comparing FileEntry * values, it tries to
look through files that have the same filename, to see if they have a matching inode to try to
find the right FileID. However, the inode comparison seem redundant, as Clang's FileManager
already deduplicates FileEntry * values by inode.
Thus the comparisons between inodes should never actually succeed, and the comparison between FileEntry * values should be sufficient here.

Differential Revision: https://reviews.llvm.org/D65481

llvm-svn: 369585
2019-08-21 21:37:09 +00:00
Nico Weber f56e8991f4 clang: Fix typo in comment
llvm-svn: 369536
2019-08-21 15:37:27 +00:00
Jian Cai 16fa8b0970 Reland "[ARM] push LR before __gnu_mcount_nc"
This relands r369147 with fixes to unit tests.

https://reviews.llvm.org/D65019

llvm-svn: 369173
2019-08-16 23:30:16 +00:00
Jian Cai 2d957cfe02 Revert "[ARM] push LR before __gnu_mcount_nc"
This reverts commit f4cf3b9593.

llvm-svn: 369149
2019-08-16 20:40:21 +00:00
Jian Cai f4cf3b9593 [ARM] push LR before __gnu_mcount_nc
Push LR register before calling __gnu_mcount_nc as it expects the value of LR register to be the top value of
the stack on ARM32.

Differential Revision: https://reviews.llvm.org/D65019

llvm-svn: 369147
2019-08-16 20:21:08 +00:00
Lewis Revill 1653ebee3f [RISCV] Add inline asm constraint A for RISC-V
This allows the constraint A to be used in inline asm for RISC-V, which
allows an address held in a register to be used.

This patch adds the minimal amount of code required to get operands with
the right constraints to compile.

Differential Revision: https://reviews.llvm.org/D54295

llvm-svn: 369093
2019-08-16 10:23:56 +00:00
Jonas Devlieghere 2b3d49b610 [Clang] Migrate llvm::make_unique to std::make_unique
Now that we've moved to C++14, we no longer need the llvm::make_unique
implementation from STLExtras.h. This patch is a mechanical replacement
of (hopefully) all the llvm::make_unique instances across the monorepo.

Differential revision: https://reviews.llvm.org/D66259

llvm-svn: 368942
2019-08-14 23:04:18 +00:00
Stanislav Mekhanoshin c17705b7fb [AMDGPU] Do not assume a default GCN target
Differential Revision: https://reviews.llvm.org/D66246

llvm-svn: 368917
2019-08-14 20:55:15 +00:00
Erik Pilkington aa3855694f [Sema][ObjC] Fix a -Wformat false positive with localizedStringForKey
Only honour format_arg attributes on -[NSBundle localizedStringForKey] when its
argument has a format specifier in it, otherwise its likely to just be a key to
fetch localized strings.

Fixes rdar://23622446

Differential revision: https://reviews.llvm.org/D27165

llvm-svn: 368878
2019-08-14 16:57:11 +00:00
Pengfei Wang e28cbbd5d4 [X86] Support -march=tigerlake
Support -march=tigerlake for x86.
Compare with Icelake Client, It include 4 more new features ,they are
avx512vp2intersect, movdiri, movdir64b, shstk.

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D65840

llvm-svn: 368543
2019-08-12 01:29:46 +00:00
Richard Sandiford eb485fbc71 Add SVE opaque built-in types
This patch adds the SVE built-in types defined by the Procedure Call
Standard for the Arm Architecture:

   https://developer.arm.com/docs/100986/0000

It handles the types in all relevant places that deal with built-in types.
At the moment, some of these places bail out with an error, including:

   (1) trying to generate LLVM IR for the types
   (2) trying to generate debug info for the types
   (3) trying to mangle the types using the Microsoft C++ ABI
   (4) trying to @encode the types in Objective C

(1) and (2) are fixed by follow-on patches but (unlike this patch)
they deal mostly with target-specific LLVM details, so seemed like
a logically separate change.  There is currently no spec for (3) and
(4), so reporting an error seems like the correct behaviour for now.

The intention is that the types will become sizeless types:

   http://lists.llvm.org/pipermail/cfe-dev/2019-June/062523.html

The main purpose of the sizeless type extension is to diagnose
impossible or dangerous uses of the types, such as any that would
require sizeof to have a meaningful defined value.

Until then, the patch sets the alignments of the types to the values
specified in the link above.  It also sets the sizes of the types to
zero, which is chosen to be consistently wrong and shouldn't affect
correctly-written code (i.e. code that would compile even with the
sizeless type extension).

The patch adds the common subset of functionality needed to test the
sizeless type extension on the one hand and to provide SVE intrinsic
functions on the other.  After this patch, the two pieces of work are
essentially independent.

The patch is based on one by Graham Hunter:

   https://reviews.llvm.org/D59245

Differential Revision: https://reviews.llvm.org/D62960

llvm-svn: 368413
2019-08-09 08:52:54 +00:00
Diogo N. Sampaio 9427aa2d54 [ARM] Set default alignment to 64bits
Summary:
The maximum alignment used by ARM arch
is 64bits, not 128.

This could cause overaligned memory
access for 128 bit neon vector that
have unpredictable behaviour.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668

Reviewers: ostannard, dmgreen, srhines, danalbert, pirama, peter.smith

Reviewed By: pirama, peter.smith

Subscribers: phosek, thegameg, thakis, llvm-commits, carwil, peter.smith, javed.absar, kristof.beyls, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65000

llvm-svn: 368288
2019-08-08 12:50:36 +00:00
Rainer Orth 09d890d728 Move LangStandard*, InputKind::Language to Basic
This patch is a prerequisite for using LangStandard from Driver in
https://reviews.llvm.org/D64793.

It moves LangStandard* and InputKind::Language to Basic.  It is mostly
mechanical, with only a few changes of note:

- enum Language has been changed into enum class Language : uint8_t to
  avoid a clash between OpenCL in enum Language and OpenCL in enum
  LangFeatures and not to increase the size of class InputKind.

- Now that getLangStandardForName, which is currently unused, also checks
  both canonical and alias names, I've introduced a helper getLangKind
  which factors out a code pattern already used 3 times.

The patch has been tested on x86_64-pc-solaris2.11, sparcv9-sun-solaris2.11,
and x86_64-pc-linux-gnu.

There's a companion patch for lldb which uses LangStandard.h
(https://reviews.llvm.org/D65717).

While polly includes isl which in turn uses InputKind::C, that part of the
code isn't even built inside the llvm tree.  I've posted a patch to allow
for both InputKind::C and Language::C upstream
(https://groups.google.com/forum/#!topic/isl-development/6oEvNWOSQFE).

Differential Revision: https://reviews.llvm.org/D65562

llvm-svn: 367864
2019-08-05 13:59:26 +00:00
Serge Pavlov fcb6123d05 Use switch instead of series of comparisons
This is style correction, no functional changes.

Differential Revision: https://reviews.llvm.org/D65670

llvm-svn: 367759
2019-08-03 16:32:49 +00:00
Harlan Haskins 8d323d1506 [clang] Adopt new FileManager error-returning APIs
Update the callers of FileManager::getFile and FileManager::getDirectory to handle the new llvm::ErrorOr-returning methods.

Signed-off-by: Harlan Haskins <harlan@apple.com>
llvm-svn: 367616
2019-08-01 21:31:56 +00:00
Harlan Haskins 461f0722dd [clang] Adopt llvm::ErrorOr in FileManager methods
Previously, the FileManager would use NULL returns to signify whether a file existed, but that doesn’t cover permissions issues or anything else that might occur while trying to stat or read a file. Instead, convert getFile and getDirectory into returning llvm::ErrorOr

Signed-off-by: Harlan Haskins <harlan@apple.com>
llvm-svn: 367615
2019-08-01 21:31:49 +00:00
Serge Pavlov 3c26163d1a [Parser] Use special definition for pragma annotations
Previously pragma annotation tokens were described as any other
annotations in TokenKinds.def. This change introduces special macro
PRAGMA_ANNOTATION for the pragma descriptions. It allows implementing
checks that deal with pragma annotations only.

Differential Revision: https://reviews.llvm.org/D65405

llvm-svn: 367575
2019-08-01 15:15:10 +00:00
Sam Elliott f46d413fa0 [RISCV] Add FreeBSD targets
Reviewers: asb

Reviewed By: asb

Subscribers: simoncook, s.egerton, lenary, psnobl, benna, mhorne, emaste, kito-cheng, shiva0217, rogfer01, rkruppe, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57795

Patch by James Clarke (jrtc27)

llvm-svn: 367557
2019-08-01 13:14:30 +00:00
Momchil Velikov a36d31478c [AArch64] Add support for Transactional Memory Extension (TME)
Re-commit r366322 after some fixes

TME is a future architecture technology, documented in

  https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools
  https://developer.arm.com/docs/ddi0601/a

More about the future architectures:

  https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture

This patch adds support for the TME instructions TSTART, TTEST, TCOMMIT, and
TCANCEL and the target feature/arch extension "tme".

It also implements TME builtin functions, defined in ACLE Q2 2019
(https://developer.arm.com/docs/101028/latest)

Differential Revision: https://reviews.llvm.org/D64416

Patch by Javed Absar and Momchil Velikov

llvm-svn: 367428
2019-07-31 12:52:17 +00:00
Sam Elliott 9e6b2e1605 [RISCV] Support 'f' Inline Assembly Constraint
Summary:
This adds the 'f' inline assembly constraint, as supported by GCC. An
'f'-constrained operand is passed in a floating point register. Exactly
which kind of floating-point register (32-bit or 64-bit) is decided
based on the operand type and the available standard extensions (-f and
-d, respectively).

This patch adds support in both the clang frontend, and LLVM itself.

Reviewers: asb, lewis-revill

Reviewed By: asb

Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65500

llvm-svn: 367403
2019-07-31 09:45:55 +00:00
Simon Cook 7deaeee753 [RISCV] Add support for floating point registers in inlineasm
This adds support for parsing/emitting in IR the floating-point RISC-V
registers in inline assembly clobber lists.

Differential Revision: https://reviews.llvm.org/D64737

llvm-svn: 367399
2019-07-31 09:12:00 +00:00
Rainer Orth b9f8ab2c7e [Driver] Define _FILE_OFFSET_BITS=64 on Solaris
make check-all currently fails on x86_64-pc-solaris2.11 when building with GCC 9:

  Undefined                       first referenced
   symbol                             in file
  _ZN11__sanitizer14internal_lseekEimi SANITIZER_TEST_OBJECTS.sanitizer_libc_test.cc.i386.o
  _ZN11__sanitizer23MapWritableFileToMemoryEPvmim SANITIZER_TEST_OBJECTS.sanitizer_libc_test.cc.i386.o
  ld: fatal: symbol referencing errors
  clang-9: error: linker command failed with exit code 1 (use -v to see invocation)
  make[3]: *** [projects/compiler-rt/lib/sanitizer_common/tests/CMakeFiles/TSanitizer-i386-Test.dir/build.make:92: projects/compiler-rt/lib/sanitizer_common/tests/Sanitizer-i386-Test] Error 1

While e.g. __sanitizer::internal_lseek is defined in sanitizer_solaris.cc, g++ 9
predefines _FILE_OFFSET_BITS=64 while clang++ currently does not.

This patch resolves this inconsistency by following the gcc lead, which allows
make check-all to finish successfully.

There's one caveat: gcc defines _LARGEFILE_SOURCE and _LARGEFILE64_SOURCE for C++ only, while clang has long been doing it for
all languages.  I'd like to keep it this way because those macros do is to make
declarations of fseek/ftello (_LARGEFILE_SOURCE) resp. the 64-bit versions
of largefile functions (*64 with _LARGEFILE64_SOURCE) visible additionally.
However, _FILE_OFFSET_BITS=64 changes all affected functions to be largefile-aware.
I'd like to restrict this to C++, just like gcc does.

To avoid a similar inconsistence with host compilers that don't predefine _FILE_OFFSET_BITS=64
(e.g. clang < 9, gcc < 9), this needs a compantion patch https://reviews.llvm.org/D64483.

Tested on x86_64-pc-solaris2.11.

Differential Revision: https://reviews.llvm.org/D64482

llvm-svn: 367305
2019-07-30 10:38:41 +00:00
Sander de Smalen 405c999d97 [AArch64] Disable __ARM_FEATURE_SVE without ACLE.
The Arm C Language Extensions for SVE document specifies that 
__ARM_FEATURE_SVE should be set when the compiler supports SVE and
implements all the extensions described in the document.

This is currently not yet the case, so the feature should be disabled
until the compiler can provide all the extensions as described.

Reviewers: c-rhodes, rengolin, rovka, ktkachov

Reviewed By: rengolin

Differential Revision: https://reviews.llvm.org/D65404

llvm-svn: 367301
2019-07-30 10:14:39 +00:00
Petr Hosek 92a2e1bbb9 Revert "[ARM] Set default alignment to 64bits"
This reverts commit r367119.

This broke several bots:

http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/26891/steps/ninja%20check%201/logs/FAIL%3A%20Clang%3A%3Aexception-alignment.cpp
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/245/consoleFull

llvm-svn: 367166
2019-07-27 01:59:23 +00:00
Simi Pallipurath 92363a3ada [ARM] Set default alignment to 64bits
The maximum alignment used by ARM arch
is 64bits, not 128.

This could cause overaligned memory
access for 128 bit neon vector that
have unpredictable behaviour.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668

Patch by: Diogo Sampaio(diogo.sampaio@arm.com)

Differential Revision: https://reviews.llvm.org/D65000

Change-Id: I5a62b766491f15dd51e4cfe6625929db897f67e3
llvm-svn: 367119
2019-07-26 15:05:19 +00:00
Erich Keane 393094859e Remove CallingConvMethodType
This seems to be an old vestage of a previous implementation of getting
the default calling convention, and everything is now using
CXXABI/ASTContext's getDefaultCallingConvention.  Remove it, since it
isn't doing anything.

llvm-svn: 367039
2019-07-25 17:14:45 +00:00
Sjoerd Meijer a19f5a76e6 Test commit. NFC.
Removed 2 trailing whitespaces in 2 files that used to be in different
repos to test my new github monorepo workflow.

llvm-svn: 366904
2019-07-24 13:30:36 +00:00
Sander de Smalen 2b290885d9 [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
Adds the SVE vector and predicate registers to the list of known registers.

Patch by Kerry McLaughlin.

Reviewers: erichkeane, sdesmalen, rengolin

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D64739

llvm-svn: 366878
2019-07-24 08:42:34 +00:00
Rainer Orth 2da6eea07c [clang, test] Fix Clang :: Headers/max_align.c on 64-bit SPARC
Clang :: Headers/max_align.c currently FAILs on 64-bit SPARC:

  error: 'error' diagnostics seen but not expected: 
    File /vol/llvm/src/clang/dist/test/Headers/max_align.c Line 12: static_assert failed due to requirement '8 == _Alignof(max_align_t)' ""
  1 error generated.

This happens because SuitableAlign isn't defined for SPARCv9 unlike SPARCv8
(which uses the default of 64 bits).  gcc's sparc/sparc.h has

  #define BIGGEST_ALIGNMENT (TARGET_ARCH64 ? 128 : 64)

This patch sets SuitableAlign to match and updates the corresponding testcase.

Tested on sparcv9-sun-solaris2.11.

Differential Revision: https://reviews.llvm.org/D64487

llvm-svn: 366820
2019-07-23 16:24:00 +00:00
Sunil Srivastava f4038e75d2 Disallow most calling convention attributes on PS4
PS4 now only allows "cdecl", and its equivalent on PS4, "sysv_abi".

Differential Revision: https://reviews.llvm.org/D64780

llvm-svn: 366617
2019-07-19 21:38:34 +00:00
Alex Bradbury e078967adf [RISCV] Hard float ABI support
The RISC-V hard float calling convention requires the frontend to:

* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s)
* Track usage of GPRs and FPRs in order to gate the above, and to
determine when signext/zeroext attributes must be added to integer
scalars

This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.

Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.

Re-landed after backing out 366450 due to missed hunks.

Differential Revision: https://reviews.llvm.org/D60456

llvm-svn: 366480
2019-07-18 18:29:59 +00:00
Alex Bradbury 9b732fe99b Revert "[RISCV] Hard float ABI support" r366450
The commit was missing a few hunks. Will fix and recommit.

llvm-svn: 366454
2019-07-18 16:13:17 +00:00
Alex Bradbury fc3aa2ab48 [RISCV] Hard float ABI support
The RISC-V hard float calling convention requires the frontend to:

* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s) * Track usage of GPRs and FPRs in order to gate the
above, and to
determine when signext/zeroext attributes must be added to integer
scalars

This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.

Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.

Differential Revision: https://reviews.llvm.org/D60456

llvm-svn: 366450
2019-07-18 15:33:41 +00:00
Momchil Velikov 0e2b74a2b0 Revert [AArch64] Add support for Transactional Memory Extension (TME)
This reverts r366322 (git commit 4b8da3a503)

llvm-svn: 366355
2019-07-17 17:43:32 +00:00
Momchil Velikov 4b8da3a503 [AArch64] Add support for Transactional Memory Extension (TME)
TME is a future architecture technology, documented in

https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools
https://developer.arm.com/docs/ddi0601/a

More about the future architectures:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture

This patch adds support for the TME instructions TSTART, TTEST, TCOMMIT, and
TCANCEL and the target feature/arch extension "tme".

It also implements TME builtin functions, defined in ACLE Q2 2019
(https://developer.arm.com/docs/101028/latest)

Patch by Javed Absar and Momchil Velikov

Differential Revision: https://reviews.llvm.org/D64416

llvm-svn: 366322
2019-07-17 13:23:27 +00:00
Momchil Velikov e14cfe2d2e [AArch64] Consistent types and naming for AArch64 target features (NFC)
Differential Revision: https://reviews.llvm.org/D64415

Committed as obvious.

llvm-svn: 366315
2019-07-17 11:24:37 +00:00
Kyrylo Tkachov eb72138340 [AArch64] Implement __jcvt intrinsic from Armv8.3-A
The jcvt intrinsic defined in ACLE [1] is available when ARM_FEATURE_JCVT is defined.

This change introduces the AArch64 intrinsic, wires it up to the instruction and a new clang builtin function.
The __ARM_FEATURE_JCVT macro is now defined when an Armv8.3-A or higher target is used.
I've implemented the target detection logic in Clang so that this feature is enabled for architectures from armv8.3-a onwards (so -march=armv8.4-a also enables this, for example).

make check-all didn't show any new failures.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

Differential Revision: https://reviews.llvm.org/D64495

llvm-svn: 366197
2019-07-16 09:27:39 +00:00
Rui Ueyama 49a3ad21d6 Fix parameter name comments using clang-tidy. NFC.
This patch applies clang-tidy's bugprone-argument-comment tool
to LLVM, clang and lld source trees. Here is how I created this
patch:

$ git clone https://github.com/llvm/llvm-project.git
$ cd llvm-project
$ mkdir build
$ cd build
$ cmake -GNinja -DCMAKE_BUILD_TYPE=Debug \
    -DLLVM_ENABLE_PROJECTS='clang;lld;clang-tools-extra' \
    -DCMAKE_EXPORT_COMPILE_COMMANDS=On -DLLVM_ENABLE_LLD=On \
    -DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++ ../llvm
$ ninja
$ parallel clang-tidy -checks='-*,bugprone-argument-comment' \
    -config='{CheckOptions: [{key: StrictMode, value: 1}]}' -fix \
    ::: ../llvm/lib/**/*.{cpp,h} ../clang/lib/**/*.{cpp,h} ../lld/**/*.{cpp,h}

llvm-svn: 366177
2019-07-16 04:46:31 +00:00
Nico Weber a2dcbd3643 Use a unique_ptr instead of manual memory management for LineTable
llvm-svn: 366088
2019-07-15 17:27:46 +00:00
Nico Weber 05489f0952 Use a unique_ptr instead of manual memory management for CustomDiagInfo
llvm-svn: 366085
2019-07-15 17:20:34 +00:00
Fangrui Song 6bd02a442c [PowerPC] Support -mabi=ieeelongdouble and -mabi=ibmlongdouble
gcc PowerPC supports 3 representations of long double:

* -mlong-double-64

  long double has the same representation of double but is mangled as `e`.
  In clang, this is the default on AIX, FreeBSD and Linux musl.

* -mlong-double-128

  2 possible 128-bit floating point representations:

  + -mabi=ibmlongdouble
    IBM extended double format. Mangled as `g`
    In clang, this is the default on Linux glibc.
  + -mabi=ieeelongdouble
    IEEE 754 quadruple-precision format. Mangled as `u9__ieee128` (`U10__float128` before gcc 8.2)
    This is currently unavailable.

This patch adds -mabi=ibmlongdouble and -mabi=ieeelongdouble, and thus
makes the IEEE 754 quadruple-precision long double available for
languages supported by clang.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D64283

llvm-svn: 366044
2019-07-15 07:25:11 +00:00
JF Bastien fff5dc0b17 Support __seg_fs and __seg_gs on x86
Summary:
GCC supports named address spaces macros:
  https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html

clang does as well with address spaces:
  https://clang.llvm.org/docs/LanguageExtensions.html#memory-references-to-specified-segments

Add the __seg_fs and __seg_gs macros for compatibility with GCC.

<rdar://problem/52944935>

Subscribers: jkorous, dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64676

llvm-svn: 366028
2019-07-14 18:33:51 +00:00
Sylvestre Ledru 21a92a8a55 This reverts commit 632a36bfcfc8273c1861f04ff6758d863c47c784.
Some targets such as Python 2.7.16 still use VERSION in
their builds. Without VERSION defined, the source code
has syntax errors.

Reverting as it will probably break many other things.

Noticed by Sterling Augustine

llvm-svn: 365992
2019-07-13 06:27:35 +00:00
Sylvestre Ledru 603580216f Remove __VERSION__
Summary:
It has been introduced in 2011 for gcc compat:
ad1a4c6e89
it is probably time to remove it


Reviewers: rnk, dexonsmith

Reviewed By: rnk

Subscribers: dschuff, aheejin, fedor.sergeev, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64062

llvm-svn: 365962
2019-07-12 21:45:08 +00:00
Ulrich Weigand b98bf60ef7 [SystemZ] Add support for new cpu architecture - arch13
This patch series adds support for the next-generation arch13
CPU architecture to the SystemZ backend.

This includes:
- Basic support for the new processor and its features.
- Support for low-level builtins mapped to new LLVM intrinsics.
- New high-level intrinsics in vecintrin.h.
- Indicate support by defining  __VEC__ == 10303.

Note: No currently available Z system supports the arch13
architecture.  Once new systems become available, the
official system name will be added as supported -march name.

llvm-svn: 365933
2019-07-12 18:14:51 +00:00
Fangrui Song c46d78d1b7 [X86][PowerPC] Support -mlong-double-128
This patch makes the driver option -mlong-double-128 available for X86
and PowerPC. The CC1 option -mlong-double-128 is available on all targets
for users to test on unsupported targets.

On PowerPC, -mlong-double-128 uses the IBM extended double format
because we don't support -mabi=ieeelongdouble yet (D64283).

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D64277

llvm-svn: 365866
2019-07-12 02:32:15 +00:00
Yaxun Liu 6add24adaf [HIP] Add GPU arch gfx1010, gfx1011, and gfx1012
Differential Revision: https://reviews.llvm.org/D64364

llvm-svn: 365799
2019-07-11 17:50:09 +00:00
Reid Kleckner 8777df5270 De-templatize non-dependent VS macro logic, NFC
These macro definitions don't depend on the template parameter, so they
don't need to be part of the template. Move them to a .cpp file.

llvm-svn: 365556
2019-07-09 20:57:28 +00:00
Stanislav Mekhanoshin 0cfd75a07d [AMDGPU] gfx908 clang target
Differential Revision: https://reviews.llvm.org/D64430

llvm-svn: 365528
2019-07-09 18:19:00 +00:00
Fangrui Song 04615341e4 [ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled code
In gcc PowerPC, long double has 3 mangling schemes:

-mlong-double-64: `e`
-mlong-double-128 -mabi=ibmlongdouble: `g`
-mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`)

The current useFloat128ManglingForLongDouble() bisection is not suitable
when we support -mlong-double-128 in clang (D64277). Replace
useFloat128ManglingForLongDouble() with getLongDoubleMangling() and
getFloat128Mangling() to allow 3 mangling schemes.

I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin
support has gone: https://reviews.llvm.org/D50988).

For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC.
The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277.

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D64276

llvm-svn: 365480
2019-07-09 13:32:26 +00:00
Fangrui Song 11cb39c5fc [X86][PPC] Support -mlong-double-64
-mlong-double-64 is supported on some ports of gcc (i386, x86_64, and ppc{32,64}).
On many other targets, there will be an error:

    error: unrecognized command line option '-mlong-double-64'

This patch makes the driver option -mlong-double-64 available for x86
and ppc. The CC1 option -mlong-double-64 is available on all targets for
users to test on unsupported targets.

LongDoubleSize is added as a VALUE_LANGOPT so that the option can be
shared with -mlong-double-128 when we support it in clang.

Also, make powerpc*-linux-musl default to use 64-bit long double. It is
currently the only supported ABI on musl and is also how people
configure powerpc*-linux-musl-gcc.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D64067

llvm-svn: 365412
2019-07-09 00:27:43 +00:00
Alex Bradbury 77d4a8f9f7 [RISCV] Specify registers used for exception handling
Implements the handling of __builtin_eh_return_regno().

Differential Revision: https://reviews.llvm.org/D63417
Patch by Edward Jones.

llvm-svn: 365305
2019-07-08 09:38:06 +00:00
Fangrui Song 1f333562de [PowerPC] Support constraint code "ww"
Summary:
"ww" and "ws" are both constraint codes for VSX vector registers that
hold scalar double data. "ww" is preferred for float while "ws" is
preferred for double.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D64119

llvm-svn: 365106
2019-07-04 04:44:42 +00:00
Simon Pilgrim a372bb21c3 Fix MSVC "signed/unsigned mismatch" warning. NFCI.
Fixes PR42426.

llvm-svn: 365019
2019-07-03 10:26:28 +00:00
Fangrui Song 7264a474b7 Change std::{lower,upper}_bound to llvm::{lower,upper}_bound or llvm::partition_point. NFC
llvm-svn: 365006
2019-07-03 08:13:17 +00:00
Yaxun Liu d325eb3b56 Fix build failure due to missing break
llvm-svn: 364380
2019-06-26 03:33:03 +00:00
Simon Tatham e8de8ba6a6 [ARM] Support inline assembler constraints for MVE.
"To" selects an odd-numbered GPR, and "Te" an even one. There are some
8.1-M instructions that have one too few bits in their register fields
and require registers of particular parity, without necessarily using
a consecutive even/odd pair.

Also, the constraint letter "t" should select an MVE q-register, when
MVE is present. This didn't need any source changes, but some extra
tests have been added.

Reviewers: dmgreen, samparker, SjoerdMeijer

Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D60709

llvm-svn: 364331
2019-06-25 16:49:32 +00:00
Matt Arsenault fc84925208 AMDGPU: Fix target builtins for gfx10
This wasn't setting some of the features from older generations.

llvm-svn: 364123
2019-06-22 01:30:00 +00:00
Richard Smith 979ae80af7 PR42301: Abort cleanly if we encounter a huge source file rather than
crashing.

Ideally we wouldn't care about the size of a file so long as it fits in
memory, but in practice we have lots of hardocded assumptions that
unsigned can be used to index files, string literals, and so on.

llvm-svn: 364103
2019-06-21 20:46:22 +00:00
Lewis Revill af22e071ca [RISCV] Mark TLS as supported
Inform Clang that TLS is implemented by LLVM for RISC-V

Differential Revision: https://reviews.llvm.org/D57055

llvm-svn: 363776
2019-06-19 08:53:46 +00:00
Rainer Orth abccb1ad89 Clang :: Sema/wchar.c has long been failing on Solaris:
error: 'error' diagnostics expected but not seen: 
    File /vol/llvm/src/clang/local/test/Sema/wchar.c Line 22: initializing wide char array with non-wide string literal
  error: 'error' diagnostics seen but not expected: 
    File /vol/llvm/src/clang/local/test/Sema/wchar.c Line 20: array initializer must be an initializer list
    File /vol/llvm/src/clang/local/test/Sema/wchar.c Line 22: array initializer must be an initializer list

It turns out the definition is wrong, as can be seen in GCC's gcc/config/sol2.h:

  /* wchar_t is called differently in <wchar.h> for 32 and 64-bit
     compilations.  This is called for by SCD 2.4.1, p. 6-83, Figure 6-65
     (32-bit) and p. 6P-10, Figure 6.38 (64-bit).  */
  
  #undef WCHAR_TYPE
  #define WCHAR_TYPE (TARGET_64BIT ? "int" : "long int")

The following patch implements this, and at the same time corrects the wint_t
definition which is the same:

  /* Same for wint_t.  See SCD 2.4.1, p. 6-83, Figure 6-66 (32-bit).  There's
     no corresponding 64-bit definition, but this is what Solaris 8
     <iso/wchar_iso.h> uses.  */
  
  #undef WINT_TYPE
  #define WINT_TYPE (TARGET_64BIT ? "int" : "long int")

Clang :: Preprocessor/wchar_t.c and Clang :: Sema/format-strings.c need to
be adjusted to account for that.

Tested on i386-pc-solaris2.11, x86_64-pc-solaris2.11, and x86_64-pc-linux-gnu.

Differential Revision: https://reviews.llvm.org/D62944

llvm-svn: 363612
2019-06-17 20:21:25 +00:00
George Burgess IV 2c074bb39e [Targets] Move soft-float-abi filtering to `initFeatureMap`
ARM has a special target feature called soft-float-abi. This feature is
special, since we get it passed to us explicitly in the frontend, but
filter it out before it can land in any target feature strings in LLVM
IR.

__attribute__((target(""))) doesn't quite filter these features out
properly, so today, we get warnings about soft-float-abi being an
unknown feature from the backend.

This CL has us filter soft-float-abi out at a slightly different point,
so we don't end up passing these invalid features to the backend.

Differential Revision: https://reviews.llvm.org/D61750

llvm-svn: 363346
2019-06-14 00:35:17 +00:00
Stanislav Mekhanoshin cafccd7a53 [AMDGPU] gfx1011/gfx1012 clang support
Differential Revision: https://reviews.llvm.org/D63308

llvm-svn: 363345
2019-06-14 00:33:59 +00:00
Lewis Revill 5665ef3dcc [RISCV] Add inline asm constraints I, J & K for RISC-V
This allows the constraints I, J & K to be used in inline asm for
RISC-V, with the following semantics (equivalent to GCC):

I: Any 12-bit signed immediate.
J: Integer zero only.
K: Any 5-bit unsigned immediate.

See the GCC definitions here:
https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html

Differential Revision: https://reviews.llvm.org/D54091

llvm-svn: 363055
2019-06-11 12:44:01 +00:00
Craig Topper 8e1f3a0538 [X86] Attempt to make the Intel core CPU inheritance a little more readable and maintainable
The recently added cooperlake CPU has made our already ugly switch statement even worse. There's a CPU exclusion list around the bf16 feature in the cooper lake block. I worry that we'll have to keep adding new CPUs to that until bf16 intercepts a client space CPU. We have several other exclusion lists in other parts of the switch due to skylakeserver, cascadelake, and cooperlake not having sgx. Another for cannonlake not having clwb but having all other features from skx.

This removes all these special ifs at the cost of some duplication of features and a goto. I've copied all of the skx features into either cannonlake or icelakeclient(for clwb). And pulled sklyakeserver, cascadelake, and cooperlake out of the main inheritance chain into their own chain. At the end of skylakeserver we merge back into the main chain at skylakeclient but below sgx. I think this is at least easier to follow.

Differential Revision: https://reviews.llvm.org/D63018

llvm-svn: 362965
2019-06-10 16:59:28 +00:00
David Green 5482315a73 [ARM] Add ACLE feature macros for MVE.
Fixup uninitialised variable.

llvm-svn: 362814
2019-06-07 17:28:12 +00:00
Sjoerd Meijer 4ea248eb56 [ARM] Add ACLE feature macros for MVE
If MVE is present at all, then the macro __ARM_FEATURE_MVE is defined
to a value which has bit 0 set for integer MVE, and bit 1 set for
floating-point MVE.

(Floating-point MVE implies integer MVE, so if this macro is defined
at all then it will be set to 1 or 3, never 2.)

Patch mostly by Simon Tatham

Differential Revision: https://reviews.llvm.org/D60710

llvm-svn: 362806
2019-06-07 15:20:56 +00:00
Simon Tatham 5d66f2b0af [ARM] Fix bugs introduced by the fp64/d32 rework.
Change D60691 caused some knock-on failures that weren't caught by the
existing tests. Firstly, selecting a CPU that should have had a
restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs
and no double precision) could give the unrestricted version, because
`ARM::getFPUFeatures` returned a list of features including subtracted
ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw
away all the ones that didn't start with `+`. Secondly, the
preprocessor macros didn't reliably match the actual compilation
settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as
if hardware FP was available, because the list of features on the cc1
command line would include things like `+vfp4`,`-vfp4d16` and clang
didn't realise that one of those cancelled out the other.

I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so
that it returns a list that enables every FP-related feature
compatible with the selected FPU and disables every feature not
compatible, which is more verbose but means clang doesn't have to
understand the dependency relationships between the backend features.
Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all
the various forms of the FP feature names, so that it won't miss cases
where it should have set `HW_FP` to feed into feature test macros.

That in turn caused an ordering problem when handling `-mcpu=foo+bar`
together with `-mfpu=something_that_turns_off_bar`. To fix that, I've
arranged that the `+bar` suffixes on the end of `-mcpu` and `-march`
cause feature names to be put into a separate vector which is
concatenated after the output of `getFPUFeatures`.

Another side effect of all this is to fix a bug where `clang -target
armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even
though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was
because `HW_FP` was being set to a value including only the `FPARMV8`
bit, but that feature test macro was testing only the `VFP4FPU` bit.
Now `HW_FP` ends up with all the bits set, so it gives the right
answer.

Changes to tests included in this patch:

* `arm-target-features.c`: I had to change basically all the expected
  results. (The Cortex-M4 test in there should function as a
  regression test for the accidental double-precision bug.)
* `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG`
  everywhere so that those tests are no longer sensitive to the order
  of cc1 feature options on the command line.
* `arm-acle-6.5.c`: been updated to expect the right answer to that
  FMA test.
* `Preprocessor/arm-target-features.c`: added a regression test for
  the `mfpu=softvfp` issue.

Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne

Reviewed By: ostannard

Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62998

llvm-svn: 362791
2019-06-07 12:42:54 +00:00
Pengfei Wang 30bcda86db [X86] -march=cooperlake (clang)
Support intel -march=cooperlake in clang

Patch by Shengchen Kan (skan)

Differential Revision: https://reviews.llvm.org/D62835

llvm-svn: 362781
2019-06-07 08:53:37 +00:00
Pengfei Wang 3a29f7c99c [X86] Add ENQCMD instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Patch by Tianqing Wang (tianqing)

Differential Revision: https://reviews.llvm.org/D62282

llvm-svn: 362685
2019-06-06 08:28:42 +00:00
Pengfei Wang cc3629d545 [X86] Add VP2INTERSECT instructions
Support intel AVX512 VP2INTERSECT instructions in clang

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D62367

llvm-svn: 362196
2019-05-31 06:09:35 +00:00
Sjoerd Meijer 24f12711ae [ARM] Add CLI support for Armv8.1-M and MVE
Given the existing infrastructure in LLVM side for +fp and +fp.dp,
this is more or less trivial, needing only one tiny source change and
a couple of tests.

Patch by Simon Tatham.

Differential Revision: https://reviews.llvm.org/D60699

llvm-svn: 362096
2019-05-30 14:22:26 +00:00
Simon Tatham 760df47b77 [ARM] Replace fp-only-sp and d16 with fp64 and d32.
Those two subtarget features were awkward because their semantics are
reversed: each one indicates the _lack_ of support for something in
the architecture, rather than the presence. As a consequence, you
don't get the behavior you want if you combine two sets of feature
bits.

Each SubtargetFeature for an FP architecture version now comes in four
versions, one for each combination of those options. So you can still
say (for example) '+vfp2' in a feature string and it will mean what
it's always meant, but there's a new string '+vfp2d16sp' meaning the
version without those extra options.

A lot of this change is just mechanically replacing positive checks
for the old features with negative checks for the new ones. But one
more interesting change is that I've rearranged getFPUFeatures() so
that the main FPU feature is appended to the output list *before*
rather than after the features derived from the Restriction field, so
that -fp64 and -d32 can override defaults added by the main feature.

Reviewers: dmgreen, samparker, SjoerdMeijer

Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D60691

llvm-svn: 361845
2019-05-28 16:13:20 +00:00
Craig Topper a85c0fd918 [X86] Split multi-line chained assignments into single lines to avoid making clang-format create triangle shaped indentation. Simplify one if statement to remove a bunch of string matches. NFCI
We had an if statement that checked over every avx512* feature to see if it should enabled avx512f. Since they are all prefixed with avx512 just check for that instead.

llvm-svn: 361557
2019-05-23 21:34:36 +00:00
Thomas Lively eafe8ef6f2 [WebAssembly] Add multivalue and tail-call target features
Summary:
These features will both be implemented soon, so I thought I would
save time by adding the boilerplate for both of them at the same time.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62047

llvm-svn: 361516
2019-05-23 17:26:47 +00:00
Sven van Haastregt e518bb4311 [OpenCL] Support pipe keyword in C++ mode
Support the OpenCL C pipe feature in C++ for OpenCL mode, to preserve
backwards compatibility with OpenCL C.

Various changes had to be made in Parse and Sema to enable
pipe-specific diagnostics, so enable a SemaOpenCL test for C++.

Differential Revision: https://reviews.llvm.org/D62181

llvm-svn: 361382
2019-05-22 13:12:20 +00:00
Fangrui Song f69c992485 [PPC64] Fix PPC64TargetInfo ABI on clang side after D61950
llvm-svn: 361365
2019-05-22 09:26:46 +00:00
Fangrui Song 091aaa69d3 [PPC64] Fix PPC64TargetInfo after D61950
llvm-svn: 361363
2019-05-22 09:17:21 +00:00
Fangrui Song 1c61471ab1 [PPC64] Parse -elfv1 -elfv2 when specified on target triple
Summary:
For big-endian powerpc64, the default ABI is ELFv1. OpenPower ABI ELFv2 is supported when -mabi=elfv2 is specified. FreeBSD support for PowerPC64 ELFv2 ABI with LLVM is in progress[1]. This patch adds an alternative way to specify ELFv2 ABI on target triple [2].

The following results are expected:

ELFv1 when using:
-target powerpc64-unknown-freebsd12.0
-target powerpc64-unknown-freebsd12.0 -mabi=elfv1
-target powerpc64-unknown-freebsd12.0-elfv1

ELFv2 when using:
-target powerpc64-unknown-freebsd12.0 -mabi=elfv2
-target powerpc64-unknown-freebsd12.0-elfv2

[1] https://wiki.freebsd.org/powerpc/llvm-elfv2
[2] https://clang.llvm.org/docs/CrossCompilation.html

Patch by Alfredo Dal'Ava Júnior!

Differential Revision: https://reviews.llvm.org/D61950

llvm-svn: 361355
2019-05-22 07:29:59 +00:00
Alexandre Ganea 047e65db77 [DebugInfo] Don't emit checksums when compiling a preprocessed CPP
Fixes PR41215

Differential Revision: https://reviews.llvm.org/D60283

llvm-svn: 361296
2019-05-21 19:40:28 +00:00
Javed Absar 603a2bac05 [ARM][CMSE] Add commandline option and feature macro
Defines macro ARM_FEATURE_CMSE to 1 for v8-M targets and introduces
-mcmse option which for v8-M targets sets ARM_FEATURE_CMSE to 3.
A diagnostic is produced when the option is given on architectures
without support for Security Extensions.
Reviewed By: dmgreen, snidertm
Differential Revision: https://reviews.llvm.org/D59879

llvm-svn: 361261
2019-05-21 14:21:26 +00:00
Craig Topper 20040db9a6 [X86] Stop implicitly enabling avx512vl when avx512bf16 is enabled.
Previously we were doing this so that the 256 bit selectw builtin could be used in the implementation of the 512->256 bit conversion intrinsic.

After this commit we now use a masked convert builtin that will emit the intrinsic call and the 256-bit select from custom code in CGBuiltin. Then the header only needs to call that one intrinsic.

llvm-svn: 360924
2019-05-16 18:28:17 +00:00
Xing Xue 6dc363ecc1 Add AIX Version Macros
Summary:
- This patch checks the AIX version and defines the appropriate macros.
- Follow up to a comment on D59048.

Author: andusy

Reviewers: hubert.reinterpretcast, jasonliu, sfertile, xingxue

Reviewed By: sfertile

Subscribers: jsji, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61530

llvm-svn: 360900
2019-05-16 14:22:37 +00:00
Stanislav Mekhanoshin 91792f1b93 [AMDGPU] gfx1010 clang target
Differential Revision: https://reviews.llvm.org/D61875

llvm-svn: 360634
2019-05-13 23:15:59 +00:00
Nikolai Kosjar 3c28a2dc6b [Preamble] Stop circular inclusion of main file when building preamble
If a header file was processed for the second time, we could end up with a
wrong conditional stack and skipped ranges:

In the particular example, if the header guard is evaluated the second time and
it is decided to skip the conditional block, the corresponding "#endif" is
never seen since the preamble does not include it and we end up in the
Tok.is(tok::eof) case with a wrong conditional stack.

Detect the circular inclusion, emit a diagnostic and stop processing the
inclusion.

llvm-svn: 360418
2019-05-10 10:25:35 +00:00
Akira Hatanaka c39a243da6 Assume `__cxa_allocate_exception` returns an under-aligned memory on
Darwin if the version of libc++abi isn't new enough to include the fix
in r319123

This patch resurrects r264998, which was committed to work around a bug
in libc++abi that was causing _cxa_allocate_exception to return a memory
that wasn't double-word aligned.

http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20160328/154332.html

In addition, this patch makes clang issue a warning if the type of the
thrown object requires an alignment that is larger than the minimum
guaranteed by the target C++ runtime.

rdar://problem/49864414

Differential Revision: https://reviews.llvm.org/D61667

llvm-svn: 360404
2019-05-10 02:16:37 +00:00
Owen Pan d064c71802 [clang] Fix a bug that reports UTF32 (LE) files as UTF16 (LE) ones
Also fix a typo for the SCSU byte order mark.

Differential Revision: https://reviews.llvm.org/D61628

llvm-svn: 360256
2019-05-08 13:49:17 +00:00
David Blaikie 89e58ddb28 -frewrite-imports: Add support for wildcard rules in umbrella modules with
This trips over a few other limitations, but in the interests of incremental development I'm starting here & I'll look at the issues with -verify and filesystem checks (the fact that the behavior depends on the existence of a 'foo' directory even though it shouldn't need it), etc.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D61656

llvm-svn: 360195
2019-05-07 21:38:51 +00:00
Eric Christopher e2b7332d2d Fix typo in risc-v register aliases.
Patch by John.

Differential Revision: https://reviews.llvm.org/D61464

llvm-svn: 360104
2019-05-07 00:45:47 +00:00
Luo, Yuanke 844f662932 Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper Lake
Summary:
1. Enable infrastructure of AVX512_BF16, which is supported for BFLOAT16 in Cooper Lake;
2. Enable intrinsics for VCVTNE2PS2BF16, VCVTNEPS2BF16 and DPBF16PS instructions, which are Vector Neural Network Instructions supporting BFLOAT16 inputs and conversion instructions from IEEE single precision.
For more details about BF16 intrinsic, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Patch by LiuTianle

Reviewers: craig.topper, smaslov, LuoYuanke, wxiao3, annita.zhang, spatel, RKSimon

Reviewed By: craig.topper

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60552

llvm-svn: 360018
2019-05-06 08:25:11 +00:00
Tom Tan b7c6d95af5 [COFF, ARM64] Align global symbol by size for ARM64 MSVC ABI
According to alignment section in below ARM64 ABI document, MSVC could increase
alignment of global data based on its total size. Clang doesn't do this. Compile
the same symbol into different alignments by Clang and MSVC could cause link
error because some instruction encodings, like 64-bit LDR/STR with immediate,
require the target to be 8 bytes aligned, and linker could choose code stream
with such LDR/STR instruction from MSVC and 4 bytes aligned data from Clang into
final image, which actually cannot be linked together
(see https://bugs.llvm.org/show_bug.cgi?id=41506 for more details).

https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#alignment

Differential Revision: https://reviews.llvm.org/D61225

llvm-svn: 359744
2019-05-02 00:38:14 +00:00
Yaxun Liu 4469701207 AMDGPU: Enable _Float16
llvm-svn: 359594
2019-04-30 18:35:37 +00:00
Vitaly Buka ae01981d03 [AArch64] Initialize HasMTE
llvm-svn: 359366
2019-04-27 02:40:01 +00:00
Javed Absar 18b0c40bc5 [AArch64] Add support for MTE intrinsics
This provides intrinsics support for Memory Tagging Extension (MTE),
which was introduced with the Armv8.5-a architecture.
These intrinsics are available when __ARM_FEATURE_MEMORY_TAGGING is defined.
Each intrinsic is described in detail in the ACLE Q1 2019 documentation:
https://developer.arm.com/docs/101028/latest
Reviewed By: Tim Nortover, David Spickett
Differential Revision: https://reviews.llvm.org/D60485

llvm-svn: 359348
2019-04-26 21:08:11 +00:00
Yonghong Song 51a4a0d68f [BPF] do not generate predefined macro bpf
"DefineStd(Builder, "bpf", Opts)" generates the following three
macros:
  bpf
  __bpf
  __bpf__
and the macro "bpf" is due to the fact that the target language
is C which allows GNU extensions.

The name "bpf" could be easily used as variable name or type
field name. For example, in current linux kernel, there are
four places where bpf is used as a field name. If the corresponding
types are included in bpf program, the compilation error will
occur.

This patch removed predefined macro "bpf" as well as "__bpf" which
is rarely used if used at all.

Signed-off-by: Yonghong Song <yhs@fb.com>

Differential Revision: https://reviews.llvm.org/D61173

llvm-svn: 359310
2019-04-26 15:35:51 +00:00
Artem Belevich 5fe85a003f [CUDA] Implemented _[bi]mma* builtins.
These builtins provide access to the new integer and
sub-integer variants of MMA (matrix multiply-accumulate) instructions
provided by CUDA-10.x on sm_75 (AKA Turing) GPUs.

Also added a feature for PTX 6.4. While Clang/LLVM does not generate
any PTX instructions that need it, we still need to pass it through to
ptxas in order to be able to compile code that uses the new 'mma'
instruction as inline assembly (e.g used by NVIDIA's CUTLASS library
https://github.com/NVIDIA/cutlass/blob/master/cutlass/arch/mma.h#L101)

Differential Revision: https://reviews.llvm.org/D60279

llvm-svn: 359248
2019-04-25 22:28:09 +00:00
Eric Fiselier add16a8da9 [Builtins] Implement __builtin_is_constant_evaluated for use in C++2a
Summary:
This patch implements `__builtin_is_constant_evaluated` as specifier by [P0595R2](https://wg21.link/p0595r2). It is built on the back of Bill Wendling's work for `__builtin_constant_p()`.

More tests to come, but early feedback is appreciated.

I plan to implement warnings for common mis-usages like those belowe in a following patch:
```
void foo(int x) {
  if constexpr (std::is_constant_evaluated())) { // condition is always `true`. Should use plain `if` instead.
   foo_constexpr(x);
  } else {
    foo_runtime(x);
  }
}
```



Reviewers: rsmith, MaskRay, bruno, void

Reviewed By: rsmith

Subscribers: dexonsmith, zoecarver, fdeazeve, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D55500

llvm-svn: 359067
2019-04-24 02:23:30 +00:00
Harlan Haskins eec3c0f9e3 [FileSystemStatCache] Return std::error_code from stat cache methods
Summary:
Previously, we would return true/false signifying if the cache/lookup
succeeded or failed. Instead, provide clients with the underlying error
that was thrown while attempting to look up in the cache.

Since clang::FileManager doesn't make use of this information, it discards the
error that's received and casts away to bool.

This change is NFC.

Reviewers: benlangmuir, arphaman

Subscribers: dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60735

llvm-svn: 358509
2019-04-16 17:34:26 +00:00
Richard Smith 8af8b8611c [C++20] Implement context-sensitive header-name lexing and pp-import parsing in the preprocessor.
llvm-svn: 358231
2019-04-11 21:18:23 +00:00
Stanislav Mekhanoshin 1d9f286ecb [AMDGPU] rename vi-insts into gfx8-insts
Differential Revision: https://reviews.llvm.org/D60293

llvm-svn: 357792
2019-04-05 18:25:00 +00:00
Nico Weber 04347d848d Make SourceManager::createFileID(UnownedTag, ...) take a const llvm::MemoryBuffer*
Requires making the llvm::MemoryBuffer* stored by SourceManager const,
which in turn requires making the accessors for that return const
llvm::MemoryBuffer*s and updating all call sites.

The original motivation for this was to use it and fix the TODO in
CodeGenAction.cpp's ConvertBackendLocation() by using the UnownedTag
version of createFileID, and since llvm::SourceMgr* hands out a const
llvm::MemoryBuffer* this is required. I'm not sure if fixing the TODO
this way actually works, but this seems like a good change on its own
anyways.

No intended behavior change.

Differential Revision: https://reviews.llvm.org/D60247

llvm-svn: 357724
2019-04-04 21:06:41 +00:00
Alon Zakai b4f9991f38 [WebAssembly] Add Emscripten OS definition + small_printf
The Emscripten OS provides a definition of __EMSCRIPTEN__, and also that it
supports iprintf optimizations.

Also define small_printf optimizations, which is a printf with float support
but not long double (which in wasm can be useful since long doubles are 128
bit and force linking of float128 emulation code). This part is based on
sunfish's https://reviews.llvm.org/D57620 (which can't land yet since
the WASI integration isn't ready yet).

Differential Revision: https://reviews.llvm.org/D60167

llvm-svn: 357552
2019-04-03 01:08:35 +00:00
Simon Pilgrim 4bad9c2170 Fix Wimplicit-fallthrough warning introduced in rL357466. NFCI.
llvm-svn: 357467
2019-04-02 11:25:38 +00:00
Strahinja Petrovic 4f839ac188 [PowerPC] Fix issue with inline asm - soft float mode
This patch prevents floating point register
constraints in soft float mode.

Differential Revision: https://reviews.llvm.org/D59310

llvm-svn: 357466
2019-04-02 11:00:09 +00:00
Fangrui Song 75e74e077c Range-style std::find{,_if} -> llvm::find{,_if}. NFC
llvm-svn: 357359
2019-03-31 08:48:19 +00:00
Thomas Lively 5f0c4c67bb [WebAssembly] Add mutable globals feature
Summary:
This feature is not actually used for anything in the WebAssembly
backend, but adding it allows users to get it into the target features
sections of their objects, which makes these objects
future-compatible.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, jdoerfert, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D60013

llvm-svn: 357321
2019-03-29 22:00:18 +00:00
Alexey Bataev e04483ee35 [OPENMP]Initial support for 'allocate' clause.
Added parsing/sema analysis of the allocate clause.

llvm-svn: 357068
2019-03-27 14:14:31 +00:00
Craig Topper 7339e61b89 [X86] Correct the value of MaxAtomicInlineWidth for pre-586 cpus
Use the new cx8 feature flag that was added to the backend to represent support for cmpxchg8b. Use this flag to set the MaxAtomicInlineWidth.

This also assumes all the cmpxchg instructions are enabled for CK_Generic which is what cc1 defaults to when nothing is specified.

Differential Revision: https://reviews.llvm.org/D59566

llvm-svn: 356709
2019-03-21 20:36:08 +00:00
Craig Topper f2f139e9ef [X86] Use the CPUKind enum from PROC_ALIAS to directly get the CPUKind in fillValidCPUList.
We were using getCPUKind which translates the string to the enum also using PROC_ALIAS. This just cuts out the string compares.

llvm-svn: 356686
2019-03-21 17:33:20 +00:00
Craig Topper 140f766f14 [X86] Remove getCPUKindCanonicalName which is unused.
Differential Revision: https://reviews.llvm.org/D59578

llvm-svn: 356580
2019-03-20 17:26:51 +00:00
Craig Topper dfa0fdbde0 [X86] Separate PentiumPro and i686. They aren't aliases in the backend.
PentiumPro has HasNOPL set in the backend. i686 does not.

Despite having a function that looks like it canonicalizes alias names. It
doesn't seem to be called. So I don't think this is a functional change. But its
good to be consistent between the backend and frontend.

llvm-svn: 356537
2019-03-20 07:31:18 +00:00
Michael Liao 3c2aadbe67 [AMDGPU] Add the missing clang change of the experimental buffer fat pointer
llvm-svn: 356385
2019-03-18 18:11:37 +00:00
Jason Liu 7f7867b05a Reland the rest of "Add AIX Target Info"
llvm-svn 356197 relanded previously failing test case max_align.c.
This commit will reland the rest of llvm-svn 356060 commit.

Differential Revision: https://reviews.llvm.org/D59048

llvm-svn: 356208
2019-03-14 21:54:30 +00:00
Craig Topper bee966d163 [X86] Only define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 in 64-bit mode.
Summary:
This define should correspond to CMPXCHG16B being available which requires 64-bit mode.

I checked and gcc also seems to only define this in 64-bit mode.

Reviewers: RKSimon, spatel, efriedma, jyknight, jfb

Reviewed By: jfb

Subscribers: jfb, cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D59287

llvm-svn: 356118
2019-03-14 05:45:42 +00:00
Erik Pilkington 02886e5476 Revert "Add a new attribute, fortify_stdlib"
This reverts commit r353765. After talking with our c stdlib folks, we decided
to use the existing pass_object_size attribute to implement _FORTIFY_SOURCE
wrappers, like Bionic does (I didn't realize that pass_object_size could be used
for this purpose). Sorry for the flip/flop, and thanks to James Y. Knight for
pointing this out to me.

llvm-svn: 356103
2019-03-13 21:37:01 +00:00
Jason Liu e62ccefe44 Revert "Add AIX Target Info"
This reverts commit 4e192d0e1e.
The newly added test case max_align.c do not work on all platforms.

original llvm-svn: 356060

llvm-svn: 356070
2019-03-13 17:57:23 +00:00
Jason Liu 4e192d0e1e Add AIX Target Info
Summary:
A first pass over platform-specific properties of the C API/ABI
on AIX for both 32-bit and 64-bit modes.
This is a continuation of D18360 by Andrew Paprocki and further work by Wu Zhao.

Patch by Andus Yu

Reviewers: apaprocki, chandlerc, hubert.reinterpretcast, jasonliu,
xingxue, sfertile

Reviewed by: hubert.reinterpretcast, apaprocki, sfertile

Differential Revision: https://reviews.llvm.org/D59048

llvm-svn: 356060
2019-03-13 16:02:26 +00:00
Craig Topper d02c9f59ff [X86] Remove 'cx16' from 'prescott' and 'yonah' as they are 32-bit only CPUs and cmpxchg16b requires 64-bit mode.
llvm-svn: 356008
2019-03-13 05:14:52 +00:00
Alexey Bataev 9cc10fc926 [OPENMP 5.0]Initial support for 'allocator' clause.
Added parsing/sema analysis/serialization/deserialization for the
'allocator' clause of the 'allocate' directive.

llvm-svn: 355952
2019-03-12 18:52:33 +00:00
Duncan P. N. Exon Smith 8bef5cd49a Modules: Rename MemoryBufferCache to InMemoryModuleCache
Change MemoryBufferCache to InMemoryModuleCache, moving it from Basic to
Serialization.  Another patch will start using it to manage module build
more explicitly, but this is split out because it's mostly mechanical.

Because of the move to Serialization we can no longer abuse the
Preprocessor to forward it to the ASTReader.  Besides the rename and
file move, that means Preprocessor::Preprocessor has one fewer parameter
and ASTReader::ASTReader has one more.

llvm-svn: 355777
2019-03-09 17:33:56 +00:00
Michael Platings 308e82eceb [IR][ARM] Add function pointer alignment to datalayout
Use this feature to fix a bug on ARM where 4 byte alignment is
incorrectly assumed.

Differential Revision: https://reviews.llvm.org/D57335

llvm-svn: 355685
2019-03-08 10:44:06 +00:00
Mitch Phillips 92dd321a14 Rollback of rL355585.
Introduces memory leak in FunctionTest.GetPointerAlignment that breaks sanitizer buildbots:

```
=================================================================
==2453==ERROR: LeakSanitizer: detected memory leaks

Direct leak of 128 byte(s) in 1 object(s) allocated from:
    #0 0x610428 in operator new(unsigned long) /b/sanitizer-x86_64-linux-bootstrap/build/llvm/projects/compiler-rt/lib/asan/asan_new_delete.cc:105
    #1 0x16936bc in llvm::User::operator new(unsigned long) /b/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/User.cpp:151:19
    #2 0x7c3fe9 in Create /b/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/IR/Function.h:144:12
    #3 0x7c3fe9 in (anonymous namespace)::FunctionTest_GetPointerAlignment_Test::TestBody() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/unittests/IR/FunctionTest.cpp:136
    #4 0x1a836a0 in HandleExceptionsInMethodIfSupported<testing::Test, void> /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc
    #5 0x1a836a0 in testing::Test::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2474
    #6 0x1a85c55 in testing::TestInfo::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2656:11
    #7 0x1a870d0 in testing::TestCase::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2774:28
    #8 0x1aa5b84 in testing::internal::UnitTestImpl::RunAllTests() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:4649:43
    #9 0x1aa4d30 in HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool> /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc
    #10 0x1aa4d30 in testing::UnitTest::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:4257
    #11 0x1a6b656 in RUN_ALL_TESTS /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/include/gtest/gtest.h:2233:46
    #12 0x1a6b656 in main /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/UnitTestMain/TestMain.cpp:50
    #13 0x7f5af37a22e0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x202e0)

Indirect leak of 40 byte(s) in 1 object(s) allocated from:
    #0 0x610428 in operator new(unsigned long) /b/sanitizer-x86_64-linux-bootstrap/build/llvm/projects/compiler-rt/lib/asan/asan_new_delete.cc:105
    #1 0x151be6b in make_unique<llvm::ValueSymbolTable> /b/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/ADT/STLExtras.h:1349:29
    #2 0x151be6b in llvm::Function::Function(llvm::FunctionType*, llvm::GlobalValue::LinkageTypes, unsigned int, llvm::Twine const&, llvm::Module*) /b/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/Function.cpp:241
    #3 0x7c4006 in Create /b/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/IR/Function.h:144:16
    #4 0x7c4006 in (anonymous namespace)::FunctionTest_GetPointerAlignment_Test::TestBody() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/unittests/IR/FunctionTest.cpp:136
    #5 0x1a836a0 in HandleExceptionsInMethodIfSupported<testing::Test, void> /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc
    #6 0x1a836a0 in testing::Test::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2474
    #7 0x1a85c55 in testing::TestInfo::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2656:11
    #8 0x1a870d0 in testing::TestCase::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:2774:28
    #9 0x1aa5b84 in testing::internal::UnitTestImpl::RunAllTests() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:4649:43
    #10 0x1aa4d30 in HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool> /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc
    #11 0x1aa4d30 in testing::UnitTest::Run() /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/src/gtest.cc:4257
    #12 0x1a6b656 in RUN_ALL_TESTS /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/googletest/include/gtest/gtest.h:2233:46
    #13 0x1a6b656 in main /b/sanitizer-x86_64-linux-bootstrap/build/llvm/utils/unittest/UnitTestMain/TestMain.cpp:50
    #14 0x7f5af37a22e0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x202e0)

SUMMARY: AddressSanitizer: 168 byte(s) leaked in 2 allocation(s).
```

See http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/11358/steps/check-llvm%20asan/logs/stdio for more information.

Also introduces use-of-uninitialized-value in ConstantsTest.FoldGlobalVariablePtr:
```
==7070==WARNING: MemorySanitizer: use-of-uninitialized-value
    #0 0x14e703c in User /b/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/IR/User.h:79:5
    #1 0x14e703c in Constant /b/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/IR/Constant.h:44
    #2 0x14e703c in llvm::GlobalValue::GlobalValue(llvm::Type*, llvm::Value::ValueTy, llvm::Use*, unsigned int, llvm::GlobalValue::LinkageTypes, llvm::Twine const&, unsigned int) /b/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/IR/GlobalValue.h:78
    #3 0x14e5467 in GlobalObject /b/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/IR/GlobalObject.h:34:9
    #4 0x14e5467 in llvm::GlobalVariable::GlobalVariable(llvm::Type*, bool, llvm::GlobalValue::LinkageTypes, llvm::Constant*, llvm::Twine const&, llvm::GlobalValue::ThreadLocalMode, unsigned int, bool) /b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/Globals.cpp:314
    #5 0x6938f1 in llvm::(anonymous namespace)::ConstantsTest_FoldGlobalVariablePtr_Test::TestBody() /b/sanitizer-x86_64-linux-fast/build/llvm/unittests/IR/ConstantsTest.cpp:565:18
    #6 0x1a240a1 in HandleExceptionsInMethodIfSupported<testing::Test, void> /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc
    #7 0x1a240a1 in testing::Test::Run() /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc:2474
    #8 0x1a26d26 in testing::TestInfo::Run() /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc:2656:11
    #9 0x1a2815f in testing::TestCase::Run() /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc:2774:28
    #10 0x1a43de8 in testing::internal::UnitTestImpl::RunAllTests() /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc:4649:43
    #11 0x1a42c47 in HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool> /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc
    #12 0x1a42c47 in testing::UnitTest::Run() /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/src/gtest.cc:4257
    #13 0x1a0dfba in RUN_ALL_TESTS /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/googletest/include/gtest/gtest.h:2233:46
    #14 0x1a0dfba in main /b/sanitizer-x86_64-linux-fast/build/llvm/utils/unittest/UnitTestMain/TestMain.cpp:50
    #15 0x7f2081c412e0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x202e0)
    #16 0x4dff49 in _start (/b/sanitizer-x86_64-linux-fast/build/llvm_build_msan/unittests/IR/IRTests+0x4dff49)

SUMMARY: MemorySanitizer: use-of-uninitialized-value /b/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/IR/User.h:79:5 in User
```

See http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/30222/steps/check-llvm%20msan/logs/stdio for more information.

llvm-svn: 355616
2019-03-07 18:13:39 +00:00
Alexey Bataev 25ed0c07c1 [OPENMP 5.0]Add initial support for 'allocate' directive.
Added parsing/sema analysis/serialization/deserialization support for
'allocate' directive.

llvm-svn: 355614
2019-03-07 17:54:44 +00:00
Ivan Donchevskii 878271b294 [libclang] Fix CXTranslationUnit_KeepGoing
Since
  commit 56f548bbbb7e4387a69708f70724d00e9e076153
  [modules] Round-trip -Werror flag through explicit module build.
the behavior of CXTranslationUnit_KeepGoing changed:
Unresolved #includes are fatal errors again. As a consequence, some
templates are not instantiated and lead to confusing errors.

Revert to the old behavior: With CXTranslationUnit_KeepGoing fatal
errors are mapped to errors.

Patch by Nikolai Kosjar.

Differential Revision: https://reviews.llvm.org/D58501

llvm-svn: 355586
2019-03-07 10:13:50 +00:00
Michael Platings fd4156ed4d [IR][ARM] Add function pointer alignment to datalayout
Use this feature to fix a bug on ARM where 4 byte alignment is
incorrectly assumed.

Differential Revision: https://reviews.llvm.org/D57335

llvm-svn: 355585
2019-03-07 09:15:23 +00:00
Mitch Phillips 318028f00f Revert "[IR][ARM] Add function pointer alignment to datalayout"
This reverts commit 2391bfca97.

This reverts rL355522 (https://reviews.llvm.org/D57335).

Kills buildbots that use '-Werror' with the following error:
	/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm/lib/IR/Value.cpp:657:7: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]

See buildbots http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/30200/steps/check-llvm%20asan/logs/stdio for more information.

llvm-svn: 355537
2019-03-06 19:17:18 +00:00
Michael Platings 2391bfca97 [IR][ARM] Add function pointer alignment to datalayout
Use this feature to fix a bug on ARM where 4 byte alignment is
incorrectly assumed.

Differential Revision: https://reviews.llvm.org/D57335

llvm-svn: 355522
2019-03-06 17:24:11 +00:00
Roman Lebedev 0457388125 [clang][OpenMP] Revert "OMPFlushClause is synthetic, no such clause exists"
Summary:
This reverts rL352390 / D57280.

As discussed in https://reviews.llvm.org/D57112#inline-506781,
'flush' clause does not exist in the OpenMP spec, it can not be
specified, and `OMPFlushClause` class is just a helper class.

Now, here's the caveat. I have read @ABataev's
> Well, I think it would be good to filter out OMPC_flush somehow
> because there is no such clause actually, it is a pseudo clause
> for better handling of the flush directive.
as if that clause is pseudo clause that only exists for the sole
purpose of simplifying the parser. As in, it never reaches AST.

I did not however try to verify that. Too bad, i was wrong.
It absolutely *does* reach AST. Therefore my understanding/justification
for the change was flawed, which makes the patch a regression which **must** be reverted.

@gribozavr has brought that up again in https://reviews.llvm.org/D57112#inline-521238

> > ...
> Sorry to be late for this discussion, but I don't think this conclusion
> follows. ASTMatchers are supposed to match the AST as it is.
> Even if OMPC_flush is synthetic, it exists in the AST, and users might
> want to match it. I think users would find anything else (trying to filter
> out AST nodes that are not in the source code) to be surprising. For example,
> there's a matcher materializeTemporaryExpr even though this AST node is a
> Clang invention and is not a part of the C++ spec.
>
> Matching only constructs that appear in the source code is not feasible with
> ASTMatchers, because they are based on Clang's AST that exposes tons of semantic
> information, and its design is dictated by the structure of the semantic information.
> See "RFC: Tree-based refactorings with Clang" in cfe-dev for a library that will
> focus on representing source code as faithfully as possible.
>
> Not to even mention that this code is in ASTTypeTraits, a general library for
> handling AST nodes, not specifically for AST Matchers...

Reviewers: gribozavr, ABataev, rjmccall, aaron.ballman

Reviewed By: gribozavr, ABataev

Subscribers: dylanmckay, guansong, arphaman, jdoerfert, cfe-commits, gribozavr, ABataev

Tags: #clang, #openmp

Differential Revision: https://reviews.llvm.org/D58979

llvm-svn: 355486
2019-03-06 07:45:10 +00:00
Leonard Chan 8f7caae00a [Fixed Point Arithmetic] Fixed Point and Integer Conversions
This patch includes the necessary code for converting between a fixed point type and integer.
This also includes constant expression evaluation for conversions with these types.

Differential Revision: https://reviews.llvm.org/D56900

llvm-svn: 355462
2019-03-06 00:28:43 +00:00
Harlan Haskins 06f64d53ae Replace clang::FileData with llvm::vfs::Status
Summary:
FileData was only ever used as a container for the values in
llvm::vfs::Status, so they might as well be consolidated.

The `InPCH` member was also always set to false, and unused.

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58924

llvm-svn: 355368
2019-03-05 02:27:12 +00:00
James Y Knight cf03bd92d6 Tweak r355278 for compatibility with gcc 6 and earlier.
llvm-svn: 355280
2019-03-02 21:55:36 +00:00
James Y Knight 1ce395f25e Tweak r355278 for compatibility with gcc 6 and earlier.
llvm-svn: 355279
2019-03-02 21:20:30 +00:00
James Y Knight 47c777fe41 Make the new SanitizerMask code added in r355190 constexpr.
Then, as a consequence, remove the complex set of workarounds for
initialization order -- which are apparently not 100% reliable.

The only downside is that some of the member functions are now
specific to kNumElem == 2, and will need to be updated if that
constant is increased in the future.

Unfortunately, the current code caused an initialization-order runtime
failure for me in some compilation modes. It appears that in a
toolchain without init-array enabled, the order of initialization of
static data members of a template can be reversed w.r.t. the order
within a file.

This caused e.g. SanitizerKind::CFI to be initialized to 0.

I'm not quite sure if that is an allowable ordering variation, or
nonconforming behavior, but in any case, making everything constexpr
eliminates the possibility of such an issue.

llvm-svn: 355278
2019-03-02 20:22:48 +00:00
Pierre Gousseau ae5303d010 [Driver] Allow enum SanitizerOrdinal to represent more than 64 different sanitizer checks, NFC.
enum SanitizerOrdinal has reached maximum capacity, this change extends the capacity to 128 sanitizer checks.
This can eventually allow us to add gcc 8's options "-fsanitize=pointer-substract" and "-fsanitize=pointer-compare".

This is a recommit of r354873 but with a fix for unqualified lookup error in lldb cmake build bot.

Fixes: https://llvm.org/PR39425

Differential Revision: https://reviews.llvm.org/D57914

llvm-svn: 355190
2019-03-01 10:05:15 +00:00
Fangrui Song 524b3c1810 Fix file headers. NFC
llvm-svn: 355176
2019-03-01 06:49:51 +00:00
Ganesh Gopalasubramanian 4f171d2761 [X86] AMD znver2 enablement
This patch enables the following

1) AMD family 17h "znver2" tune flag (-march, -mcpu).
2) ISAs that are enabled for "znver2" architecture.
3) For the time being, it uses the znver1 scheduler model.
4) Tests are updated.
5) This patch is the clang counterpart to D58343

Reviewers: craig.topper
Tags: #clang

Differential Revision: https://reviews.llvm.org/D58344

llvm-svn: 354899
2019-02-26 17:15:36 +00:00
Pierre Gousseau 40ad3d2aa4 revert r354873 as this breaks lldb builds.
llvm-svn: 354875
2019-02-26 13:50:29 +00:00
Pierre Gousseau 44fad947a5 [Driver] Allow enum SanitizerOrdinal to represent more than 64 different sanitizer checks, NFC.
enum SanitizerOrdinal has reached maximum capacity, this change extends the capacity to 128 sanitizer checks.
This can eventually allow us to add gcc 8's options "-fsanitize=pointer-substract" and "-fsanitize=pointer-compare".

Fixes: https://llvm.org/PR39425

Differential Revision: https://reviews.llvm.org/D57914

llvm-svn: 354873
2019-02-26 13:30:14 +00:00
Michael Kruse 0336c75c36 [OpenMP 5.0] Parsing/sema support for from clause with mapper modifier.
This patch implements the parsing and sema support for the OpenMP
'from'-clause with potential user-defined mappers attached.
User-defined mappers are a new feature in OpenMP 5.0. A 'from'-clause
can have an explicit or implicit associated mapper, which instructs the
compiler to generate and use customized mapping functions. An example is
shown below:

    struct S { int len; int *d; };
    #pragma omp declare mapper(id: struct S s) map(s, s.d[0:s.len])
    struct S ss;
    #pragma omp target update from(mapper(id): ss) // use the mapper with name 'id' to map ss from device

Contributed-by: Lingda Li <lildmh@gmail.com>

Differential Revision: https://reviews.llvm.org/D58638

llvm-svn: 354817
2019-02-25 20:34:15 +00:00
Richard Smith 10ab78e854 Enable coroutines under -std=c++2a.
llvm-svn: 354736
2019-02-23 21:06:26 +00:00
Michael Kruse 01f670df8f [OpenMP 5.0] Parsing/sema support for to clause with mapper modifier.
This patch implements the parsing and sema support for OpenMP to clause
with potential user-defined mappers attached. User defined mapper is a
new feature in OpenMP 5.0. A to/from clause can have an explicit or
implicit associated mapper, which instructs the compiler to generate and
use customized mapping functions. An example is shown below:

    struct S { int len; int *d; };
    #pragma omp declare mapper(id: struct S s) map(s, s.d[0:s.len])
    struct S ss;
    #pragma omp target update to(mapper(id): ss) // use the mapper with name 'id' to map ss to device

Contributed-by: <lildmh@gmail.com>

Differential Revision: https://reviews.llvm.org/D58523

llvm-svn: 354698
2019-02-22 22:29:42 +00:00
Jan Korous cd8607db2d Reland "[clang][FileManager] fillRealPathName even if we aren't opening the file"
This reverts commit e2bb3121fd.
+ fixed test for Windows

llvm-svn: 354291
2019-02-18 22:33:40 +00:00
Oliver Stannard e3c8ce8b75 [ARM] Add pre-defined macros for ROPI and RWPI
This adds ACLE-defined macros to test for code being compiled in the ROPI and
RWPI position-independence modes.

Differential revision: https://reviews.llvm.org/D23610

llvm-svn: 354265
2019-02-18 12:39:47 +00:00
Nirav Dave 91ecb69acd [X86] Prevent clang clobber checking for asm flag constraints.
Update getConstraintRegister as X86 Asm flag output constraints are no
longer fully alphanumeric,

llvm-svn: 354211
2019-02-17 03:53:23 +00:00
Reid Kleckner e2bb3121fd Revert r354075 "[clang][FileManager] fillRealPathName even if we aren't opening the file"
The new test doesn't pass on Windows.

llvm-svn: 354169
2019-02-15 20:48:12 +00:00
Reid Kleckner c1648f2bfd [MSVC] Recognize `static_assert` keyword in C and C++98
Summary:
The main effect is that clang now accepts the following conforming C11
code with MSVC headers:
  #include <assert.h>
  static_assert(1, "true");

This is a non-conforming extension (the keyword is outside the
implementer's namespace), so it is placed under -fms-compatibility
instead of -fms-extensions like most MSVC-specific keyword extensions.

Normally, in C11, the compiler is supposed to provide the _Static_assert
keyword, and assert.h should define static_assert to _Static_assert.
However, that is not what MSVC does, and MSVC doesn't even provide
_Static_assert.

This also has the less important side effect of enabling static_assert
in C++98 mode with -fms-compatibility. It's exceptionally difficult to
use modern MSVC headers without C++14 even, so this is relatively
unimportant.

Fixes PR26672

Patch by Andrey Bokhanko!

Reviewers: rsmith, thakis

Subscribers: cfe-commits, STL_MSFT

Differential Revision: https://reviews.llvm.org/D17444

llvm-svn: 354162
2019-02-15 19:59:45 +00:00
Jan Korous 85eb363d56 [clang][FileManager] fillRealPathName even if we aren't opening the file
The pathname wasn't previously filled when the getFile() method was called with openFile = false.
We are caching FileEntry-s in ParsedAST::Includes in clangd and this caused the problem.

This fixes an internal test failure in clangd - ClangdTests.GoToInclude.All

rdar://47536127

Differential Revision: https://reviews.llvm.org/D58213

llvm-svn: 354075
2019-02-14 23:02:35 +00:00
Nirav Dave 90868bb058 [X86] Add clang support for X86 flag output parameters.
Summary:
Add frontend support and expected flags for X86 inline assembly flag
parameters.

Reviewers: craig.topper, rnk, echristo

Subscribers: eraman, nickdesaulniers, void, llvm-commits

Differential Revision: https://reviews.llvm.org/D57394

llvm-svn: 354053
2019-02-14 19:27:25 +00:00
Hubert Tong 45195c873b [PowerPC] Stop defining _ARCH_PWR6X on POWER7 and up
Summary:
The predefined macro `_ARCH_PWR6X` is associated with GCC's
`-mcpu=power6x` option, which enables generation of P6 "raw mode"
instructions such as `mftgpr`.

Later POWER processors build upon the "architected mode", not the raw
one. `_ARCH_PWR6X` should not be defined for these later processors.

Fixes PR#40236.

Reviewers: echristo, hfinkel, kbarton, nemanjai, wschmidt

Reviewed By: hfinkel

Subscribers: jsji, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58128

llvm-svn: 353975
2019-02-13 20:17:13 +00:00
Simon Atanasyan 4c22a57414 [Headers][mips] Add `__attribute__((__mode__(__unwind_word__)))` to the _Unwind_Word / _Unwind_SWord definitions
The rationale of this change is to fix _Unwind_Word / _Unwind_SWord
definitions for MIPS N32 ABI. This ABI uses 32-bit pointers,
but _Unwind_Word and _Unwind_SWord types are eight bytes long.

 # The __attribute__((__mode__(__unwind_word__))) is added to the type
   definitions. It makes them equal to the corresponding definitions used
   by GCC and allows to override types using `getUnwindWordWidth` function.
 # The `getUnwindWordWidth` virtual function override in the `MipsTargetInfo`
   class and provides correct type size values.

Differential revision: https://reviews.llvm.org/D58165

llvm-svn: 353965
2019-02-13 18:27:09 +00:00
Erik Pilkington e3cd735ea6 Add a new attribute, fortify_stdlib
This attribute applies to declarations of C stdlib functions
(sprintf, memcpy...) that have known fortified variants
(__sprintf_chk, __memcpy_chk, ...). When applied, clang will emit
calls to the fortified variant functions instead of calls to the
defaults.

In GCC, this is done by adding gnu_inline-style wrapper functions,
but that doesn't work for us for variadic functions because we don't
support __builtin_va_arg_pack (and have no intention to).

This attribute takes two arguments, the first is 'type' argument
passed through to __builtin_object_size, and the second is a flag
argument that gets passed through to the variadic checking variants.

rdar://47905754

Differential revision: https://reviews.llvm.org/D57918

llvm-svn: 353765
2019-02-11 23:21:39 +00:00
Brad Smith 09699a7603 long double is double on OpenBSD/NetBSD/PPC.
Patch by George Koehler.

llvm-svn: 353656
2019-02-11 02:53:16 +00:00
Fangrui Song 9ac13a1244 Use llvm::is_contained. NFC
llvm-svn: 353635
2019-02-10 05:54:57 +00:00
Stanislav Mekhanoshin 1607a37308 [AMDGPU] Split dot-insts feature
Differential Revision: https://reviews.llvm.org/D57972

llvm-svn: 353588
2019-02-09 00:34:41 +00:00
Jiong Wang 862e7405e8 bpf: teach BPF driver about the new CPU "v3"
This patch simply teach BPF driver about the new CPU "v3" introduced in
LLVM backend.

Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 353479
2019-02-07 22:51:56 +00:00
Petr Hosek 23fdd5a37f [CMake] Unify scripts for generating VCS headers
Previously, there were two different scripts for generating VCS headers:
one used by LLVM and one used by Clang and lldb. They were both similar,
but different. They were both broken in their own ways, for example the
one used by Clang didn't properly handle monorepo resulting in an
incorrect version information reported by Clang.

This change unifies two the scripts by introducing a new script that's
used from both LLVM, Clang and lldb, ensures that the new script
supports both monorepo and standalone SVN and Git setups, and removes
the old scripts.

Differential Revision: https://reviews.llvm.org/D57063

llvm-svn: 353268
2019-02-06 03:51:00 +00:00
Heejin Ahn bab8597916 [WebAssembly] Add atomics target option
Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57798

llvm-svn: 353260
2019-02-06 01:41:26 +00:00
Artem Belevich 4071763bb8 Basic CUDA-10 support.
Differential Revision: https://reviews.llvm.org/D57771

llvm-svn: 353232
2019-02-05 22:38:58 +00:00
Alexey Bataev 1a9e05d7da [DEBUG_INFO][NVPTX] Generate correct data about variable address class.
Summary:
Added ability to generate correct debug info data about the variable
address class. Currently, for all the locals and globals the default
values are used, ADDR_local_space(6) for locals and ADDR_global_space(5)
for globals. The values are taken from the table in
  https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf.
  We need to emit correct data for address classes of, at least, shared
  and constant globals. Currently, all these variables are treated by
  the cuda-gdb debugger as the variables in the global address space
  and, thus, it require manual data type casting.

Reviewers: echristo, probinson

Subscribers: jholewinski, aprantl, cfe-commits

Differential Revision: https://reviews.llvm.org/D57162

llvm-svn: 353204
2019-02-05 19:45:57 +00:00
Michael Kruse 251e1488e1 [OpenMP 5.0] Parsing/sema support for "omp declare mapper" directive.
This patch implements parsing and sema for "omp declare mapper"
directive. User defined mapper, i.e., declare mapper directive, is a new
feature in OpenMP 5.0. It is introduced to extend existing map clauses
for the purpose of simplifying the copy of complex data structures
between host and device (i.e., deep copy). An example is shown below:

    struct S {  int len;  int *d; };
    #pragma omp declare mapper(struct S s) map(s, s.d[0:s.len]) // Memory region that d points to is also mapped using this mapper.

Contributed-by: Lingda Li <lildmh@gmail.com>

Differential Revision: https://reviews.llvm.org/D56326

llvm-svn: 352906
2019-02-01 20:25:04 +00:00
Yaxun Liu 277e064bf5 Do not copy long double and 128-bit fp format from aux target for AMDGPU
rC352620 caused regressions because it copied floating point format from
aux target.

floating point format decides whether extended long double is supported.
It is x86_fp80 on x86 but IEEE double on amdgcn.

Document usage of long doubel type in HIP programming guide 
https://github.com/ROCm-Developer-Tools/HIP/pull/890

Differential Revision: https://reviews.llvm.org/D57527

llvm-svn: 352801
2019-01-31 21:57:51 +00:00
Artem Belevich 8fa28a0db0 [CUDA] Propagate detected version of CUDA to cc1
..and use it to control that parts of CUDA compilation
that depend on the specific version of CUDA SDK.

This patch has a placeholder for a 'new launch API' support
which is in a separate patch. The list will be further
extended in the upcoming patch to support CUDA-10.1.

Differential Revision: https://reviews.llvm.org/D57487

llvm-svn: 352798
2019-01-31 21:32:24 +00:00
Thomas Lively 88058d4e1e [WebAssembly] Add bulk memory target feature
Summary: Also clean up some preexisting target feature code.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, jfb

Differential Revision: https://reviews.llvm.org/D57495

llvm-svn: 352793
2019-01-31 21:02:19 +00:00
Petr Hosek 12062e0667 Revert "[CMake] Unify scripts for generating VCS headers"
This reverts commits r352729 and r352731: this broke Sanitizer Windows bots

llvm-svn: 352733
2019-01-31 07:12:43 +00:00
Petr Hosek 0e712a766e [CMake] Unify scripts for generating VCS headers
Previously, there were two different scripts for generating VCS headers:
one used by LLVM and one used by Clang. They were both similar, but
different. They were both broken in their own ways, for example the one
used by Clang didn't properly handle monorepo resulting in an incorrect
version information reported by Clang.

This change unifies two the scripts by introducing a new script that's
used from both LLVM and Clang, ensures that the new script supports both
monorepo and standalone SVN and Git setups, and removes the old scripts.

Differential Revision: https://reviews.llvm.org/D57063

llvm-svn: 352729
2019-01-31 06:21:01 +00:00
Yaxun Liu 95f2ca541f [HIP] Fix size_t for MSVC environment
In 64 bit MSVC environment size_t is defined as unsigned long long.
In single source language like HIP, data layout should be consistent
in device and host compilation, therefore copy data layout controlling
fields from Aux target for AMDGPU target.

Differential Revision: https://reviews.llvm.org/D56318

llvm-svn: 352620
2019-01-30 12:26:54 +00:00
Richard Smith 018ab5fa6f Simplify and modernize this code a little.
No functionality change intended.

llvm-svn: 352593
2019-01-30 02:23:34 +00:00
James Y Knight 3f8b916698 Fix the behavior of clang's -w flag.
It is intended to disable _all_ warnings, even those upgraded to
errors via `-Werror=warningname` or `#pragma clang diagnostic error'

Fixes: https://llvm.org/PR38231
Differential Revision: https://reviews.llvm.org/D53199

llvm-svn: 352535
2019-01-29 19:33:48 +00:00
Roman Lebedev 23019f946d [clang][OpenMP] OMPFlushClause is synthetic, no such clause exists
Summary:
As discussed in https://reviews.llvm.org/D57112#inline-506781,
'flush' clause does not exist in the OpenMP spec, it can not be
specified, and `OMPFlushClause` class is just a helper class.

Therefore `OPENMP_CLAUSE()` in `clang/Basic/OpenMPKinds.def`
should not contain 'flush' "clause".

I have simply removed the `OPENMP_CLAUSE(flush, OMPFlushClause)`
from `clang/Basic/OpenMPKinds.def`, grepped for `OPENMP_CLAUSE`
and added `OPENMP_CLAUSE(flush, OMPFlushClause)` back to the **every**
place where `OPENMP_CLAUSE` is defined and `clang/Basic/OpenMPKinds.def`
is then included.

So as-is, this patch is a NFC. Possibly, some of these
`OPENMP_CLAUSE(flush, OMPFlushClause)` should be dropped,
i don't really know.

Test plan: `ninja check-clang`

Reviewers: ABataev

Reviewed By: ABataev

Subscribers: guansong, arphaman, cfe-commits

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D57280

llvm-svn: 352390
2019-01-28 17:04:11 +00:00
Erich Keane 1d1d438e8e Disable _Float16 for non ARM/SPIR Targets
As Discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2019-January/129543.html

There are problems exposing the _Float16 type on architectures that
haven't defined the ABI/ISel for the type yet, so we're temporarily
disabling the type and making it opt-in.

Differential Revision: https://reviews.llvm.org/D57188

Change-Id: I5db7366dedf1deb9485adb8948b1deb7e612a736
llvm-svn: 352221
2019-01-25 17:27:57 +00:00
Anton Korobeynikov 58f6bc509b [MSP430] Ajust f32/f64 alignment according to MSP430 EABI
Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D57015

llvm-svn: 352177
2019-01-25 08:51:53 +00:00
Dan Gohman c1eee1d659 [WebAssembly] Add a __wasi__ target macro
This adds a `__wasi__` macro for the wasi OS, similar to `__linux__` etc. for
other OS's.

Differential Revision: https://reviews.llvm.org/D57155

llvm-svn: 352105
2019-01-24 21:05:11 +00:00
Dan Gohman a957fa7e15 [WebAssembly] Support __float128
This enables support for the "__float128" keyword.

Differential Revision: https://reviews.llvm.org/D57154

llvm-svn: 352100
2019-01-24 20:33:28 +00:00
Sam McCall fa36120682 [FileManager] Revert r347205 to avoid PCH file-descriptor leak.
Summary:
r347205 fixed a bug in FileManager: first calling
getFile(shouldOpen=false) and then getFile(shouldOpen=true) results in
the file not being open.

Unfortunately, some code was (inadvertently?) relying on this bug: when
building with a PCH, the file entries are obtained first by passing
shouldOpen=false, and then later shouldOpen=true, without any intention
of reading them. After r347205, they do get unneccesarily opened.
Aside from extra operations, this means they need to be closed. Normally
files are closed when their contents are read. As these files are never
read, they stay open until clang exits. On platforms with a low
open-files limit (e.g. Mac), this can lead to spurious file-not-found
errors when building large projects with PCH enabled, e.g.
  https://bugs.chromium.org/p/chromium/issues/detail?id=924225

Fixing the callsites to pass shouldOpen=false when the file won't be
read is not quite trivial (that info isn't available at the direct
callsite), and passing shouldOpen=false is a performance regression (it
results in open+fstat pairs being replaced by stat+open).

So an ideal fix is going to be a little risky and we need some fix soon
(especially for the llvm 8 branch).
The problem addressed by r347205 is rare and has only been observed in
clangd. It was present in llvm-7, so we can live with it for now.

Reviewers: bkramer, thakis

Subscribers: ilya-biryukov, ioeric, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D57165

llvm-svn: 352079
2019-01-24 18:55:24 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Chandler Carruth 4a50956c07 Convert two more files that were using Windows line endings and remove
a stray single '\r' from one file. These are the last line ending issues
I can find in the files containing parts of LLVM's file headers.

llvm-svn: 351634
2019-01-19 06:36:08 +00:00
Johannes Doerfert ac991bbb44 Emit !callback metadata and introduce the callback attribute
With commit r351627, LLVM gained the ability to apply (existing) IPO
  optimizations on indirections through callbacks, or transitive calls.
  The general idea is that we use an abstraction to hide the middle man
  and represent the callback call in the context of the initial caller.
  It is described in more detail in the commit message of the LLVM patch
  r351627, the llvm::AbstractCallSite class description, and the
  language reference section on callback-metadata.

  This commit enables clang to emit !callback metadata that is
  understood by LLVM. It does so in three different cases:
    1) For known broker functions declarations that are directly
       generated, e.g., __kmpc_fork_call for the OpenMP pragma parallel.
    2) For known broker functions that are identified by their name and
       source location through the builtin detection, e.g.,
       pthread_create from the POSIX thread API.
    3) For user annotated functions that carry the "callback(callee, ...)"
       attribute. The attribute has to include the name, or index, of
       the callback callee and how the passed arguments can be
       identified (as many as the callback callee has). See the callback
       attribute documentation for detailed information.

Differential Revision: https://reviews.llvm.org/D55483

llvm-svn: 351629
2019-01-19 05:36:54 +00:00
Leonard Chan d3f3e16293 [Fixed Point Arithmetic] Fixed Point Addition Constant Expression Evaluation
This patch includes logic for constant expression evaluation of fixed point additions.

Differential Revision: https://reviews.llvm.org/D55868

llvm-svn: 351593
2019-01-18 21:04:25 +00:00
Nirav Dave 7503316d10 Revert "Clang side support for @cc assembly operands."
llvm-svn: 351561
2019-01-18 16:03:08 +00:00
Nirav Dave d410e392cd Clang side support for @cc assembly operands.
llvm-svn: 351559
2019-01-18 15:57:23 +00:00
Leonard Chan 86285d2e17 [Fixed Point Arithmetic] Add APFixedPoint to APValue
This adds APFixedPoint to the union of values that can be represented with an APValue.

Differential Revision: https://reviews.llvm.org/D56746

llvm-svn: 351368
2019-01-16 18:53:05 +00:00
Leonard Chan 2044ac89aa [Fixed Point Arithmetic] Fixed Point Addition
This patch covers addition between fixed point types and other fixed point
types or integers, using the conversion rules described in 4.1.4 of N1169.

Usual arithmetic rules do not apply to binary operations when one of the
operands is a fixed point type, and the result of the operation must be
calculated with the full precision of the operands, so we should not perform
any casting to a common type.

This patch does not include constant expression evaluation for addition of
fixed point types. That will be addressed in another patch since I think this
one is already big enough.

Differential Revision: https://reviews.llvm.org/D53738

llvm-svn: 351364
2019-01-16 18:13:59 +00:00
Dan Gohman 788ce374c4 [WebAssembly] COWS has been renamed to WASI.
llvm-svn: 351298
2019-01-16 05:23:57 +00:00
Craig Topper 5589738979 [Nios2] Remove Nios2 backend
As mentioned here http://lists.llvm.org/pipermail/llvm-dev/2019-January/129121.html This backend is incomplete and has not been maintained in several months.

Differential Revision: https://reviews.llvm.org/D56690

llvm-svn: 351230
2019-01-15 19:58:36 +00:00
Dan Gohman 055a6f0462 [WebAssembly] Support multilibs for wasm32 and add a wasm OS that uses it
This adds support for multilib paths for wasm32 targets, following
[Debian's Multiarch conventions], and also adds an experimental OS name in
order to test it. 

[Debian's Multiarch conventions]: https://wiki.debian.org/Multiarch/

Differential Revision: https://reviews.llvm.org/D56553

llvm-svn: 351164
2019-01-15 06:58:16 +00:00
Thomas Lively b7b9fdc114 [WebAssembly] Add unimplemented-simd128 feature, gate builtins
Summary: Depends on D56501. Also adds a macro define
`__wasm_unimplemented_simd128__` for feature detection of
unimplemented SIMD builtins.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, kristina, cfe-commits, rrwinterton
llvm-svn: 350909
2019-01-10 23:49:00 +00:00
Stanislav Mekhanoshin 6332f4d0d4 [AMDGPU] Separate feature dot-insts
Differential Revision: https://reviews.llvm.org/D56525

llvm-svn: 350794
2019-01-10 03:25:47 +00:00
Dan Albert 706b1f3aeb Android is not GNU, so don't claim that it is.
Reviewers: pirama, srhines

Reviewed By: srhines

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D55953

llvm-svn: 350664
2019-01-08 22:31:19 +00:00
Anastasia Stulova 4cebc9db04 [Basic] Extend DiagnosticEngine to store and format Qualifiers.
Qualifiers can now be streamed into the DiagnosticEngine using
regular << operator. If Qualifiers are empty 'unqualified' will
be printed in the diagnostic otherwise regular qual syntax is
used.

Differential Revision: https://reviews.llvm.org/D56198

llvm-svn: 350386
2019-01-04 11:50:36 +00:00
Alex Lorenz d92b1ae1d7 Remove stat cache chaining as it's no longer needed after PTH support has been
removed

Stat cache chaining was implemented for a StatListener in the PTH writer so that
it could write out the stat information to PTH. r348266 removed support for PTH,
and it doesn't seem like there are other uses of stat cache chaining. We can
remove the chaining support.

Differential Revision: https://reviews.llvm.org/D55455

llvm-svn: 349942
2018-12-21 19:33:09 +00:00
Michal Gorny 5a409d0e30 Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI]
Replace multiple comparisons of getOS() value with FreeBSD, NetBSD,
OpenBSD and DragonFly with matching isOS*BSD() methods.  This should
improve the consistency of coding style without changing the behavior.
Direct getOS() comparisons were left whenever used in switch or switch-
like context.

Differential Revision: https://reviews.llvm.org/D55916

llvm-svn: 349752
2018-12-20 13:09:30 +00:00
Bill Wendling aa77513bb9 Emit ASM input in a constant context
Summary:
Some ASM input constraints (e.g., "i" and "n") require immediate values. At O0,
very few code transformations are performed. So if we cannot resolve to an
immediate when emitting the ASM input we shouldn't delay its processing.

Reviewers: rsmith, efriedma

Reviewed By: efriedma

Subscribers: rehana, efriedma, craig.topper, jyknight, cfe-commits

Differential Revision: https://reviews.llvm.org/D55616

llvm-svn: 349561
2018-12-18 22:54:03 +00:00
Kelvin Li ef57943e3f [OPENMP] parsing and sema support for 'close' map-type-modifier
A map clause with the close map-type-modifier is a hint to 
prefer that the variables are mapped using a copy into faster 
memory.

Patch by Ahsan Saghir (saghir)

Differential Revision: https://reviews.llvm.org/D55719

llvm-svn: 349551
2018-12-18 22:18:41 +00:00
Saleem Abdulrasool d4f7d6a7a1 Basic: make `int_least64_t` and `int_fast64_t` match on Darwin
The Darwin targets use `int64_t` and `uint64_t` to define the `int_least64_t`
and `int_fast64_t` types.  The underlying type is actually a `long long`.  Match
the types to allow the printf specifiers to work properly and have the compiler
vended macros match the implementation on the target.

llvm-svn: 348939
2018-12-12 17:05:20 +00:00
Richard Trieu 6368818fd5 Move CodeGenOptions from Frontend to Basic
Basic uses CodeGenOptions and should not depend on Frontend.

llvm-svn: 348827
2018-12-11 03:18:39 +00:00
Fangrui Song d906e731ec ComputeLineNumbers: delete SSE2 vectorization
Summary:
SSE2 vectorization was added in 2012, but it is 2018 now and I can't
observe any performance boost (testing clang -E [all Sema/* CodeGen/* with proper -I options]) with the existing _mm_movemask_epi8+countTrailingZeros or the following SSE4.2 (compiling with -msse4.2):

  __m128i C = _mm_setr_epi8('\r','\n',0,0,0,0,0,0,0,0,0,0,0,0,0,0);
  _mm_cmpestri(C, 2, Chunk, 16, _SIDD_UBYTE_OPS | _SIDD_CMP_EQUAL_ANY | _SIDD_POSITIVE_POLARITY | _SIDD_LEAST_SIGNIFICANT)

Delete the vectorization to simplify the code.

Also simplify the code a bit and don't check the line ending sequence \n\r

Reviewers: bkramer, #clang

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55484

llvm-svn: 348777
2018-12-10 18:10:35 +00:00
Fangrui Song eae2b49fe3 SourceManager: insert(make_pair(..)) -> try_emplace. NFC
llvm-svn: 348709
2018-12-09 01:46:01 +00:00
Kang Zhang 9606d58a5f [PowerPC] VSX register support for inline assembly
Summary:
The patch is to add the VSX register support for inline assembly. After this 
patch, we can use VSX register in inline assembly clobber list without error.

Reviewed By: jsji,  nemanjai

Differential Revision: https://reviews.llvm.org/D55192

llvm-svn: 348572
2018-12-07 08:58:12 +00:00
Saleem Abdulrasool f587857c88 ARM, AArch64: support `__attribute__((__swiftcall__))`
Support the Swift calling convention on Windows ARM and AArch64.  Both
of these conform to the AAPCS, AAPCS64 calling convention, and LLVM has
been adjusted to account for the register usage.  Ensure that the
frontend passes this into the backend.  This allows the swift runtime to
be built for Windows.

llvm-svn: 348454
2018-12-06 03:28:37 +00:00
Krzysztof Parzyszek 85393b28f9 [Hexagon] Add support for Hexagon V66
llvm-svn: 348415
2018-12-05 21:38:35 +00:00
Bruno Ricci ac52954703 [Basic] Cleanups in IdentifierInfo following the removal of PTH
The Entry pointer in IdentifierInfo was only null for IdentifierInfo
created from a PTH. Now that PTH support has been removed we can remove
some PTH specific code in IdentifierInfo::getLength and
IdentifierInfo::getNameStart.

Also make the constructor of IdentifierInfo private to make sure that
they are only created by IdentifierTable, and move it to the header so
that it can be inlined in IdentifierTable::get and IdentifierTable::getOwn.

Differential Revision: https://reviews.llvm.org/D54866

Reviewed By: erichkeane

llvm-svn: 348384
2018-12-05 17:16:55 +00:00
Kristina Brooks 1051bb7463 [Haiku] Support __float128 for x86 and x86_64
This patch addresses a compilation error with clang when
running in Haiku being unable to compile code using
float128 (throws compilation error such as 'float128 is
not supported on this target').

Patch by kallisti5 (Alexander von Gluck IV)

Differential Revision: https://reviews.llvm.org/D54901

llvm-svn: 348368
2018-12-05 15:05:06 +00:00
Ulrich Weigand 88e0660bf2 [SystemZ] Do not support __float128
As of rev. 268898, clang supports __float128 on SystemZ.  This seems to
have been in error.  GCC has never supported __float128 on SystemZ,
since the "long double" type on the platform is already IEEE-128. (GCC
only supports __float128 on platforms where "long double" is some other
data type.)

For compatibility reasons this patch removes __float128 on SystemZ
again.  The test case is updated accordingly.

llvm-svn: 348247
2018-12-04 10:51:36 +00:00
Fangrui Song 2f55320741 [Basic] Move DiagnosticsEngine::dump from .h to .cpp
The two LLVM_DUMP_METHOD methods have a undefined reference on clang::DiagnosticsEngine::DiagStateMap::dump.

tools/clang/tools/extra/clangd/benchmarks/IndexBenchmark links in
clangDaemon but does not link in clangBasic explicitly, which causes a
linker error "undefined symbol" in !NDEBUG + -DBUILD_SHARED_LIBS=on builds.

Move LLVM_DUMP_METHOD methods to .cpp to fix IndexBenchmark. They should
be unconditionally defined as they are also used by non-dump-method #pragma clang __debug diag_mapping

llvm-svn: 348065
2018-12-01 01:43:05 +00:00
Kadir Cetinkaya e9870c0c91 [clang] Fill RealPathName for virtual files.
Summary:
Absolute path information for virtual files were missing even if we
have already stat'd the files. This patch puts that information for virtual
files that can succesffully be stat'd.

Reviewers: ilya-biryukov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55054

llvm-svn: 348006
2018-11-30 17:10:11 +00:00
Kristina Brooks 77a4adc4f9 Add Hurd target to Clang driver (2/2)
This adds Hurd toolchain support to Clang's driver in addition
to handling translating the triple from Hurd-compatible form to
the actual triple registered in LLVM.

(Phabricator was stripping the empty files from the patch so I 
manually created them)

Patch by sthibaul (Samuel Thibault)

Differential Revision: https://reviews.llvm.org/D54379

llvm-svn: 347833
2018-11-29 03:49:14 +00:00
Tatyana Krasnukha f8c264e02e [clang][ARC] Add ARCTargetInfo
Based-on-patch-by: Pete Couperus <petecoup@synopsys.com>

Differential Revision: https://reviews.llvm.org/D53100

llvm-svn: 347699
2018-11-27 19:52:10 +00:00
Craig Topper 5bb1bf6ff5 [X86] Add -march=cascadelake support in clang.
This is skylake-avx512 with the addition of avx512vnni ISA.

Patch by Jianping Chen

Differential Revision: https://reviews.llvm.org/D54792

llvm-svn: 347682
2018-11-27 18:05:14 +00:00
Sander de Smalen 44a2253a54 [AArch64] Add aarch64_vector_pcs function attribute to Clang
This is the Clang patch to complement the following LLVM patches:
  https://reviews.llvm.org/D51477
  https://reviews.llvm.org/D51479

More information describing the vector ABI and procedure call standard
can be found here:

https://developer.arm.com/products/software-development-tools/\
                          hpc/arm-compiler-for-hpc/vector-function-abi

Patch by Kerry McLaughlin.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D54425

llvm-svn: 347571
2018-11-26 16:38:37 +00:00
Sam McCall e84385fef8 [FileManager] getFile(open=true) after getFile(open=false) should open the file.
Summary:
Old behavior is to just return the cached entry regardless of opened-ness.
That feels buggy (though I guess nobody ever actually needed this).

This came up in the context of clangd+clang-tidy integration: we're
going to getFile(open=false) to replay preprocessor actions obscured by
the preamble, but the compilation may subsequently getFile(open=true)
for non-preamble includes.

Reviewers: ilya-biryukov

Subscribers: ioeric, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D54691

llvm-svn: 347205
2018-11-19 13:37:46 +00:00
Aaron Ballman c44c174246 Introduce the _Clang scoped attribute token.
Currently, we only accept clang as the scoped attribute identifier for double square bracket attributes provided by Clang, but this has the potential to conflict with user-defined macros. To help alleviate these concerns, this introduces the _Clang scoped attribute identifier as an alias for clang. It also introduces a warning with a fixit on the off chance someone attempts to use __clang__ as the scoped attribute (which is a predefined compiler identification macro).

llvm-svn: 346521
2018-11-09 17:19:45 +00:00
Patrick Lyster 7a2a27c4a4 Add support for 'atomic_default_mem_order' clause on 'requires' directive. Also renamed test files relating to 'requires'. Differntial review: https://reviews.llvm.org/D53513
llvm-svn: 345967
2018-11-02 12:18:11 +00:00
Reid Kleckner 4dc0b1ac60 Fix clang -Wimplicit-fallthrough warnings across llvm, NFC
This patch should not introduce any behavior changes. It consists of
mostly one of two changes:
1. Replacing fall through comments with the LLVM_FALLTHROUGH macro
2. Inserting 'break' before falling through into a case block consisting
   of only 'break'.

We were already using this warning with GCC, but its warning behaves
slightly differently. In this patch, the following differences are
relevant:
1. GCC recognizes comments that say "fall through" as annotations, clang
   doesn't
2. GCC doesn't warn on "case N: foo(); default: break;", clang does
3. GCC doesn't warn when the case contains a switch, but falls through
   the outer case.

I will enable the warning separately in a follow-up patch so that it can
be cleanly reverted if necessary.

Reviewers: alexfh, rsmith, lattner, rtrieu, EricWF, bollu

Differential Revision: https://reviews.llvm.org/D53950

llvm-svn: 345882
2018-11-01 19:54:45 +00:00
Reid Kleckner 14518f1d9b Add LLVM_FALLTHROUGH annotation after switch
This silences a -Wimplicit-fallthrough warning from clang. GCC does not
appear to warn when the case body ends in a switch.

This is a somewhat surprising but intended fallthrough that I pulled out
from my mechanical patch. The code intends to handle 'Yi' and related
constraints as the 'x' constraint.

llvm-svn: 345873
2018-11-01 18:53:02 +00:00
Li Jia He bbaedf2ba1 [Clang][PowerPC] Support constraint 'wi' in asm
From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

llvm-svn: 345809
2018-11-01 02:32:49 +00:00
Erik Pilkington a7641d97a7 NFC: Merge KEYOBJC and KEYARC
We used to only define ARC keywords in -fobjc-arc mode, but now that we define
them in ObjC mode, there isn't any reason to keep them seperate.

llvm-svn: 345646
2018-10-30 20:51:28 +00:00
Erik Pilkington fa98390b3c NFC: Remove the ObjC1/ObjC2 distinction from clang (and related projects)
We haven't supported compiling ObjC1 for a long time (and never will again), so
there isn't any reason to keep these separate. This patch replaces
LangOpts::ObjC1 and LangOpts::ObjC2 with LangOpts::ObjC.

Differential revision: https://reviews.llvm.org/D53547

llvm-svn: 345637
2018-10-30 20:31:30 +00:00
Bryan Chan 223307b3dc [AArch64] Implement FP16FML intrinsics
Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now).
Add two new type modifiers to NeonEmitter to handle the new prototypes.
Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the
intrinsics with the macro in arm_neon.h.

Based on a patch by Gao Yiling.

Differential Revision: https://reviews.llvm.org/D53633

llvm-svn: 345344
2018-10-25 23:47:00 +00:00
Erich Keane 19a8adc9bd Implement Function Multiversioning for Non-ELF Systems.
Similar to how ICC handles CPU-Dispatch on Windows, this patch uses the
resolver function directly to forward the call to the proper function.
This is not nearly as efficient as IFuncs of course, but is still quite
useful for large functions specifically developed for certain
processors.

This is unfortunately still limited to x86, since it depends on
__builtin_cpu_supports and __builtin_cpu_is, which are x86 builtins.

The naming for the resolver/forwarding function for cpu-dispatch was
taken from ICC's implementation, which uses the unmodified name for this
(no mangling additions).  This is possible, since cpu-dispatch uses '.A'
for the 'default' version.

In 'target' multiversioning, this function keeps the '.resolver'
extension in order to keep the default function keeping the default
mangling.

Change-Id: I4731555a39be26c7ad59a2d8fda6fa1a50f73284

Differential Revision: https://reviews.llvm.org/D53586

llvm-svn: 345298
2018-10-25 18:57:19 +00:00
Tim Renouf 632f35d495 Add gfx909 to GPU Arch
Subscribers: jholewinski, cfe-commits

Differential Revision: https://reviews.llvm.org/D53558

llvm-svn: 345198
2018-10-24 21:19:02 +00:00
Konstantin Zhuravlyov 06570954e2 AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMap
+ add required tests

llvm-svn: 345181
2018-10-24 19:07:56 +00:00
Aaron Ballman ad672ffb64 Support accepting __gnu__ as a scoped attribute namespace that aliases to gnu.
This is useful in libstdc++ to avoid clashes with identifiers in the user's namespace.

llvm-svn: 345132
2018-10-24 12:26:23 +00:00
Yaxun Liu 83b5f35d85 Add gfx904 and gfx906 to GPU Arch
Differential Revision: https://reviews.llvm.org/D53472

llvm-svn: 344996
2018-10-23 02:05:31 +00:00
Craig Topper 9ad1e8a93b [X86] Remove 'rtm' feature from KNL.
I'm unsure if KNL has this feature, but the backend never thought it did, only clang did. The predefined-arch-macros test lost the check for __RTM__ on KNL when it was removed Skylake CPUs in r344117.

I think we want to drop it from KNL for consistency with Skylake anyway regardless of how we got here.

llvm-svn: 344978
2018-10-23 00:15:37 +00:00
Krzysztof Parzyszek 57e6706e56 [Hexagon] Remove support for V4
llvm-svn: 344786
2018-10-19 15:36:45 +00:00
Eli Friedman 39ceea326d [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.
"aarch64-none-elf" is commonly used for AArch64 baremetal toolchains.

Differential Revision: https://reviews.llvm.org/D53348

llvm-svn: 344710
2018-10-17 21:07:11 +00:00
Ulrich Weigand 2927071750 [SystemZ] Actually enable -mzvector keywords
It appears when initially committing the support for the IBM Z vector
extension language, one critical line was lost, causing the specific
keywords __vector, __bool, and vec_step to not actually be enabled.
(Note that this does not affect "vector" and "bool"!)

Unfortunately, this was not caught by any tests either.  (All existing
Z vector tests just use the regular "vector" and "bool" keywords ...)

Fixed by adding the missing line and updating the tests.

llvm-svn: 344611
2018-10-16 14:57:20 +00:00
Simon Atanasyan db81c7b9c9 [mips] Fix handling of GNUABIN32 environment in a target triple
The `GNUABIN32` environment in a target triple implies using the N32
ABI. This patch adds support for this environment and switches on N32
ABI if necessary.

Patch by Patch by YunQiang Su.

Differential revision: https://reviews.llvm.org/D51464

llvm-svn: 344570
2018-10-15 22:43:23 +00:00
Patrick Lyster 3fe9e396f4 Add support for 'dynamic_allocators' clause on 'requires' directive. Differential Revision: https://reviews.llvm.org/D53079
llvm-svn: 344249
2018-10-11 14:41:10 +00:00
Jonas Devlieghere fc51490baf Lift VFS from clang to llvm (NFC)
This patch moves the virtual file system form clang to llvm so it can be
used by more projects.

Concretely the patch:
 - Moves VirtualFileSystem.{h|cpp} from clang/Basic to llvm/Support.
 - Moves the corresponding unit test from clang to llvm.
 - Moves the vfs namespace from clang::vfs to llvm::vfs.
 - Formats the lines affected by this change, mostly this is the result of
   the added llvm namespace.

RFC on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/126657.html

Differential revision: https://reviews.llvm.org/D52783

llvm-svn: 344140
2018-10-10 13:27:25 +00:00
Craig Topper 153b53adfa [X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz

This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.

Matches https://reviews.llvm.org/D53041

Patch by Thiago Macieira

Reviewers: erichkeane, craig.topper

Reviewed By: craig.topper

Subscribers: lebedev.ri, cfe-commits

Differential Revision: https://reviews.llvm.org/D53042

llvm-svn: 344117
2018-10-10 07:43:45 +00:00
Ali Tamur bc1cd929bf Introduce code_model macros
Summary:
gcc defines macros such as __code_model_small_ based on the user passed command line flag -mcmodel. clang accepts a flag with the same name and similar effects, but does not generate any macro that the user can use. This cl narrows the gap between gcc and clang behaviour.

However, achieving full compatibility with gcc is not trivial: The set of valid values for mcmodel in gcc and clang are not equal. Also, gcc defines different macros for different architectures. In this cl, we only tackle an easy part of the problem and define the macro only for x64 architecture. When the user does not specify a mcmodel, the macro for small code model is produced, as is the case with gcc.

Reviewers: compnerd, MaskRay

Reviewed By: MaskRay

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D52920

llvm-svn: 344000
2018-10-08 22:25:20 +00:00
Patrick Lyster 6bdf63bd32 [OPENMP] Add reverse_offload clause to requires directive
llvm-svn: 343711
2018-10-03 20:07:58 +00:00
Patrick Lyster 4a370b9f63 Add support for unified_shared_memory clause on requires directive
llvm-svn: 343472
2018-10-01 13:47:43 +00:00
Fangrui Song 1d38c13f6e Use the container form llvm::sort(C, ...)
There are a few leftovers of rC343147 that are not (\w+)\.begin but in
the form of ([-[:alnum:]>.]+)\.begin or spanning two lines. Change them
to use the container form in this commit. The 12 occurrences have been
inspected manually for safety.

llvm-svn: 343425
2018-09-30 21:41:11 +00:00
Craig Topper 6ad9220067 [X86] Add the movbe instruction intrinsics from icc.
These intrinsics exist in icc. They can be found on the Intel Intrinsics Guide website.

All the backend support is in place to pattern match a load+bswap or a bswap+store pattern to the MOVBE instructions. So we just need to get the frontend to emit the correct IR. The pointer arguments in icc are declared as void so I had to jump through a packed struct to forcing a specific alignment on the load/store. Same trick we use in the unaligned vector load/store intrinsics

Differential Revision: https://reviews.llvm.org/D52586

llvm-svn: 343343
2018-09-28 17:09:51 +00:00
Sam Parker d476cd304b [ARM] Prevent DSP and SIM32 being set for v6m
My previous change (rL340911) set the two features for architectures
>= 6, which wrongly includes v6m. Now set to >= 6 and not Cortex-M.

Differential Revision: https://reviews.llvm.org/D52644

llvm-svn: 343309
2018-09-28 10:18:02 +00:00
Fangrui Song 55fab260ca llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.

Reviewers: rsmith, #clang, dblaikie

Reviewed By: rsmith, #clang

Subscribers: mgrang, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D52576

llvm-svn: 343147
2018-09-26 22:16:28 +00:00
Oliver Stannard a30b48d020 [ARM/AArch64][v8.5A] Add Armv8.5-A target
This patch allows targetting Armv8.5-A from Clang. Most of the
implementation is in TargetParser, so this is mostly just adding tests.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52491

llvm-svn: 343111
2018-09-26 14:20:29 +00:00
Kelvin Li 1408f91a25 [OPENMP] Add support for OMP5 requires directive + unified_address clause
Add support for OMP5.0 requires directive and unified_address clause.
Patches to follow will include support for additional clauses.

Differential Revision: https://reviews.llvm.org/D52359

llvm-svn: 343063
2018-09-26 04:28:39 +00:00
Artem Belevich 44ecb0e3c2 [CUDA] Added basic support for compiling with CUDA-10.0
llvm-svn: 342924
2018-09-24 23:10:44 +00:00
Eric Liu 495847ad77 [VFS] Use llvm::StringMap instead of std::map. NFC
llvm-svn: 342889
2018-09-24 14:52:11 +00:00
Bruno Ricci 366ba73018 [AST] Various optimizations + refactoring in DeclarationName(Table)
Introduce the following optimizations in DeclarationName(Table):

 1. Store common kinds inline in DeclarationName instead of
    DeclarationNameExtra. Currently the kind of C++ constructor, destructor,
    conversion function and overloaded operator names is stored in
    DeclarationNameExtra. Instead store it inline in DeclarationName.
    To do this align IdentifierInfo, CXXSpecialName, DeclarationNameExtra
    and CXXOperatorIdName to 8 bytes so that we can use the lower 3 bits of
    DeclarationName::Ptr. This is already the case on 64 bits archs anyway.
    This also allow us to remove DeclarationNameExtra from CXXSpecialName
    and CXXOperatorIdName, which shave off a pointer from CXXSpecialName. 

 2. Synchronize the enumerations DeclarationName::NameKind,
    DeclarationName::StoredNameKind and Selector::IdentifierInfoFlag.
    This makes DeclarationName::getNameKind much more efficient since we can
    replace the switch table by a single comparison and an addition.

 3. Put the overloaded operator names inline in DeclarationNameTable to remove
    an indirection. This increase the size of DeclarationNameTable a little
    bit but this is not important since it is only used in ASTContext, and
    never copied nor moved from. This also get rid of the last dynamic
    allocation in DeclarationNameTable.

Altogether these optimizations cut the run time of parsing all of Boost by
about 0.8%. While we are at it, do the following NFC modifications:

 1. Put the internal classes CXXSpecialName, CXXDeductionGuideNameExtra,
    CXXOperatorIdName, CXXLiteralOperatorIdName and DeclarationNameExtra
    in a namespace detail since these classes are only meant to be used by
    DeclarationName and DeclarationNameTable. Make this more explicit by making
    the members of these classes private and friending DeclarationName(Table).

 2. Make DeclarationName::getFETokenInfo a non-template since every users are
    using it to get a void *. It was supposed to be used with a type to avoid
    a subsequent static_cast.

 3. Change the internal functions DeclarationName::getAs* to castAs* since when
    we use them we already know the correct kind. This has no external impact
    since all of these are private.

Reviewed By: erichkeane, rjmccall

Differential Revision: https://reviews.llvm.org/D52267

llvm-svn: 342729
2018-09-21 12:53:22 +00:00
Saleem Abdulrasool 6183c6316d Basic: correct `__WINT_TYPE__` on Windows
Windows uses `unsigned short` for `wint_t`.  Correct the type definition as
vended by the compiler.  This type is defined in corecrt.h and is
unconditionally typedef'ed.  cl does not have an equivalent to `__WINT_TYPE__`
which is why this was never detected.

llvm-svn: 342557
2018-09-19 16:18:55 +00:00
Bruno Cardoso Lopes e7240f024f [Modules] Add platform and environment features to requires clause
Allows module map writers to add build requirements based on
platform/os. This helps when target features and language dialects
aren't enough to conditionalize building a module, among other things,
it allow module maps for different platforms to live in the same file.

rdar://problem/43909745

Differential Revision: https://reviews.llvm.org/D51910

llvm-svn: 342499
2018-09-18 17:11:13 +00:00
Sam McCall 0ae00567ba [VFS] vfs::directory_iterator yields path and file type instead of full Status
Summary:
Most callers I can find are using only `getName()`. Type is used by the
recursive iterator.

Now we don't have to call stat() on every listed file (on most platforms).
Exceptions are e.g. Solaris where readdir() doesn't include type information.
On those platforms we'll still stat() - see D51918.

The result is significantly faster (stat() can be slow).
My motivation: this may allow us to improve clang IO on large TUs with long
include search paths. Caching readdir() results may allow us to skip many stat()
and open() operations on nonexistent files.

Reviewers: bkramer

Subscribers: fedor.sergeev, cfe-commits

Differential Revision: https://reviews.llvm.org/D51921

llvm-svn: 342232
2018-09-14 12:47:38 +00:00
Richard Smith 841dbda3ba When we leave a module header, make that header visible in its
includer's context, even if its overall module is unavailable.

llvm-svn: 342096
2018-09-12 23:09:23 +00:00
Erich Keane 7582222691 Move AESNI generation to Skylake and Goldmont
The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "Intel® AES New Instructions" "No".

This matches GCC commit
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html

[1] https://en.wikipedia.org/wiki/AES_instruction_set

Patch By: thiagomacieira
Differential Revision: https://reviews.llvm.org/D51510

llvm-svn: 341862
2018-09-10 21:12:21 +00:00
Eric Liu cea78e3a19 [VFS] Cache the current working directory for the real FS.
Reviewers: sammccall

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51641

llvm-svn: 341455
2018-09-05 09:45:27 +00:00
Ilya Biryukov d5554c512d Adding HardLink Support to VirtualFileSystem.
Summary:
Added support of creating a hardlink from one file to another file.
After a hardlink is added between two files, both file will have the same:
  1. UniqueID (inode)
  2. Size
  3. Buffer

This will bring replay of compilation closer to the actual compilation. There are instances where clang checks for the UniqueID of the file/header to be loaded which leads to a different behavior during replay as all files have different UniqueIDs.

Patch by Utkarsh Saxena!

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51359

llvm-svn: 341366
2018-09-04 14:15:53 +00:00
Stephen Kelly b8e0886006 Add dump() method for SourceRange
Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D50662

llvm-svn: 341140
2018-08-30 23:10:52 +00:00
Sam Parker 96d4872899 [ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
ARM_FEATURE_DSP is already set for targets with the +dsp feature. In
the backend, this target feature is also used to represent the
availability of the of the instructions that the ACLE guard through
the __ARM_FEATURE_SIMD32 macro. We don't have any cores that
implement one and not the other, so set this macro for cores later
than V6 or for Cortex-M cores that the target parser, or user, reports
that the 'dsp' instructions are supported.

Differential Revision: https://reviews.llvm.org/D51093

llvm-svn: 340911
2018-08-29 10:39:03 +00:00
Hans Wennborg b4278895a4 Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets."
As reported on http://lists.llvm.org/pipermail/cfe-dev/2018-August/058760.html,
this broke i386-freebsd11 due to its lack of atomic 64 bit primitives.

While that's not really this commit's fault, let's revert back to the old
behaviour until this can be fixed. This means generating cmpxchg8b etc for i386
and i486 which don't technically support those, but that's been the behaviour
for a long time, so a little longer probably doesn't hurt that much.

> Adjust MaxAtomicInlineWidth for i386/i486 targets.
>
> This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6.
> Currently, all  MaxAtomicInlineWidth of x86-32 targets are set to 64. However,
> i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg.
> So in this patch MaxAtomicInlineWidth is reset as follows:
> For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported.
> For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg.
> For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b.
>
> Differential Revision: https://reviews.llvm.org/D42154

llvm-svn: 340666
2018-08-24 22:46:33 +00:00
Eric Liu 8e44a8e7a0 Fix build bot after r340598.
Revert to the original behavior: only calculate real file path when
file is opened and avoid using InterndPath for real path calculation.

llvm-svn: 340602
2018-08-24 09:53:44 +00:00
Eric Liu 411e710074 [FileManager] Do not call 'real_path' in getFile().
Summary:
This partially rolls back the change in D48903:
89aa7f45a1 (diff-0025af005307891b5429b6a834823d5eR318)

`real_path` can be very expensive on real file systems, and calling it on each
opened file can slow down the compilation. This also slows down deserialized
ASTs for which real paths need to be recalculated for each input files again.

For clangd code completion latency (using preamble):
Before
{F7039629}
After
{F7039630}

Reviewers: ilya-biryukov, simark

Reviewed By: ilya-biryukov

Subscribers: kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51159

llvm-svn: 340598
2018-08-24 08:59:54 +00:00
Chandler Carruth ae0cafece8 [x86/retpoline] Split the LLVM concept of retpolines into separate
subtarget features for indirect calls and indirect branches.

This is in preparation for enabling *only* the call retpolines when
using speculative load hardening.

I've continued to use subtarget features for now as they continue to
seem the best fit given the lack of other retpoline like constructs so
far.

The LLVM side is pretty simple. I'd like to eventually get rid of the
old feature, but not sure what backwards compatibility issues that will
cause.

This does remove the "implies" from requesting an external thunk. This
always seemed somewhat questionable and is now clearly not desirable --
you specify a thunk the same way no matter which set of things are
getting retpolines.

I really want to keep this nicely isolated from end users and just an
LLVM implementation detail, so I've moved the `-mretpoline` flag in
Clang to no longer rely on a specific subtarget feature by that name and
instead to be directly handled. In some ways this is simpler, but in
order to preserve existing behavior I've had to add some fallback code
so that users who relied on merely passing -mretpoline-external-thunk
continue to get the same behavior. We should eventually remove this
I suspect (we have never tested that it works!) but I've not done that
in this patch.

Differential Revision: https://reviews.llvm.org/D51150

llvm-svn: 340515
2018-08-23 06:06:38 +00:00
Stefan Maksimovic eb63256095 [clang][mips] Set __mips_fpr correctly for -mfpxx
Set __mips_fpr to 0 if o32 ABI is used with either -mfpxx
or none of -mfp32, -mfpxx, -mfp64 being specified.

Introduce additional checks:
-mfpxx is only to be used in conjunction with the o32 ABI.
report an error when incompatible options are provided.

Formerly no errors were raised when combining n32/n64 ABIs
with -mfp32 and -mfpxx.

There are other cases when __mips_fpr should be set to 0
that are not covered, ex. using o32 on a mips64 cpu
which is valid but not supported in the backend as of yet.

Differential Revision: https://reviews.llvm.org/D50557

llvm-svn: 340391
2018-08-22 09:26:25 +00:00
Matt Arsenault b666e73dd9 AMDGPU: Move target code into TargetParser
llvm-svn: 340292
2018-08-21 16:13:29 +00:00
Matt Arsenault 89e833c662 AMDGPU: Correct errors in device table
llvm-svn: 339934
2018-08-16 20:19:47 +00:00
Stephen Kelly 3124ce724a Add a newline to SourceLocation dump output
Summary:
Migrate callers to print().

dump() should be useful to downstreams and third parties as a debugging
aid.  Everyone trips up on this and creates confusing output.

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D50661

llvm-svn: 339810
2018-08-15 20:32:06 +00:00
Matt Arsenault 45bc148093 AMDGPU: Fix enabling denormals by default on pre-VI targets
Fast FMAF is not a sufficient condition to enable denormals.
Before VI, enabling denormals caused F32 instructions to
run at F64 speeds.

llvm-svn: 339278
2018-08-08 17:48:37 +00:00
Volodymyr Sapsai c1bf7aad49 [NFC][VFS] Fix typos in comments.
llvm-svn: 339215
2018-08-08 01:28:37 +00:00
Volodymyr Sapsai 3aa88b5bd9 [VFS] Unify iteration code for VFSFromYamlDirIterImpl, NFC intended.
First and subsequent iteration steps are similar, capture this similarity.

Reviewers: bruno, benlangmuir

Reviewed By: bruno

Subscribers: dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D50118

llvm-svn: 339199
2018-08-07 23:00:40 +00:00
Volodymyr Sapsai 3b2f6a4b29 [VFS] Emit an error when entry at root level uses a relative path.
Entries with only a filename prevent us from building a file system tree and
cause the assertion

> Assertion failed: (NewParentE && "Parent entry must exist"), function uniqueOverlayTree, file clang/lib/Basic/VirtualFileSystem.cpp, line 1303.

Entries with a relative path are simply not discoverable during header search.

rdar://problem/28990865

Reviewers: bruno, benlangmuir

Reviewed By: bruno

Subscribers: dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D49518

llvm-svn: 339164
2018-08-07 19:05:41 +00:00
Matt Arsenault 31c895ecdf AMDGPU: Add builtin for s_dcache_wb
llvm-svn: 339110
2018-08-07 07:49:13 +00:00
Matt Arsenault 24f3924709 AMDGPU: Add builtin for s_dcache_inv_vol
llvm-svn: 339109
2018-08-07 07:49:04 +00:00
Simon Marchi ddbabc6b7c [VirtualFileSystem] InMemoryFileSystem::status: Return a Status with the requested name
Summary:
InMemoryFileSystem::status behaves differently than
RealFileSystem::status.  The Name contained in the Status returned by
RealFileSystem::status will be the path as requested by the caller,
whereas InMemoryFileSystem::status returns the normalized path.

For example, when requested the status for "../src/first.h",
RealFileSystem returns a Status with "../src/first.h" as the Name.
InMemoryFileSystem returns "/absolute/path/to/src/first.h".

The reason for this change is that I want to make a unit test in the
clangd testsuite (where we use an InMemoryFileSystem) to reproduce a
bug I get with the clangd program (where a RealFileSystem is used).
This difference in behavior "hides" the bug in the unit test version.

An indirect impact of this change is that a -Wnonportable-include-path
warning is now emitted in test PCH/case-insensitive-include.c.  This is
because the real path of the included file (with the wrong case) was not
available previously, whereas it is now.

Reviewers: malaperle, ilya-biryukov, bkramer

Reviewed By: ilya-biryukov

Subscribers: eric_niebler, malaperle, omtcyfz, hokein, bkramer, ilya-biryukov, ioeric, cfe-commits

Differential Revision: https://reviews.llvm.org/D48903

llvm-svn: 339063
2018-08-06 21:48:20 +00:00
Leonard Chan 7c4f4914e3 Fix for broken build on clang-hexagon-elf for ambiguous call to
std::abs.

llvm-svn: 339044
2018-08-06 19:31:00 +00:00
Benjamin Kramer 3f873eca26 [Fixed Point Arithmetic] Remove unused include.
lib/Basic cannot depend on lib/AST.

llvm-svn: 339031
2018-08-06 16:53:21 +00:00
Leonard Chan a677942d8a [Fixed Point Arithmetic] Fixed Point Constant
This patch proposes an abstract type that represents fixed point numbers, similar to APInt or APSInt that was discussed in https://reviews.llvm.org/D48456#inline-425585. This type holds a value, scale, and saturation and is meant to perform intermediate calculations on constant fixed point values.

Currently this class is used as a way for handling the conversions between fixed point numbers with different sizes and radixes. For example, if I'm casting from a signed _Accum to a saturated unsigned short _Accum, I will need to check the value of the signed _Accum to see if it fits into the short _Accum which involves getting and comparing against the max/min values of the short _Accum. The FixedPointNumber class currently handles the radix shifting and extension when converting to a signed _Accum.

Differential Revision: https://reviews.llvm.org/D48661

llvm-svn: 339028
2018-08-06 16:42:37 +00:00
Matt Arsenault c65f966d76 Try to make builtin address space declarations not useless
The way address space declarations for builtins currently work
is nearly useless. The code assumes the address spaces used for
builtins is a confusingly named "target address space" from user
code using __attribute__((address_space(N))) that matches
the builtin declaration. There's no way to use this to declare
a builtin that returns a language specific address space.
The terminology used is highly cofusing since it has nothing
to do with the the address space selected by the target to use
for a language address space.

This feature is essentially unused as-is. AMDGPU and NVPTX
are the only in-tree targets attempting to use this. The AMDGPU
builtins certainly do not behave as intended (i.e. all of the
builtins returning pointers can never compile because the numbered
address space never matches the expected named address space).

The NVPTX builtins are missing tests for some, and the others
seem to rely on an implicit addrspacecast.

Change the used address space for builtins based on a target
hook to allow using a language address space for a builtin.
This allows the same builtin declaration to be used for multiple
languages with similarly purposed address spaces (e.g. the same
AMDGPU builtin can be used in OpenCL and CUDA even though the
constant address spaces are arbitarily different).

This breaks the possibility of using arbitrary numbered
address spaces alongside the named address spaces for builtins.
If this is an issue we probably need to introduce another builtin
declaration character to distinguish language address spaces from
so-called "target address spaces".

llvm-svn: 338707
2018-08-02 12:14:28 +00:00
Pirama Arumuga Nainar b818347aa0 [Android] Increase default new alignment for Android
Summary:
Android's memory allocators also guarantee 8-byte alignment for 32-bit
architectures and 16-byte alignment for 64-bit.

Reviewers: rsmith

Subscribers: cfe-commits, srhines, enh

Differential Revision: https://reviews.llvm.org/D50112

llvm-svn: 338603
2018-08-01 17:55:34 +00:00
Sjoerd Meijer e6e4f3178c [AArch64][ARM] Add Armv8.4-A tests
This adds tests for Armv8.4-A, and also some v8.2 and v8.3 tests that were
missing.

Differential Revision: https://reviews.llvm.org/D50068

llvm-svn: 338525
2018-08-01 12:41:10 +00:00
Fangrui Song 6907ce2f8f Remove trailing space
sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h}

llvm-svn: 338291
2018-07-30 19:24:48 +00:00
Reid Kleckner 4d23f45a11 Revert r338057 "[VirtualFileSystem] InMemoryFileSystem::status: Return a Status with the requested name"
This broke clang/test/PCH/case-insensitive-include.c on Windows.

llvm-svn: 338084
2018-07-26 23:21:51 +00:00
Sanjin Sijaric 56391d6f84 [ARM64] [Windows] Follow MS X86_64 C++ ABI when passing structs
Summary: Microsoft's C++ object model for ARM64 is the same as that for X86_64.
For example, small structs with non-trivial copy constructors or virtual
function tables are passed indirectly.  Currently, they are passed in registers
when compiled with clang.

Reviewers: rnk, mstorsjo, TomTan, haripul, javed.absar

Reviewed By: rnk, mstorsjo

Subscribers: kristof.beyls, chrib, llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D49770

llvm-svn: 338076
2018-07-26 22:18:28 +00:00
Simon Marchi 9980c261df [VirtualFileSystem] InMemoryFileSystem::status: Return a Status with the requested name
Summary:

InMemoryFileSystem::status behaves differently than
RealFileSystem::status.  The Name contained in the Status returned by
RealFileSystem::status will be the path as requested by the caller,
whereas InMemoryFileSystem::status returns the normalized path.

For example, when requested the status for "../src/first.h",
RealFileSystem returns a Status with "../src/first.h" as the Name.
InMemoryFileSystem returns "/absolute/path/to/src/first.h".

The reason for this change is that I want to make a unit test in the
clangd testsuite (where we use an InMemoryFileSystem) to reproduce a
bug I get with the clangd program (where a RealFileSystem is used).
This difference in behavior "hides" the bug in the unit test version.

Reviewers: malaperle, ilya-biryukov, bkramer

Subscribers: cfe-commits, ioeric, ilya-biryukov, bkramer, hokein, omtcyfz

Differential Revision: https://reviews.llvm.org/D48903

llvm-svn: 338057
2018-07-26 18:55:02 +00:00
Jordan Rupprecht a8fb729786 Revert "[VFS] Cleanups to VFS interfaces."
This reverts commit r337834 due to test failures.

llvm-svn: 337850
2018-07-24 20:28:07 +00:00
Sam McCall 33b78c5d24 [VFS] Cleanups to VFS interfaces.
Summary:
- add comments clarifying semantics
- Status::copyWithNewName(Status, Name) --> instance method
- Status::copyWithNewName(fs::file_status, Name) --> constructor (it's not a copy)
- File::getName() -> getRealPath(), reflecting its actual behavior/function
  and stop returning status().getName() in the base class (callers can do this
  fallback if they want to, it complicates the contracts).

This is mostly NFC, but the behavior of File::getName() affects FileManager's
FileEntry::tryGetRealPathName(), which now fails in more cases:
 - non-real file cases
 - real-file cases where the underlying vfs::File was opened in a way that
   doesn't call realpath().
(In these cases we don't know a distinct real name, so in principle it seems OK)

Reviewers: klimek

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D49724

llvm-svn: 337834
2018-07-24 16:00:55 +00:00
Dan Gohman df07a35912 [WebAssembly] Change size_t to `unsigned long`.
Changing it to unsigned long (which is 32-bit on wasm32) makes it the same
type as wasm64 (where unsigned long is 64-bit), which would eliminate the most
common cause for mangled names being different between wasm32 and wasm64. For
example, export lists containing symbol names could now often be the same
between wasm32 and wasm64.

Differential Revision: https://reviews.llvm.org/D40526

llvm-svn: 337783
2018-07-24 00:29:58 +00:00
Erik Pilkington 7adcf292a1 NFC: Add the emacs c++ mode hint "-*- C++ -*-" to the headers that don't have it
https://llvm.org/docs/CodingStandards.html#file-headers

llvm-svn: 337780
2018-07-24 00:07:49 +00:00
Reid Kleckner dbc390d0c5 [MS] Update _MSVC_LANG values for C++17 and C++2a
Fixes PR38262

llvm-svn: 337715
2018-07-23 17:44:00 +00:00
Erich Keane 3efe00206f Implement cpu_dispatch/cpu_specific Multiversioning
As documented here: https://software.intel.com/en-us/node/682969 and
https://software.intel.com/en-us/node/523346. cpu_dispatch multiversioning
is an ICC feature that provides for function multiversioning.

This feature is implemented with two attributes: First, cpu_specific,
which specifies the individual function versions. Second, cpu_dispatch,
which specifies the location of the resolver function and the list of
resolvable functions.

This is valuable since it provides a mechanism where the resolver's TU
can be specified in one location, and the individual implementions
each in their own translation units.

The goal of this patch is to be source-compatible with ICC, so this
implementation diverges from the ICC implementation in a few ways:
1- Linux x86/64 only: This implementation uses ifuncs in order to
properly dispatch functions. This is is a valuable performance benefit
over the ICC implementation. A future patch will be provided to enable
this feature on Windows, but it will obviously more closely fit ICC's
implementation.
2- CPU Identification functions: ICC uses a set of custom functions to identify
the feature list of the host processor. This patch uses the cpu_supports
functionality in order to better align with 'target' multiversioning.
1- cpu_dispatch function def/decl: ICC's cpu_dispatch requires that the function
marked cpu_dispatch be an empty definition. This patch supports that as well,
however declarations are also permitted, since the linker will solve the
issue of multiple emissions.

Differential Revision: https://reviews.llvm.org/D47474

llvm-svn: 337552
2018-07-20 14:13:28 +00:00
Martin Storsjo 17c0f721b9 [AArch64] Define TARGET_HEADER_BUILTIN
Without it, the new intrinsics became available for all language
variants. This was missed in SVN r337327.

llvm-svn: 337352
2018-07-18 06:15:09 +00:00
Joerg Sonnenberger b79e61f8b3 Always use __mcount on NetBSD. Some platforms don't provide _mcount.
llvm-svn: 337277
2018-07-17 13:13:34 +00:00
Joerg Sonnenberger 68c0210fa6 By popular demand, switch in64_t on NetBSD/AArch64 and NetBSD/PowerPC64
to long for consistency with other 64bit platforms.

llvm-svn: 337271
2018-07-17 12:33:19 +00:00
Krzysztof Parzyszek 762dee516c [Hexagon] Diagnose intrinsics not supported by selected CPU/HVX
llvm-svn: 336933
2018-07-12 18:54:04 +00:00
Eric Liu b71e6f412f Revert "[VirtualFileSystem] InMemoryFileSystem::status: Return a Status with the requested name"
This reverts commit r336807. This breaks users of
ClangTool::mapVirtualFile. Will try to investigate a fix. See also the
discussion on https://reviews.llvm.org/D48903

llvm-svn: 336831
2018-07-11 18:43:07 +00:00
Simon Marchi a37ef291c8 [VirtualFileSystem] InMemoryFileSystem::status: Return a Status with the requested name
Summary:
InMemoryFileSystem::status behaves differently than
RealFileSystem::status.  The Name contained in the Status returned by
RealFileSystem::status will be the path as requested by the caller,
whereas InMemoryFileSystem::status returns the normalized path.

For example, when requested the status for "../src/first.h",
RealFileSystem returns a Status with "../src/first.h" as the Name.
InMemoryFileSystem returns "/absolute/path/to/src/first.h".

The reason for this change is that I want to make a unit test in the
clangd testsuite (where we use an InMemoryFileSystem) to reproduce a
bug I get with the clangd program (where a RealFileSystem is used).
This difference in behavior "hides" the bug in the unit test version.

In general, I guess it's good if InMemoryFileSystem works as much as
possible like RealFileSystem.

Doing so made the FileEntry::RealPathName value (assigned in
FileManager::getFile) wrong when using the InMemoryFileSystem.  That's
because it assumes that vfs::File::getName will always return the real
path.  I changed to to use FileSystem::getRealPath instead.

Subscribers: ilya-biryukov, ioeric, cfe-commits

Differential Revision: https://reviews.llvm.org/D48903

llvm-svn: 336807
2018-07-11 14:08:17 +00:00
Craig Topper 74c10e3236 [Builtins][Attributes][X86] Tag all X86 builtins with their required vector width. Add a min_vector_width function attribute and tag all x86 instrinsics with it
This is part of an ongoing attempt at making 512 bit vectors illegal in the X86 backend type legalizer due to CPU frequency penalties associated with wide vectors on Skylake Server CPUs. We want the loop vectorizer to be able to emit IR containing wide vectors as intermediate operations in vectorized code and allow these wide vectors to be legalized to 256 bits by the X86 backend even though we are targetting a CPU that supports 512 bit vectors. This is similar to what happens with an AVX2 CPU, the vectorizer can emit wide vectors and the backend will split them. We want this splitting behavior, but still be able to use new Skylake instructions that work on 256-bit vectors and support things like masking and gather/scatter.

Of course if the user uses explicit vector code in their source code we need to not split those operations. Especially if they have used any of the 512-bit vector intrinsics from immintrin.h. And we need to make it so that merely using the intrinsics produces the expected code in order to be backwards compatible.

To support this goal, this patch adds a new IR function attribute "min-legal-vector-width" that can indicate the need for a minimum vector width to be legal in the backend. We need to ensure this attribute is set to the largest vector width needed by any intrinsics from immintrin.h that the function uses. The inliner will be reponsible for merging this attribute when a function is inlined. We may also need a way to limit inlining in the future as well, but we can discuss that in the future.

To make things more complicated, there are two different ways intrinsics are implemented in immintrin.h. Either as an always_inline function containing calls to builtins(can be target specific or target independent) or vector extension code. Or as a macro wrapper around a taget specific builtin. I believe I've removed all cases where the macro was around a target independent builtin.

To support the always_inline function case this patch adds attribute((min_vector_width(128))) that can be used to tag these functions with their vector width. All x86 intrinsic functions that operate on vectors have been tagged with this attribute.

To support the macro case, all x86 specific builtins have also been tagged with the vector width that they require. Use of any builtin with this property will implicitly increase the min_vector_width of the function that calls it. I've done this as a new property in the attribute string for the builtin rather than basing it on the type string so that we can opt into it on a per builtin basis and avoid any impact to target independent builtins.

There will be future work to support vectors passed as function arguments and supporting inline assembly. And whatever else we can find that isn't covered by this patch.

Special thanks to Chandler who suggested this direction and reviewed a preview version of this patch. And thanks to Eric Christopher who has had many conversations with me about this issue.

Differential Revision: https://reviews.llvm.org/D48617

llvm-svn: 336583
2018-07-09 19:00:16 +00:00
Leonard Chan 6e16c60f26 [Fixed Point Arithmetic] Rename `-fsame-fbits` flag
- Rename the `-fsame-fbits` flag to `-fpadding-on-unsigned-fixed-point`
- Move the flag from a driver option to a cc1 option
- Rename the `SameFBits` member in TargetInfo to `PaddingOnUnsignedFixedPoint`
- Updated descriptions

Differential Revision: https://reviews.llvm.org/D48727

llvm-svn: 335993
2018-06-29 17:08:19 +00:00
Alexander Richardson 742553da13 Use Triple::isMIPS() instead of enumerating all Triples. NFC
Reviewed By: atanasyan

Differential Revision: https://reviews.llvm.org/D48549

llvm-svn: 335495
2018-06-25 16:49:52 +00:00
Leonard Chan db01c3adc6 [Fixed Point Arithmetic] Fixed Point Precision Bits and Fixed Point Literals
This diff includes the logic for setting the precision bits for each primary fixed point type in the target info and logic for initializing a fixed point literal.

Fixed point literals are declared using the suffixes

```
hr: short _Fract
uhr: unsigned short _Fract
r: _Fract
ur: unsigned _Fract
lr: long _Fract
ulr: unsigned long _Fract
hk: short _Accum
uhk: unsigned short _Accum
k: _Accum
uk: unsigned _Accum
```
Errors are also thrown for illegal literal values

```
unsigned short _Accum u_short_accum = 256.0uhk;   // expected-error{{the integral part of this literal is too large for this unsigned _Accum type}}
```

Differential Revision: https://reviews.llvm.org/D46915

llvm-svn: 335148
2018-06-20 17:19:40 +00:00
Sjoerd Meijer 5c4c998a54 [SPIR] Prevent SPIR targets from using half conversion intrinsics
The SPIR target currently allows for half precision floating point types to be
emitted using the LLVM intrinsic functions which convert half types to floats
and doubles. However, this is illegal in SPIR as the only intrinsic allowed by
SPIR is memcpy, as per section 3 of the SPIR specification. Currently this is
leading to an assert being hit in the Clang CodeGen when attempting to emit a
constant or literal _Float16 type in a comparison operation on a SPIR or SPIR64
target. This assert stems from the CodeGen attempting to emit a constant half
value as an integer because the backend has specified that it is using these
half conversion intrinsics (which represents half as i16). This patch prevents
SPIR targets from using these intrinsics by overloading the responsible target
info method, marks SPIR targets as having a legal half type and provides
additional regression testing for the _Float16 type on SPIR targets.

Patch by: Stephen McGroarty

Differential Revision: https://reviews.llvm.org/D48188

llvm-svn: 335111
2018-06-20 09:49:40 +00:00
Yonghong Song 6927cf0c2a bpf: recognize target specific option -mattr=dwarfris in clang
The following is the usage example with clang:
  bash-4.2$ clang -target bpf -O2 -g -c -Xclang -target-feature -Xclang +dwarfris t.c
  bash-4.2$ llvm-objdump -S -d t.o

  t.o:    file format ELF64-BPF

  Disassembly of section .text:
  test:
  ; int test(void) {
       0:       b7 00 00 00 00 00 00 00         r0 = 0
  ; return 0;
         1:       95 00 00 00 00 00 00 00         exit
  bash-4.2$ cat t.c
  int test(void) {
    return 0;
  }
  bash-4.2$

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 334839
2018-06-15 15:53:31 +00:00
Leonard Chan ab80f3c8b7 [Fixed Point Arithmetic] Addition of the remaining fixed point types and their saturated equivalents
This diff includes changes for the remaining _Fract and _Sat fixed point types.

```
signed short _Fract s_short_fract;
signed _Fract s_fract;
signed long _Fract s_long_fract;
unsigned short _Fract u_short_fract;
unsigned _Fract u_fract;
unsigned long _Fract u_long_fract;

// Aliased fixed point types
short _Accum short_accum;
_Accum accum;
long _Accum long_accum;
short _Fract short_fract;
_Fract fract;
long _Fract long_fract;

// Saturated fixed point types
_Sat signed short _Accum sat_s_short_accum;
_Sat signed _Accum sat_s_accum;
_Sat signed long _Accum sat_s_long_accum;
_Sat unsigned short _Accum sat_u_short_accum;
_Sat unsigned _Accum sat_u_accum;
_Sat unsigned long _Accum sat_u_long_accum;
_Sat signed short _Fract sat_s_short_fract;
_Sat signed _Fract sat_s_fract;
_Sat signed long _Fract sat_s_long_fract;
_Sat unsigned short _Fract sat_u_short_fract;
_Sat unsigned _Fract sat_u_fract;
_Sat unsigned long _Fract sat_u_long_fract;

// Aliased saturated fixed point types
_Sat short _Accum sat_short_accum;
_Sat _Accum sat_accum;
_Sat long _Accum sat_long_accum;
_Sat short _Fract sat_short_fract;
_Sat _Fract sat_fract;
_Sat long _Fract sat_long_fract;
```

This diff only allows for declaration of these fixed point types. Assignment and other operations done on fixed point types according to http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf will be added in future patches.

Differential Revision: https://reviews.llvm.org/D46911

llvm-svn: 334718
2018-06-14 14:53:51 +00:00
Benjamin Kramer ffe60e0403 [Basic] Fix -Wreorder warning
Just use field initializers that don't suffer from this problem

llvm-svn: 334619
2018-06-13 16:45:12 +00:00
Stefan Pintilie a6ce3fe72b [PowerPC] The __float128 type should only be available on Power9
Diasble the use of the type __float128 for PPC machines older
than Power9.

The use of -mfloat128 for PPC machine older than Power9 will result
in an error.

Differential Revision: https://reviews.llvm.org/D48088

llvm-svn: 334613
2018-06-13 16:05:05 +00:00
Pavel Labath d8c6290ba4 Move VersionTuple from clang/Basic to llvm/Support
Summary:
This kind of functionality is useful to other project apart from clang.
LLDB works with version numbers a lot, but it does not have a convenient
abstraction for this. Moving this class to a lower level library allows
it to be freely used within LLDB.

Since this class is used in a lot of places in clang, and it used to be
in the clang namespace, it seemed appropriate to add it to the list of
adopted classes in LLVM.h to avoid prefixing all uses with "llvm::".

Also, I didn't find any tests specific for this class, so I wrote a
couple of quick ones for the more interesting bits of functionality.

Reviewers: zturner, erik.pilkington

Subscribers: mgorny, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D47887

llvm-svn: 334399
2018-06-11 10:28:04 +00:00
Zachary Turner 1f67a3cba9 [FileSystem] Split up the OpenFlags enumeration.
This breaks the OpenFlags enumeration into two separate
enumerations: OpenFlags and CreationDisposition.  The first
controls the behavior of the API depending on whether or not
the target file already exists, and is not a flags-based
enum.  The second controls more flags-like values.

This yields a more easy to understand API, while also allowing
flags to be passed to the openForRead api, where most of the
values didn't make sense before.  This also makes the apis more
testable as it becomes easy to enumerate all the configurations
which make sense, so I've added many new tests to exercise all
the different values.

llvm-svn: 334221
2018-06-07 19:58:58 +00:00
Ivan Donchevskii 2ebe3a0240 [Frontend] Honor UserFilesAreVolatile flag getting file buffer in ASTUnit
Do not memory map the main file if the flag UserFilesAreVolatile is set to true
in ASTUnit when calling FileSystem::getBufferForFile.

Differential Revision: https://reviews.llvm.org/D47460

llvm-svn: 334070
2018-06-06 07:17:26 +00:00
Reid Kleckner 89fbd55145 Revert r333791 "Cap "voluntary" vector alignment at 16 for all Darwin platforms."
Adding __attribute__((aligned(32))) to __m256 breaks the implementation
of _mm256_loadu_ps on Windows. On Windows, alignment attributes have
higher precedence than packing attributes.

We also might want to carefully consider the consequences of changing
our vector typedefs, since many users copy them and invent their own
new, non-Intel specific vector type names.

llvm-svn: 333958
2018-06-04 21:39:20 +00:00
Leonard Chan f921d85422 This diff includes changes for supporting the following types.
// Primary fixed point types
signed short _Accum s_short_accum;
signed _Accum s_accum;
signed long _Accum s_long_accum;
unsigned short _Accum u_short_accum;
unsigned _Accum u_accum;
unsigned long _Accum u_long_accum;

// Aliased fixed point types
short _Accum short_accum;
_Accum accum;
long _Accum long_accum;
This diff only allows for declaration of the fixed point types. Assignment and other operations done on fixed point types according to http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf will be added in future patches. The saturated versions of these types and the equivalent _Fract types will also be added in future patches.

The tests included are for asserting that we can declare these types.

Fixed the test that was failing by not checking for dso_local on some
targets.

Differential Revision: https://reviews.llvm.org/D46084

llvm-svn: 333923
2018-06-04 16:07:52 +00:00
Leonard Chan 0d485dbb40 Revert "This diff includes changes for supporting the following types."
This reverts commit r333814, which fails for a test checking the bit
width on ubuntu.

llvm-svn: 333815
2018-06-02 03:27:13 +00:00
Leonard Chan db55d8331e This diff includes changes for supporting the following types.
```

// Primary fixed point types
signed short _Accum s_short_accum;
signed _Accum s_accum;
signed long _Accum s_long_accum;
unsigned short _Accum u_short_accum;
unsigned _Accum u_accum;
unsigned long _Accum u_long_accum;

// Aliased fixed point types
short _Accum short_accum;
_Accum accum;
long _Accum long_accum;

```

This diff only allows for declaration of the fixed point types. Assignment and other operations done on fixed point types according to http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf will be added in future patches. The saturated versions of these types and the equivalent `_Fract` types will also be added in future patches.

The tests included are for asserting that we can declare these types.

Differential Revision: https://reviews.llvm.org/D46084

llvm-svn: 333814
2018-06-02 02:58:51 +00:00
John McCall 280c656031 Cap "voluntary" vector alignment at 16 for all Darwin platforms.
This fixes two major problems:
- We were not capping vector alignment as desired on 32-bit ARM.
- We were using different alignments based on the AVX settings on
  Intel, so we did not have a consistent ABI.

This is an ABI break, but we think we can get away with it because
vectors tend to be used mostly in inline code (which is why not having
a consistent ABI has not proven disastrous on Intel).

Intel's AVX types are specified as having 32-byte / 64-byte alignment,
so align them explicitly instead of relying on the base ABI rule.
Note that this sort of attribute is stripped from template arguments
in template substitution, so there's a possibility that code templated
over vectors will produce inadequately-aligned objects.  The right
long-term solution for this is for alignment attributes to be
interpreted as true qualifiers and thus preserved in the canonical type.

llvm-svn: 333791
2018-06-01 21:34:26 +00:00
Aditya Kumar 6995821e90 Add dump method for selectors
Differential Revision: https://reviews.llvm.org/D45935
Reviewers: compnerd

llvm-svn: 333657
2018-05-31 14:45:32 +00:00
Daniel Cederman 8cc53aecad [Sparc] Add floating-point register names
Reviewers: jyknight

Reviewed By: jyknight

Subscribers: eraman, fedor.sergeev, jrtc27, cfe-commits

Differential Revision: https://reviews.llvm.org/D47137

llvm-svn: 333510
2018-05-30 06:02:18 +00:00
Bob Wilson fa84fc916c Support Swift calling convention for PPC64 targets
This adds basic support for the Swift calling convention with PPC64 targets.
Patch provided by Atul Sowani in bug report #37223

llvm-svn: 333316
2018-05-25 21:26:03 +00:00
Gabor Buella 078bb99a90 [x86] invpcid intrinsic
An intrinsic for an old instruction, as described in the Intel SDM.

Reviewers: craig.topper, rnk

Reviewed By: craig.topper, rnk

Differential Revision: https://reviews.llvm.org/D47142

llvm-svn: 333256
2018-05-25 06:34:42 +00:00
Eric Liu 33dd619c80 [VFS] Implement getRealPath in InMemoryFileSystem.
Reviewers: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D47262

llvm-svn: 333172
2018-05-24 11:17:00 +00:00
Alex Lorenz 5a5a654165 [AST][ObjC] Print implicit property expression that only has a setter without crashing
rdar://40447209

llvm-svn: 333046
2018-05-23 00:52:20 +00:00
Eric Liu a840a46557 [VFS] Implement getRealPath for OverlayFileSystem.
Reviewers: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D47060

llvm-svn: 332717
2018-05-18 13:22:49 +00:00
Alexander Ivchenko 0fb8c877c4 This patch aims to match the changes introduced
in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html.
The -mibt feature flag is being removed, and the -fcf-protection
option now also defines a CET macro and causes errors when used
on non-X86 targets, while X86 targets no longer check for -mibt
and -mshstk to determine if -fcf-protection is supported. -mshstk
is now used only to determine availability of shadow stack intrinsics.

Comes with an LLVM patch (D46882).

Patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D46881

llvm-svn: 332704
2018-05-18 11:56:21 +00:00
Jan Korous 2325569eaa Use dotted format of version tuple for availability diagnostics
E. g. use "10.11" instead of "10_11".

We are maintaining backward compatibility by parsing underscore-delimited version tuples but no longer keep track of the separator and using dot format for output.

Differential Revision: https://reviews.llvm.org/D46747

rdar://problem/39845032

llvm-svn: 332598
2018-05-17 11:51:49 +00:00
Eric Liu 5fb18fec5d Add vfs::FileSystem::getRealPath
Summary: And change `FileManager::getCanonicalName` to use getRealPath.

Reviewers: bkramer

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D46942

llvm-svn: 332590
2018-05-17 10:26:23 +00:00
Rainer Orth 877d15b396 [Solaris] Only define _REENTRANT if -pthread
When looking at lib/Basic/Targets/OSTargets.h, I noticed that _REENTRANT is defined
unconditionally on Solaris, unlike all other targets and what either Studio cc (only define
it with -mt) or gcc (only define it with -pthread) do.

This patch follows that lead.

Differential Revision: https://reviews.llvm.org/D41241

llvm-svn: 332343
2018-05-15 11:36:00 +00:00
Gabor Buella 3a7571259e [X86] ptwrite intrinsic
Reviewers: craig.topper, RKSimon

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D46540

llvm-svn: 331962
2018-05-10 07:28:54 +00:00
Artem Belevich 679dafe69e [CUDA] Added -f[no-]cuda-short-ptr option
The option enables use of 32-bit pointers for accessing
const/local/shared memory. The feature is disabled by default.

Differential Revision: https://reviews.llvm.org/D46148

llvm-svn: 331938
2018-05-09 23:10:09 +00:00
Eric Liu 2e538089fa Add SourceManagerForFile helper which sets up SourceManager and dependencies for a single file with code snippet
Summary: This can be used to create a virtual environment (incl. VFS, source manager) for code snippets.

Reviewers: sammccall, klimek

Reviewed By: sammccall

Subscribers: klimek, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D46176

llvm-svn: 331923
2018-05-09 21:35:52 +00:00
Sven van Haastregt 2ca6ba1045 [OpenCL] Restrict various keywords in OpenCL C++ mode
Restrict the following keywords in the OpenCL C++ language mode,
according to Sections 2.2 & 2.9 of the OpenCL C++ 1.0 Specification.

 - dynamic_cast
 - typeid
 - register (already restricted in OpenCL C, update the diagnostic)
 - thread_local
 - exceptions (try/catch/throw)
 - access qualifiers read_only, write_only, read_write

Support the `__global`, `__local`, `__constant`, `__private`, and
`__generic` keywords in OpenCL C++.  Leave the unprefixed address
space qualifiers such as global available, i.e., do not mark them as
reserved keywords in OpenCL C++.  libclcxx provides explicit address
space pointer classes such as `global_ptr` and `global<T>` that are
implemented using the `__`-prefixed qualifiers.

Differential Revision: https://reviews.llvm.org/D46022

llvm-svn: 331874
2018-05-09 13:16:17 +00:00
Adrian Prantl 9fc8faf9e6 Remove \brief commands from doxygen comments.
This is similar to the LLVM change https://reviews.llvm.org/D46290.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done
for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46320

llvm-svn: 331834
2018-05-09 01:00:01 +00:00
Sven van Haastregt 35b613974e [OpenCL] Factor out language version printing
Generate a printable OpenCL language version number in a single place
and select between the OpenCL C or OpenCL C++ version accordingly.

Differential Revision: https://reviews.llvm.org/D46382

llvm-svn: 331766
2018-05-08 13:47:43 +00:00
Gabor Buella b0f310d51d [x86] Introduce the pconfig intrinsic
Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D46431

llvm-svn: 331740
2018-05-08 06:49:41 +00:00
Gabor Buella a51e0c2243 [X86] directstore and movdir64b intrinsics
Reviewers: spatel, craig.topper, RKSimon

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45984

llvm-svn: 331249
2018-05-01 10:05:42 +00:00
Richard Smith 3a8244df6f Implement P0482R2, support for char8_t type.
This is not yet part of any C++ working draft, and so is controlled by the flag
-fchar8_t rather than a -std= flag. (The GCC implementation is controlled by a
flag with the same name.)

This implementation is experimental, and will be removed or revised
substantially to match the proposal as it makes its way through the C++
committee.

llvm-svn: 331244
2018-05-01 05:02:45 +00:00
Matt Arsenault d2da3c20d7 AMDGPU: Add Vega12 and Vega20
Changes by
  Matt Arsenault
  Konstantin Zhuravlyov

llvm-svn: 331216
2018-04-30 19:08:27 +00:00
Mikhail Maltsev 89f7b46b7a [Targets] Implement getConstraintRegister for ARM and AArch64
Summary:
The getConstraintRegister method is used by semantic checking of
inline assembly statements in order to diagnose conflicts between
clobber list and input/output lists. Currently ARM and AArch64 don't
override getConstraintRegister, so conflicts between registers
assigned to variables in asm labels and clobber lists are not
diagnosed. Such conflicts can cause assertion failures in the back end
and even miscompilations.

This patch implements getConstraintRegister for ARM and AArch64
targets. Since these targets don't have single-register constraints,
the implementation is trivial and just returns the register specified
in an asm label (if any).

Reviewers: eli.friedman, javed.absar, thopre

Reviewed By: thopre

Subscribers: rengolin, eraman, rogfer01, myatsina, kristof.beyls, cfe-commits, chrib

Differential Revision: https://reviews.llvm.org/D45965

llvm-svn: 331164
2018-04-30 09:11:08 +00:00
Richard Smith b5f8171a1b PR37189 Fix incorrect end source location and spelling for a split '>>' token.
When a '>>' token is split into two '>' tokens (in C++11 onwards), or (as an
extension) when we do the same for other tokens starting with a '>', we can't
just use a location pointing to the first '>' as the location of the split
token, because that would result in our miscomputing the length and spelling
for the token. As a consequence, for example, a refactoring replacing 'A<X>'
with something else would sometimes replace one character too many, and
similarly diagnostics highlighting a template-id source range would highlight
one character too many.

Fix this by creating an expansion range covering the first character of the
'>>' token, whose spelling is '>'. For this to work, we generalize the
expansion range of a macro FileID to be either a token range (the common case)
or a character range (used in this new case).

llvm-svn: 331155
2018-04-30 05:25:48 +00:00
Nico Weber 6bc635ef56 Revert r329698 (and r329702).
Speculative. ClangMoveTests started failing on
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/9958
after this change. I can't reproduce on my machine, let's see
if it was due to this change.

llvm-svn: 331077
2018-04-27 20:29:57 +00:00
Nico Weber 1865df4996 s/LLVM_ON_WIN32/_WIN32/, clang
LLVM_ON_WIN32 is set exactly with MSVC and MinGW (but not Cygwin) in
HandleLLVMOptions.cmake, which is where _WIN32 defined too.  Just use the
default macro instead of a reinvented one.

See thread "Replacing LLVM_ON_WIN32 with just _WIN32" on llvm-dev and cfe-dev.
No intended behavior change.

llvm-svn: 331069
2018-04-27 19:11:14 +00:00
Oliver Stannard 39ee9de64c [ARM] Add __ARM_FEATURE_DOTPROD pre-defined macro
This adds a pre-defined macro to test if the compiler has support for the
v8.2-A dot rpoduct intrinsics in AArch32 mode.

The AAcrh64 equivalent has already been added by rL330229.

The ACLE spec which describes this macro hasn't been published yet, but this is
based on the final internal draft, and GCC has already implemented this.

Differential revision: https://reviews.llvm.org/D46108

llvm-svn: 331038
2018-04-27 13:56:02 +00:00
Eli Friedman e54d0ff400 [TargetInfo] Sort target features before passing them to the backend
Passing the features in random order will lead to unpredictable results
when some of the features are related (like the architecture-version
features on ARM).

It might be possible to fix this particular case in the ARM target code,
to avoid adding overlapping target features. But we should probably be
sorting in any case: the behavior shouldn't depend on StringMap's
hashing algorithm.

Differential Revision: https://reviews.llvm.org/D46030

llvm-svn: 330861
2018-04-25 19:14:05 +00:00
Artem Belevich 3cce307799 [CUDA] Enable CUDA compilation with CUDA-9.2
Differential Revision: https://reviews.llvm.org/D45827

llvm-svn: 330753
2018-04-24 18:23:19 +00:00
Rainer Orth f0f716df8e [Solaris] __float128 is supported on Solaris/x86
When rebasing https://reviews.llvm.org/D40898 with GCC 5.4 on Solaris 11.4, I ran
into a few instances of

In file included from /vol/llvm/src/compiler-rt/local/test/asan/TestCases/Posix/asan-symbolize-sanity-test.cc:19:
In file included from /usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/string:40:
In file included from /usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/bits/char_traits.h:39:
In file included from /usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/bits/stl_algobase.h:64:
In file included from /usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/bits/stl_pair.h:59:
In file included from /usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/bits/move.h:57:
/usr/gcc/5/lib/gcc/x86_64-pc-solaris2.11/5.4.0/../../../../include/c++/5.4.0/type_traits:311:39: error: __float128 is not supported on this target

  struct __is_floating_point_helper<__float128>
                                    ^

during make check-all.  The line above is inside

#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128)

  template<>
    struct __is_floating_point_helper<__float128>
    : public true_type { };

#endif

While the libstdc++ header indicates support for __float128, clang does not, but
should.  The following patch implements this and fixed those errors.

Differential Revision: https://reviews.llvm.org/D41240

llvm-svn: 330572
2018-04-23 09:28:08 +00:00
Gabor Buella eba6c42e66 [X86] WaitPKG intrinsics
Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45254

llvm-svn: 330463
2018-04-20 18:44:33 +00:00
Jordan Rose 90b0a1fc58 Record whether a module came from a private module map
Right now we only use this information in one place, immediately after
we calculate it, but it's still nice information to have. The Swift
project is going to use this to tidy up its "API notes" feature (see
past discussion on cfe-dev that never quite converged).

Reviewed by Bruno Cardoso Lopes.

llvm-svn: 330452
2018-04-20 17:16:04 +00:00
Junmo Park 4b9b9fb7a0 [AAch64] Add the __ARM_FEATURE_DOTPROD macro definition
This matches what GCC does.
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-c.c

Differential Revision: https://reviews.llvm.org/D45544

llvm-svn: 330229
2018-04-17 22:38:40 +00:00
Keith Wyss f437e35671 [XRay] Add clang builtin for xray typed events.
Summary:
A clang builtin for xray typed events. Differs from
__xray_customevent(...) by the presence of a type tag that is vended by
compiler-rt in typical usage. This allows xray handlers to expand logged
events with their type description and plugins to process traced events
based on type.

This change depends on D45633 for the intrinsic definition.

Reviewers: dberris, pelikan, rnk, eizan

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D45716

llvm-svn: 330220
2018-04-17 21:32:43 +00:00
Eli Friedman 642a5ee1c1 [ARM] Compute a target feature which corresponds to the ARM version.
Currently, the interaction between the triple, the CPU, and the
supported features is a mess: the driver edits the triple to indicate
the supported architecture version, and the LLVM backend uses this to
figure out what instructions are legal.  This makes it difficult to
understand what's happening, and makes it impossible to LTO together two
modules with different computed architectures.

Instead of relying on triple rewriting to get the correct target
features, we should add the right target features explicitly.

Differential Revision: https://reviews.llvm.org/D45240

llvm-svn: 330169
2018-04-16 23:52:58 +00:00
Erich Keane 41af971375 Limit types of builtins that can be redeclared.
As reported here: https://bugs.llvm.org/show_bug.cgi?id=37033
Any usage of a builtin function that uses a va_list by reference
will cause an assertion when redeclaring it.

After discussion in the review, it was concluded that the correct
way of accomplishing this fix is to make attempts to redeclare certain
builtins an error. Unfortunately, doing this limitation for all builtins
is likely a breaking change, so this commit simply limits it to
types with custom type checking and those that take a reference.

Two tests needed to be updated to make this work.

Differential Revision: https://reviews.llvm.org/D45383

llvm-svn: 330160
2018-04-16 21:30:08 +00:00
Aaron Ballman d742dc20d9 Defer adding keywords to the identifier table until after the language options have been loaded from the AST file.
This fixes issues with "class" being reported as an identifier in "enum class" because the construct is not present when using default language options.

Patch by Johann Klähn.

llvm-svn: 330159
2018-04-16 21:07:08 +00:00
Gabor Buella f594ce739b [X86] Introduce archs: goldmont-plus & tremont
Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45613

llvm-svn: 330110
2018-04-16 08:10:10 +00:00
Gabor Buella b220dd2b6c [X86] Introduce cldemote intrinsic
Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45257

llvm-svn: 329993
2018-04-13 07:37:24 +00:00
Dean Michael Berris 488f7c2b67 [XRay][clang] Add flag to choose instrumentation bundles
Summary:
This change addresses http://llvm.org/PR36926 by allowing users to pick
which instrumentation bundles to use, when instrumenting with XRay. In
particular, the flag `-fxray-instrumentation-bundle=` has four valid
values:

- `all`: the default, emits all instrumentation kinds
- `none`: equivalent to -fnoxray-instrument
- `function`: emits the entry/exit instrumentation
- `custom`: emits the custom event instrumentation

These can be combined either as comma-separated values, or as
repeated flag values.

Reviewers: echristo, kpw, eizan, pelikan

Reviewed By: pelikan

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D44970

llvm-svn: 329985
2018-04-13 02:31:58 +00:00
Gabor Buella a052016ef2 [x86] wbnoinvd intrinsic
The WBNOINVD instruction writes back all modified
cache lines in the processor’s internal cache to main memory
but does not invalidate (flush) the internal caches.

Reviewers: craig.topper, zvi, ashlykov

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D43817

llvm-svn: 329848
2018-04-11 20:09:09 +00:00
Artem Belevich 2f8efcf3ca [NVPTX] Removed 'satom' feature which is no longer used.
Differential Revision: https://reviews.llvm.org/D45061

llvm-svn: 329830
2018-04-11 17:51:33 +00:00
Artem Belevich 24e8a680e5 [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.
When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature,
consider those features available if we're compiling for GPU >= sm_XX or have
enabled PTX version >= ptxYY.

Differential Revision: https://reviews.llvm.org/D45061

llvm-svn: 329829
2018-04-11 17:51:19 +00:00
Yonghong Song 2ad75f7410 bpf: accept all asm register names
Sometimes when people compile bpf programs with
"clang ... -target bpf ...", the kernel header
files may contain host arch inline assembly codes
as in the patch https://patchwork.kernel.org/patch/10119683/
by Arnaldo Carvaldo de Melo.

The current workaround in the above patch
is to guard the inline assembly with "#ifndef __BPF__"
marco. So when __BPF__ is defined, these macros will
have no use.

Such a method is not extensible. As a matter of fact,
most of these inline assembly codes will be thrown away
at the end of clang compilation.

So for bpf target, this patch accepts all asm register
names in clang AST stage. The name will be checked
again during llc code generation if the inline assembly
code is indeed for bpf programs.

With this patch, the above "#ifndef __BPF__" is not needed
any more in https://patchwork.kernel.org/patch/10119683/.

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 329823
2018-04-11 16:08:00 +00:00
Gabor Buella 8701b18a25 [X86] Split up -march=icelake to -client & -server
Reviewers: craig.topper, zvi, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45056

llvm-svn: 329741
2018-04-10 18:58:26 +00:00
Nico Weber a3e7510a4c Attempt to fix Windows build after r329698.
llvm-svn: 329702
2018-04-10 14:08:25 +00:00
Gabor Buella e3330c1b61 [X86] Disable SGX for Skylake Server
Reviewers: craig.topper, zvi, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45058

llvm-svn: 329701
2018-04-10 14:04:21 +00:00
Nico Weber 148c8cb4bf Use llvm::sys::fs::real_path() in clang.
No expected behavior change.
https://reviews.llvm.org/D45165

llvm-svn: 329698
2018-04-10 13:36:38 +00:00
Yaxun Liu bec8a66454 [CUDA] Revert defining __CUDA_ARCH__ for amdgcn targets
amdgcn targets only support HIP, which does not define __CUDA_ARCH__.

this is a partial unroll of r329232 / D45277.

Differential Revision: https://reviews.llvm.org/D45387

llvm-svn: 329584
2018-04-09 15:43:01 +00:00
Dean Michael Berris 20dc6ef746 [XRay][llvm+clang] Consolidate attribute list files
Summary:
This change consolidates the always/never lists that may be provided to
clang to externally control which functions should be XRay instrumented
by imbuing attributes. The files follow the same format as defined in
https://clang.llvm.org/docs/SanitizerSpecialCaseList.html for the
sanitizer blacklist.

We also deprecate the existing `-fxray-instrument-always=` and
`-fxray-instrument-never=` flags, in favour of `-fxray-attr-list=`.

This fixes http://llvm.org/PR34721.

Reviewers: echristo, vlad.tsyrklevich, eugenis

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D45357

llvm-svn: 329543
2018-04-09 04:02:09 +00:00
Yaxun Liu 8391387f7b [HIP] define __CUDA_ARCH_=1 for amdgcn targets
Differential Revision: https://reviews.llvm.org/D45277

llvm-svn: 329420
2018-04-06 16:43:42 +00:00
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Shiva Chen 4891dbf557 [PATCH] [RISCV] Extend getTargetDefines for RISCVTargetInfo
Summary:
This patch extend getTargetDefines and implement handleTargetFeatures
and hasFeature. and define corresponding marco for those features.

Reviewers: asb, apazos, eli.friedman

Differential Revision: https://reviews.llvm.org/D44727

Patch by Kito Cheng.

llvm-svn: 329278
2018-04-05 12:54:00 +00:00
Yaxun Liu 8a5fc15aa4 [CUDA] Add amdgpu sub archs
Patch by Greg Rodgers.
Revised and lit tests added by Yaxun Liu.

Differential Revision: https://reviews.llvm.org/D45277

llvm-svn: 329232
2018-04-04 21:19:27 +00:00
Max Moroz e097567006 Fixes errors with FS iterators caused by https://reviews.llvm.org/D44960
Summary:
In https://reviews.llvm.org/D44960, file status check is executed every
time a real file system directory iterator is constructed or
incremented, and emits an error code. This change list fixes the errors
in VirtualFileSystem caused by https://reviews.llvm.org/D44960.

Patch by Yuke Liao (@liaoyuke).

Reviewers: vsk, pcc, zturner, liaoyuke

Reviewed By: vsk

Subscribers: mgrang, cfe-commits

Differential Revision: https://reviews.llvm.org/D45178

llvm-svn: 329223
2018-04-04 19:47:25 +00:00
Krzysztof Parzyszek 3163610010 [Hexagon] Remove -mhvx-double and the corresponding subtarget feature
Specifying the HVX vector length should be done via the -mhvx-length
option.

llvm-svn: 329077
2018-04-03 15:59:10 +00:00
Saleem Abdulrasool 13aeee0d36 CodeGenCXX: support PreserveMostCC in MS ABI
Microsoft has reserved 'U' for the PreserveMostCC which is used in the
swift runtime.  Add support for this.  This allows the swift runtime to
be built for Windows again.

llvm-svn: 329025
2018-04-02 22:25:50 +00:00
Manoj Gupta cb668d8512 [AArch64]: Add support for parsing rN registers.
Summary:
Allow rN registers to be simply parsed as correspoing xN registers.
The "register ... asm("rN")" is an command to the
compiler's register allocator, not an operand to any individual assembly
instruction. GCC documents this syntax as "...the name of the register
that should be used."

This is needed to support the changes in Linux kernel (see
https://lkml.org/lkml/2018/3/1/268 )

Note: This will add support only for the limited use case of
register ... asm("rN"). Any other uses that make rN leak into assembly
are not supported.

Reviewers: kristof.beyls, rengolin, peter.smith, t.p.northover

Reviewed By: peter.smith

Subscribers: javed.absar, eraman, cfe-commits, srhines

Differential Revision: https://reviews.llvm.org/D44815

llvm-svn: 328829
2018-03-29 21:11:15 +00:00
Eugene Zelenko 5a52011c41 [Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 328735
2018-03-28 22:09:09 +00:00
Akira Hatanaka fcbe17c6be [ObjC++] Make parameter passing and function return compatible with ObjC
ObjC and ObjC++ pass non-trivial structs in a way that is incompatible
with each other. For example:
    
typedef struct {
  id f0;
  __weak id f1;
} S;
    
// this code is compiled in c++.
extern "C" {
  void foo(S s);
}
    
void caller() {
  // the caller passes the parameter indirectly and destructs it.
  foo(S());
}
    
// this function is compiled in c.
// 'a' is passed directly and is destructed in the callee.
void foo(S a) {
}
    
This patch fixes the incompatibility by passing and returning structs
with __strong or weak fields using the C ABI in C++ mode. __strong and
__weak fields in a struct do not cause the struct to be destructed in
the caller and __strong fields do not cause the struct to be passed
indirectly.
    
Also, this patch fixes the microsoft ABI bug mentioned here:
    
https://reviews.llvm.org/D41039?id=128767#inline-364710
    
rdar://problem/38887866
    
Differential Revision: https://reviews.llvm.org/D44908

llvm-svn: 328731
2018-03-28 21:13:14 +00:00
Matt Arsenault b130ea5605 AMDGPU: Update datalayout for stack alignment
llvm-svn: 328657
2018-03-27 19:26:51 +00:00
Mandeep Singh Grang c205d8cc8d [clang] Change std::sort to llvm::sort in response to r327219
r327219 added wrappers to std::sort which randomly shuffle the container before
sorting.  This will help in uncovering non-determinism caused due to undefined
sorting order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of
std::sort.

llvm-svn: 328636
2018-03-27 16:50:00 +00:00
Yaxun Liu ac1263cd54 [AMDGPU] Fix codegen for inline assembly
Need to override convertConstraint to recognise amdgpu specific register names.

Differential Revision: https://reviews.llvm.org/D44533

llvm-svn: 328359
2018-03-23 19:43:42 +00:00
Saleem Abdulrasool 29149d5cb7 Basic: support PreserveMost and PreserveAll on Windows ARM
Do not ignore these calling conventions on Windows ARM.  They are used
by the swift runtime for certain calls.

llvm-svn: 328007
2018-03-20 17:33:26 +00:00
Sjoerd Meijer 87793e7599 [ARM] Pass half or i16 types for NEON intrinsics
For generating NEON intrinsics, this determines the NEON data type, and whether
it should be a half type or an i16 type. I.e., we always pass a half type for
AArch64, this hasn't changed, but now also for ARM but only when FullFP16 is
enabled, and i16 otherwise.

This is intended to be non-functional change, but together with the backend
work in D44538 which adds support for f16 vectors, this enables adding the
AArch32 FP16 (vector) intrinsics.

Differential Revision: https://reviews.llvm.org/D44561

llvm-svn: 327836
2018-03-19 13:22:49 +00:00
Sjoerd Meijer a7463df6e2 [ARM] ACLE FP16 feature test macros
This is a partial recommit of r327189 that was reverted
due to test issues. I.e., this recommits minimal functional
change, the FP16 feature test macros, and adds tests that 
were missing in the original commit.

llvm-svn: 327455
2018-03-13 22:11:06 +00:00
Sjoerd Meijer 95da875898 This reverts "r327189 - [ARM] Add ARMv8.2-A FP16 vector intrinsic"
This is causing problems in testing, and PR36683 was raised.
Reverting it until we have sorted out how to pass f16 vectors.

llvm-svn: 327437
2018-03-13 19:38:56 +00:00
Abderrazek Zaafrani 5bd68cf742 [ARM] Add ARMv8.2-A FP16 vector intrinsic
Add the fp16 neon vector intrinsic for ARM as described in the ARM ACLE document.

Reviews in https://reviews.llvm.org/D43650

llvm-svn: 327189
2018-03-09 23:39:34 +00:00
Matthew Voss 0a6a701f36 Correct the alignment for the PS4 target
https://reviews.llvm.org/D44218

llvm-svn: 326942
2018-03-07 20:48:16 +00:00
Yaxun Liu 1578a0a55d [AMDGPU] Clean up old address space mapping and fix constant address space value
Differential Revision: https://reviews.llvm.org/D43911

llvm-svn: 326725
2018-03-05 17:50:10 +00:00
Heejin Ahn 8b6af22e60 [WebAssembly] Add exception handling option
Summary: Add exception handling option to clang.

Reviewers: dschuff

Subscribers: jfb, sbc100, jgravelle-google, sunfish, cfe-commits

Differential Revision: https://reviews.llvm.org/D43681

llvm-svn: 326517
2018-03-02 00:39:16 +00:00
Konstantin Zhuravlyov d6b3453bdb AMDGPU: Define FP_FAST_FMA{F} macros for amdgcn
- Expand GK_*s (i.e. GFX6 -> GFX600, GFX601, etc.)
  - This allows us to choose features correctly in some cases (for example, fast fmaf is available on gfx600, but not gfx601)
- Move HasFMAF, HasFP64, HasLDEXPF to GPUInfo tables
- Add HasFastFMA, HasFastFMAF to GPUInfo tables
- Add missing tests

llvm-svn: 326254
2018-02-27 21:48:05 +00:00
David Zarzycki b0c752d3c1 Fix for LLVM r326109
llvm-svn: 326110
2018-02-26 18:42:30 +00:00
Mandeep Singh Grang ac24bb53bb [RISCV] Enable __int128_t and __uint128_t through clang flag
Summary:
If the flag -fforce-enable-int128 is passed, it will enable support for __int128_t and __uint128_t types.
This flag can then be used to build compiler-rt for RISCV32.

Reviewers: asb, kito-cheng, apazos, efriedma

Reviewed By: asb, efriedma

Subscribers: shiva0217, efriedma, jfb, dschuff, sdardis, sbc100, jgravelle-google, aheejin, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, cfe-commits

Differential Revision: https://reviews.llvm.org/D43105

llvm-svn: 326045
2018-02-25 03:58:23 +00:00
Yonghong Song 8b1e93b7d6 bpf: Hook target feature "alu32" with LLVM
LLVM has supported a new target feature "alu32" which could be enabled or
disabled by "-mattr=[+|-]alu32" when using llc.

This patch link Clang with it, so it could be also done by passing related
options to Clang, for example:

  -Xclang -target-feature -Xclang +alu32

Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Reviewed-by: Yonghong Song <yhs@fb.com>
llvm-svn: 325996
2018-02-23 23:55:29 +00:00
Craig Topper 94a940d2b4 [X86] Disable CLWB in Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43459

llvm-svn: 325655
2018-02-21 00:16:50 +00:00
Simon Dardis 0bc2d9b0c5 [mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It provides the option
-mindirect-jump=hazard, which instructs the LLVM backend to replace
indirect branches with their hazard barrier variants.

This option is accepted when targeting MIPS revision two or later.

The migitation strategy suggested by MIPS for these processors is to
use two hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the option -mindirect-jump=hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Implementation note: I've opted to provide this as an
-mindirect-jump={hazard,...} style option in case alternative
mitigation methods are required for other implementations of the MIPS
ISA in future, e.g. retpoline style solutions.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D43487

llvm-svn: 325651
2018-02-21 00:05:05 +00:00
Dylan McKay 8ad69f2d1f [AVR] Set the program address space in the data layout
This is accompanied by r325481 in LLVM.

llvm-svn: 325483
2018-02-19 10:46:16 +00:00
Dimitry Andric 2e3f23bbcc [X86] Add 'sahf' CPU feature to frontend
Summary:
Make clang accept `-msahf` (and `-mno-sahf`) flags to activate the
`+sahf` feature for the backend, for bug 36028 (Incorrect use of
pushf/popf enables/disables interrupts on amd64 kernels).  This was
originally submitted in bug 36037 by Jonathan Looney
<jonlooney@gmail.com>.

As described there, GCC also uses `-msahf` for this feature, and the
backend already recognizes the `+sahf` feature. All that is needed is to
teach clang to pass this on to the backend.

The mapping of feature support onto CPUs may not be complete; rather, it
was chosen to match LLVM's idea of which CPUs support this feature (see
lib/Target/X86/X86.td).

I also updated the affected test case (CodeGen/attr-target-x86.c) to
match the emitted output.

Reviewers: craig.topper, coby, efriedma, rsmith

Reviewed By: craig.topper

Subscribers: emaste, cfe-commits

Differential Revision: https://reviews.llvm.org/D43394

llvm-svn: 325446
2018-02-17 21:04:35 +00:00
Eugene Zelenko 25cae5a21f [Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 325412
2018-02-16 23:40:07 +00:00
Konstantin Zhuravlyov cf71761495 Reapply r325193
llvm-svn: 325203
2018-02-15 02:37:04 +00:00
Konstantin Zhuravlyov b7b86127f5 Revert r325193 as it breaks buildbots
llvm-svn: 325200
2018-02-15 02:27:45 +00:00
Richard Smith 47c9b5d4d6 Add missing definition for class static after r325193.
llvm-svn: 325195
2018-02-15 01:01:06 +00:00
Konstantin Zhuravlyov 5c9d4e7957 AMDGPU: Cleanup most of the macros
- Insert __AMD__ macro
- Insert __AMDGPU__ macro
- Insert __devicename__ macro
- Add missing tests for arch macros

Differential Revision: https://reviews.llvm.org/D36802

llvm-svn: 325193
2018-02-15 00:20:26 +00:00
Bruno Cardoso Lopes 6d9cf8aa9d [Modules] Add more language features to be used with requires-declaration
Features added: c99, c11, c17, cplusplus14 and cplusplus17.

rdar://problem/36328787
rdar://problem/36668431

llvm-svn: 325154
2018-02-14 19:01:03 +00:00
Yaxun Liu 651bd73c02 [AMDGPU] Change constant addr space to 4
Differential Revision: https://reviews.llvm.org/D43171

llvm-svn: 325031
2018-02-13 18:01:21 +00:00
George Karpenkov 441e8fdf94 [NFC] Extract method to SourceManager for traversing the macro "stack"
The code for going up the macro arg expansion is duplicated in many
places (and we need it for the analyzer as well, so I did not want to
duplicate it two more times).

This patch is an NFC, so the semantics should remain the same.

Differential Revision: https://reviews.llvm.org/D42458

llvm-svn: 324780
2018-02-09 23:30:07 +00:00
Matt Arsenault e7da136a74 AMDGPU: Update for datalayout change
llvm-svn: 324748
2018-02-09 16:58:41 +00:00
Konstantin Zhuravlyov 76854e7daa AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
- Remove gfx800
- Remove gfx804
- Remove gfx901
- Remove gfx903

Differential Revision: https://reviews.llvm.org/D40045

llvm-svn: 324714
2018-02-09 07:02:28 +00:00
Richard Smith 6c2b5a8ff0 [modules] Fix incorrect diagnostic mapping computation when a module changes
diagnostic settings using _Pragma within a macro.

The AST writer had previously been assuming that all diagnostic state
transitions would occur within a FileID corresponding to a file. When a
diagnostic state change occured within a macro, it was unable to form a
location for that state change and would instead corrupt the diagnostic state
of the "root" node (and thus that of the main compilation).

Also introduce a "#pragma clang __debug diag_mapping" debugging utility
that I added to track this issue down.

llvm-svn: 324695
2018-02-09 01:15:13 +00:00
Erich Keane fa69c71dce Fix UBSan issue with PPC::isValidCPUName
Apparently storing the pointer to a StringLiteral as
a StringRef caused this section of code to issue a ubsan
warning.  This will hopefully fix that.

llvm-svn: 324687
2018-02-09 00:13:49 +00:00
Erich Keane 086331b4ff Add size to constexpr Arrays
What seems to be a bug in older versions of MSVC, constexpr
member arrays with a redefinition (to force emission) require
their initial definition to have the size between the brackets.

llvm-svn: 324682
2018-02-08 23:49:40 +00:00
Erich Keane e44bdb3f70 Add Rest of Targets Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978

Most of the rest of the Targets were pretty rote, so this
patch knocks them all out at once. 

Differential Revision: https://reviews.llvm.org/D43057

llvm-svn: 324676
2018-02-08 23:16:55 +00:00
Erich Keane d45879d8ad Add NVPTX Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978
This patch adds NVPTX support for
enabling the march notes.

Differential Revision: https://reviews.llvm.org/D43045

llvm-svn: 324675
2018-02-08 23:16:00 +00:00
Erich Keane d1d85f50d0 Add X86 Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978
This patch adds X86 and X86_64 support for
enabling the march notes.

Differential Revision: https://reviews.llvm.org/D43041

llvm-svn: 324674
2018-02-08 23:15:02 +00:00
Erich Keane 3ec1743d0d Make march/target-cpu print a note with the list of valid values for ARM
When rejecting a march= or target-cpu command line parameter,
the message is quite lacking. This patch adds a note that prints
all possible values for the current target, if the target supports it.

This adds support for the ARM/AArch64 targets (more to come!). 

Differential Revision: https://reviews.llvm.org/D42978 

llvm-svn: 324673
2018-02-08 23:14:15 +00:00
Erich Keane 9176f669b4 [NFCi] Replace a couple of usages of const StringRef& with StringRef
No sense passing these by reference when a copy is about as free, and
saves on potential indirection later.

llvm-svn: 324540
2018-02-07 23:04:38 +00:00
Walter Lee 637aafc451 [Myriad] Define __ma2x5x and __ma2x8x
Summary: Add architecture defines for ma2x5x and ma2x8x.

Reviewers: jyknight

Subscribers: fedor.sergeev, MartinO

Differential Revision: https://reviews.llvm.org/D42882

llvm-svn: 324420
2018-02-06 22:39:47 +00:00
Alex Bradbury 3e1478f866 [RISCV] Create a LinuxTargetInfo when targeting Linux
Previously, RISCV32TargetInfo or RISCV64TargetInfo were created 
unconditionally. Use LinuxTargetInfo<RISCV??TargetInfo> to ensure that the 
proper OS-specific defines are present.

This patch only adds logic to instantiate LinuxTargetInfo and leaves a TODO, 
as I'm reluctant to add logic for other targets (e.g. FreeBSD, RTEMS) until 
I've produced and tested at least one binary for that OS+target combo.

Thanks to @mgrang to reporting the issue.

llvm-svn: 324170
2018-02-03 11:56:11 +00:00
Yaxun Liu f5f45e5e63 [AMDGPU] Switch to the new addr space mapping by default
This requires corresponding llvm change.

Differential Revision: https://reviews.llvm.org/D40956

llvm-svn: 324102
2018-02-02 16:08:24 +00:00
Artem Belevich fbc56a904f [CUDA] Added partial support for CUDA-9.1
Clang can use CUDA-9.1 now, though new APIs (are not implemented yet.

The major change is that headers in CUDA-9.1 went through substantial
changes that started in CUDA-9.0 which required substantial changes
in the cuda compatibility headers provided by clang.

There are two major issues:
* CUDA SDK no longer provides declarations for libdevice functions.
* A lot of device-side functions have become nvcc's builtins and
  CUDA headers no longer contain their implementations.

This patch changes the way CUDA headers are handled if we compile
with CUDA 9.x. Both 9.0 and 9.1 are affected.

* Clang provides its own declarations of libdevice functions.
* For CUDA-9.x clang now provides implementation of device-side
  'standard library' functions using libdevice.

This patch should not affect compilation with CUDA-8. There may be
some observable differences for CUDA-9.0, though they are not expected
to affect functionality.

Tested: CUDA test-suite tests for all supported combinations of:
        CUDA: 7.0,7.5,8.0,9.0,9.1
        GPU: sm_20, sm_35, sm_60, sm_70

Differential Revision: https://reviews.llvm.org/D42513

llvm-svn: 323713
2018-01-30 00:00:12 +00:00
Craig Topper ace5c37c57 [X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.
gcc recently fixed this bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83546

llvm-svn: 323552
2018-01-26 19:34:45 +00:00
Craig Topper 3672f00e01 [X86] Define __IBT__ when -mibt is specified.
llvm-svn: 323543
2018-01-26 18:31:14 +00:00
Wei Mi d1621699dc Adjust MaxAtomicInlineWidth for i386/i486 targets.
This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6.
Currently, all  MaxAtomicInlineWidth of x86-32 targets are set to 64. However,
i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg.
So in this patch MaxAtomicInlineWidth is reset as follows:
For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported.
For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg.
For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b.

Differential Revision: https://reviews.llvm.org/D42154

llvm-svn: 323281
2018-01-23 23:27:57 +00:00
Dan Gohman 59f16991b0 [WebAssembly] Factor out settings common to wasm32 and wasm64. NFC.
MaxAtomicPromoteWidth and MaxAtomicInlineWidth are 64 on both
wasm32 and wasm64, so they can be set in shared code.

llvm-svn: 323253
2018-01-23 20:22:12 +00:00
Chandler Carruth c58f2166ab Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Summary:
First, we need to explain the core of the vulnerability. Note that this
is a very incomplete description, please see the Project Zero blog post
for details:
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html

The basis for branch target injection is to direct speculative execution
of the processor to some "gadget" of executable code by poisoning the
prediction of indirect branches with the address of that gadget. The
gadget in turn contains an operation that provides a side channel for
reading data. Most commonly, this will look like a load of secret data
followed by a branch on the loaded value and then a load of some
predictable cache line. The attacker then uses timing of the processors
cache to determine which direction the branch took *in the speculative
execution*, and in turn what one bit of the loaded value was. Due to the
nature of these timing side channels and the branch predictor on Intel
processors, this allows an attacker to leak data only accessible to
a privileged domain (like the kernel) back into an unprivileged domain.

The goal is simple: avoid generating code which contains an indirect
branch that could have its prediction poisoned by an attacker. In many
cases, the compiler can simply use directed conditional branches and
a small search tree. LLVM already has support for lowering switches in
this way and the first step of this patch is to disable jump-table
lowering of switches and introduce a pass to rewrite explicit indirectbr
sequences into a switch over integers.

However, there is no fully general alternative to indirect calls. We
introduce a new construct we call a "retpoline" to implement indirect
calls in a non-speculatable way. It can be thought of loosely as
a trampoline for indirect calls which uses the RET instruction on x86.
Further, we arrange for a specific call->ret sequence which ensures the
processor predicts the return to go to a controlled, known location. The
retpoline then "smashes" the return address pushed onto the stack by the
call with the desired target of the original indirect call. The result
is a predicted return to the next instruction after a call (which can be
used to trap speculative execution within an infinite loop) and an
actual indirect branch to an arbitrary address.

On 64-bit x86 ABIs, this is especially easily done in the compiler by
using a guaranteed scratch register to pass the target into this device.
For 32-bit ABIs there isn't a guaranteed scratch register and so several
different retpoline variants are introduced to use a scratch register if
one is available in the calling convention and to otherwise use direct
stack push/pop sequences to pass the target address.

This "retpoline" mitigation is fully described in the following blog
post: https://support.google.com/faqs/answer/7625886

We also support a target feature that disables emission of the retpoline
thunk by the compiler to allow for custom thunks if users want them.
These are particularly useful in environments like kernels that
routinely do hot-patching on boot and want to hot-patch their thunk to
different code sequences. They can write this custom thunk and use
`-mretpoline-external-thunk` *in addition* to `-mretpoline`. In this
case, on x86-64 thu thunk names must be:
```
  __llvm_external_retpoline_r11
```
or on 32-bit:
```
  __llvm_external_retpoline_eax
  __llvm_external_retpoline_ecx
  __llvm_external_retpoline_edx
  __llvm_external_retpoline_push
```
And the target of the retpoline is passed in the named register, or in
the case of the `push` suffix on the top of the stack via a `pushl`
instruction.

There is one other important source of indirect branches in x86 ELF
binaries: the PLT. These patches also include support for LLD to
generate PLT entries that perform a retpoline-style indirection.

The only other indirect branches remaining that we are aware of are from
precompiled runtimes (such as crt0.o and similar). The ones we have
found are not really attackable, and so we have not focused on them
here, but eventually these runtimes should also be replicated for
retpoline-ed configurations for completeness.

For kernels or other freestanding or fully static executables, the
compiler switch `-mretpoline` is sufficient to fully mitigate this
particular attack. For dynamic executables, you must compile *all*
libraries with `-mretpoline` and additionally link the dynamic
executable and all shared libraries with LLD and pass `-z retpolineplt`
(or use similar functionality from some other linker). We strongly
recommend also using `-z now` as non-lazy binding allows the
retpoline-mitigated PLT to be substantially smaller.

When manually apply similar transformations to `-mretpoline` to the
Linux kernel we observed very small performance hits to applications
running typical workloads, and relatively minor hits (approximately 2%)
even for extremely syscall-heavy applications. This is largely due to
the small number of indirect branches that occur in performance
sensitive paths of the kernel.

When using these patches on statically linked applications, especially
C++ applications, you should expect to see a much more dramatic
performance hit. For microbenchmarks that are switch, indirect-, or
virtual-call heavy we have seen overheads ranging from 10% to 50%.

However, real-world workloads exhibit substantially lower performance
impact. Notably, techniques such as PGO and ThinLTO dramatically reduce
the impact of hot indirect calls (by speculatively promoting them to
direct calls) and allow optimized search trees to be used to lower
switches. If you need to deploy these techniques in C++ applications, we
*strongly* recommend that you ensure all hot call targets are statically
linked (avoiding PLT indirection) and use both PGO and ThinLTO. Well
tuned servers using all of these techniques saw 5% - 10% overhead from
the use of retpoline.

We will add detailed documentation covering these components in
subsequent patches, but wanted to make the core functionality available
as soon as possible. Happy for more code review, but we'd really like to
get these patches landed and backported ASAP for obvious reasons. We're
planning to backport this to both 6.0 and 5.0 release streams and get
a 5.0 release with just this cherry picked ASAP for distros and vendors.

This patch is the work of a number of people over the past month: Eric, Reid,
Rui, and myself. I'm mailing it out as a single commit due to the time
sensitive nature of landing this and the need to backport it. Huge thanks to
everyone who helped out here, and everyone at Intel who helped out in
discussions about how to craft this. Also, credit goes to Paul Turner (at
Google, but not an LLVM contributor) for much of the underlying retpoline
design.

Reviewers: echristo, rnk, ruiu, craig.topper, DavidKreitzer

Subscribers: sanjoy, emaste, mcrosier, mgorny, mehdi_amini, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41723

llvm-svn: 323155
2018-01-22 22:05:25 +00:00
Craig Topper 8cdb94901d [X86] Add rdpid command line option and intrinsics.
Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already been made.

Reviewers: RKSimon, spatel, zvi, AndreiGrischenko

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42272

llvm-svn: 323047
2018-01-20 18:36:52 +00:00
Craig Topper 035bf77426 [X86] Put the code that defines __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 for the preprocessor with the other __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* defines. NFC
llvm-svn: 323046
2018-01-20 18:36:06 +00:00
Abderrazek Zaafrani ce8746d178 [AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792

llvm-svn: 323006
2018-01-19 23:11:18 +00:00
Dan Gohman d0c4e1e9fc [WebAssembly] Add target flags for sign-ext opcodes.
Add -msign-ext and -mno-sign-ext to control the new sign-ext target
feature.

llvm-svn: 322967
2018-01-19 17:16:32 +00:00
Nico Weber 8321ad9ffc Make DiagnosticsEngine() take DiagOpts as DiagnosticsEngine.
No behavior change, but makes it a bit clearer that DiagnosticsEngine adds a
ref to DiagOpts.

llvm-svn: 322611
2018-01-17 02:55:27 +00:00
Ulrich Weigand e1d2d22d2a [SystemZ] Support vector registers with inline asm
Allow using vector register names and the "v" constraint
in inline asm to ensure compatibility with GCC.

llvm-svn: 322562
2018-01-16 15:39:23 +00:00
Alexey Bataev 647dd84422 [OPENMP] Initial codegen for `target teams distribute parallel for
simd`.

Added host codegen + codegen for devices with default codegen for
`#pragma omp target teams distribute parallel for simd` directive.

llvm-svn: 322515
2018-01-15 20:59:40 +00:00
Alexey Bataev 8451efad89 [OPENMP] Add codegen for `depend` clauses on `target` directive.
Added basic support for codegen of `depend` clauses on `target`
directive.

llvm-svn: 322501
2018-01-15 19:06:12 +00:00
Alex Bradbury 71f45455e1 [RISCV] Add the RISCV target and compiler driver
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver 
support (RV64 to follow).

Differential Revision: https://reviews.llvm.org/D39963

llvm-svn: 322276
2018-01-11 13:36:56 +00:00
Craig Topper a1ef12a051 [X86] Make -mavx512f imply -mfma and -mf16c in the frontend like it does in the backend.
Similarly, make -mno-fma and -mno-f16c imply -mno-avx512f.

Withou this  "-mno-sse -mavx512f" ends up with avx512f being enabled in the frontend but disabled in the backend.

llvm-svn: 322245
2018-01-11 01:37:59 +00:00
Oren Ben Simhon 57cc1a5d77 Added Control Flow Protection Flag
Cf-protection is a target independent flag that instructs the back-end to instrument control flow mechanisms like: Branch, Return, etc.
For example in X86 this flag will be used to instrument Indirect Branch Tracking instructions.

Differential Revision: https://reviews.llvm.org/D40478

Change-Id: I5126e766c0e6b84118cae0ee8a20fe78cc373dea
llvm-svn: 322063
2018-01-09 08:53:59 +00:00
Erich Keane 281d20b601 Implement Attribute Target MultiVersioning
GCC's attribute 'target', in addition to being an optimization hint,
also allows function multiversioning. We currently have the former
implemented, this is the latter's implementation.

This works by enabling functions with the same name/signature to coexist,
so that they can all be emitted. Multiversion state is stored in the
FunctionDecl itself, and SemaDecl manages the definitions.
Note that it ends up having to permit redefinition of functions so
that they can all be emitted. Additionally, all versions of the function
must be emitted, so this also manages that.

Note that this includes some additional rules that GCC does not, since
defining something as a MultiVersion function after a usage has been made illegal.

The only 'history rewriting' that happens is if a function is emitted before
it has been converted to a multiversion'ed function, at which point its name
needs to be changed.

Function templates and virtual functions are NOT yet supported (not supported
in GCC either).

Additionally, constructors/destructors are disallowed, but the former is 
planned.

llvm-svn: 322028
2018-01-08 21:34:17 +00:00
Volodymyr Sapsai 4ea49798a9 Fix TLS support check for Darwin 32-bit simulator targets.
Also instead of checking architecture explicitly, use recently added
"simulator" environment in the triple.

rdar://problem/35083787

Reviewers: arphaman, bob.wilson

Reviewed By: arphaman

Subscribers: gparker42, cfe-commits

Differential Revision: https://reviews.llvm.org/D41750

llvm-svn: 321890
2018-01-05 20:20:03 +00:00
Bruno Cardoso Lopes 8587dfd94b Reapply r321781: [Modules] Allow modules specified by -fmodule-map-file to shadow implicitly found ones
When modules come from module map files explicitly specified by
-fmodule-map-file= arguments, allow those to override/shadow modules
with the same name that are found implicitly by header search. If such a
module is looked up by name (e.g. @import), we will always find the one
from -fmodule-map-file. If we try to use a shadowed module by including
one of its headers report an error.

This enables developers to force use of a specific copy of their module
to be used if there are multiple copies that would otherwise be visible,
for example if they develop modules that are installed in the default
search paths.

Patch originally by Ben Langmuir,
http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20151116/143425.html

Based on cfe-dev discussion:
http://lists.llvm.org/pipermail/cfe-dev/2015-November/046164.html

Differential Revision: https://reviews.llvm.org/D31269

rdar://problem/23612102

llvm-svn: 321855
2018-01-05 02:33:18 +00:00
Bruno Cardoso Lopes fec26b0bbb Revert "[Modules] Allow modules specified by -fmodule-map-file to shadow implicitly found ones"
This reverts r321781 until I fix the leaks pointed out by bots:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12146
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/3741

llvm-svn: 321786
2018-01-04 07:31:24 +00:00
Bruno Cardoso Lopes b6ec4a33fb [Modules] Allow modules specified by -fmodule-map-file to shadow implicitly found ones
When modules come from module map files explicitly specified by
-fmodule-map-file= arguments, allow those to override/shadow modules
with the same name that are found implicitly by header search. If such a
module is looked up by name (e.g. @import), we will always find the one
from -fmodule-map-file. If we try to use a shadowed module by including
one of its headers report an error.

This enables developers to force use of a specific copy of their module
to be used if there are multiple copies that would otherwise be visible,
for example if they develop modules that are installed in the default
search paths.

Patch originally by Ben Langmuir,
http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20151116/143425.html

Based on cfe-dev discussion:
http://lists.llvm.org/pipermail/cfe-dev/2015-November/046164.html

Differential Revision: https://reviews.llvm.org/D31269

rdar://problem/23612102

llvm-svn: 321781
2018-01-04 02:17:40 +00:00
Carlo Bertolli 52978c3554 [OpenMP] Initial implementation of code generation for pragma 'target teams distribute parallel for' on host
https://reviews.llvm.org/D41709

This patch includes code generation and testing for offloading when target device is host.

llvm-svn: 321759
2018-01-03 21:12:44 +00:00
Craig Topper d2fe244a6a Revert r321504 "[X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake."
I based that commit on what was in Intel's public documentation here https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

Which specifically said CLWB wasn't until Icelake.

But I've since cross checked with SDE and it thinks these features exist on CNL and ICL. So now I don't know what to believe.

I've added test coverage of the current behavior as part of the revert so at least now have proof of what we're doing.

llvm-svn: 321547
2017-12-29 06:39:16 +00:00
Benjamin Kramer 3a13ed60ba Avoid int to string conversion in Twine or raw_ostream contexts.
Some output changes from uppercase hex to lowercase hex, no other functionality change intended.

llvm-svn: 321526
2017-12-28 16:58:54 +00:00
Craig Topper 520d055f66 [X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake.
We have cannonlake and icelake inheriting from skylake server in a switch using fallthroughs. But they aren't perfect supersets of skylake server.

llvm-svn: 321504
2017-12-27 22:26:01 +00:00
Craig Topper b36447d346 [X86] Enable avx512vpopcntdq and clwb for icelake.
Per table 1-1 of the October 2017 edition of Intel® Architecture Instruction Set Extensions and Future Features Programming Reference

llvm-svn: 321502
2017-12-27 22:25:59 +00:00
Coby Tayree a09663a5c1 [x86][icelake][vbmi2]
added vbmi2 feature recognition
added intrinsics support for vbmi2 instructions
_mm[128,256,512]_mask[z]_compress_epi[16,32]
_mm[128,256,512]_mask_compressstoreu_epi[16,32]
_mm[128,256,512]_mask[z]_expand_epi[16,32]
_mm[128,256,512]_mask[z]_expandloadu_epi[16,32]
_mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64]
_mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64]
matching a similar work on the backend (D40206)
Differential Revision: https://reviews.llvm.org/D41557

llvm-svn: 321487
2017-12-27 11:25:07 +00:00
Coby Tayree 3d9c88cfec [x86][icelake][vnni]
added vnni feature recognition
added intrinsics support for VNNI instructions
_mm256_mask_dpbusd_epi32
_mm256_maskz_dpbusd_epi32
_mm256_dpbusd_epi32
_mm256_mask_dpbusds_epi32
_mm256_maskz_dpbusds_epi32
_mm256_dpbusds_epi32
_mm256_mask_dpwssd_epi32
_mm256_maskz_dpwssd_epi32
_mm256_dpwssd_epi32
_mm256_mask_dpwssds_epi32
_mm256_maskz_dpwssds_epi32
_mm256_dpwssds_epi32
_mm128_mask_dpbusd_epi32
_mm128_maskz_dpbusd_epi32
_mm128_dpbusd_epi32
_mm128_mask_dpbusds_epi32
_mm128_maskz_dpbusds_epi32
_mm128_dpbusds_epi32
_mm128_mask_dpwssd_epi32
_mm128_maskz_dpwssd_epi32
_mm128_dpwssd_epi32
_mm128_mask_dpwssds_epi32
_mm128_maskz_dpwssds_epi32
_mm128_dpwssds_epi32
_mm512_mask_dpbusd_epi32
_mm512_maskz_dpbusd_epi32
_mm512_dpbusd_epi32
_mm512_mask_dpbusds_epi32
_mm512_maskz_dpbusds_epi32
_mm512_dpbusds_epi32
_mm512_mask_dpwssd_epi32
_mm512_maskz_dpwssd_epi32
_mm512_dpwssd_epi32
_mm512_mask_dpwssds_epi32
_mm512_maskz_dpwssds_epi32
_mm512_dpwssds_epi32
matching a similar work on the backend (D40208)
Differential Revision: https://reviews.llvm.org/D41558

llvm-svn: 321484
2017-12-27 10:37:51 +00:00
Coby Tayree 2268576fa0 [x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564

llvm-svn: 321483
2017-12-27 10:01:00 +00:00
Coby Tayree cf96c876c6 [x86][icelake][vpclmulqdq]
added vpclmulqdq feature recognition
added intrinsics support for vpclmulqdq instructions
  _mm256_clmulepi64_epi128
  _mm512_clmulepi64_epi128
matching a similar work on the backend (D40101)
Differential Revision: https://reviews.llvm.org/D41573

llvm-svn: 321480
2017-12-27 09:00:31 +00:00
Coby Tayree f4811ebc39 [x86][icelake][gfni]
added gfni feature recognition
added intrinsics support for gfni instructions
  _mm_gf2p8affineinv_epi64_epi8
  _mm_mask_gf2p8affineinv_epi64_epi8
  _mm_maskz_gf2p8affineinv_epi64_epi8
  _mm256_gf2p8affineinv_epi64_epi8
  _mm256_mask_gf2p8affineinv_epi64_epi8
  _mm256_maskz_gf2p8affineinv_epi64_epi8
  _mm512_gf2p8affineinv_epi64_epi8
  _mm512_mask_gf2p8affineinv_epi64_epi8
  _mm512_maskz_gf2p8affineinv_epi64_epi8
  _mm_gf2p8affine_epi64_epi8
  _mm_mask_gf2p8affine_epi64_epi8
  _mm_maskz_gf2p8affine_epi64_epi8
  _mm256_gf2p8affine_epi64_epi8
  _mm256_mask_gf2p8affine_epi64_epi8
  _mm256_maskz_gf2p8affine_epi64_epi8
  _mm512_gf2p8affine_epi64_epi8
  _mm512_mask_gf2p8affine_epi64_epi8
  _mm512_maskz_gf2p8affine_epi64_epi8
  _mm_gf2p8mul_epi8
  _mm_mask_gf2p8mul_epi8
  _mm_maskz_gf2p8mul_epi8
  _mm256_gf2p8mul_epi8
  _mm256_mask_gf2p8mul_epi8
  _mm256_maskz_gf2p8mul_epi8
  _mm512_gf2p8mul_epi8
  _mm512_mask_gf2p8mul_epi8
  _mm512_maskz_gf2p8mul_epi8
matching a similar work on the backend (D40373)
Differential Revision: https://reviews.llvm.org/D41582

llvm-svn: 321477
2017-12-27 08:37:47 +00:00
Coby Tayree a1e5f0c339 [x86][icelake][vaes]
added vaes feature recognition
added intrinsics support for vaes instructions, matching a similar work on the backend (D40078)
  _mm256_aesenc_epi128
  _mm512_aesenc_epi128
  _mm256_aesenclast_epi128
  _mm512_aesenclast_epi128
  _mm256_aesdec_epi128
  _mm512_aesdec_epi128
  _mm256_aesdeclast_epi128
  _mm512_aesdeclast_epi128

llvm-svn: 321474
2017-12-27 08:16:54 +00:00
Craig Topper 66b110edce [X86] Add 'prfchw' to the correct CPUs to match the backend.
llvm-svn: 321341
2017-12-22 04:51:00 +00:00
Erich Keane e8192cc15f Correct hasFeature/isValidFeatureName's handling of shstk/adx/mwaitx
https://bugs.llvm.org/show_bug.cgi?id=35721 reports that x86intrin.h
is issuing a few warnings. This is because attribute target is using
isValidFeatureName for its source. It was also discovered that two of
these were missing from hasFeature.  

Additionally, shstk is and ibu are reordered alphabetically, as came
up during code review.

llvm-svn: 321324
2017-12-21 23:27:36 +00:00
Abderrazek Zaafrani f58a132eef [AARch64] Add ARMv8.2-A FP16 vector intrinsics
Putting back the code that was reverted few weeks ago.

Differential Revision: https://reviews.llvm.org/D34161

llvm-svn: 321294
2017-12-21 19:20:01 +00:00
Gabor Horvath 53b5c13b9d Make DiagnosticIDs::getAllDiagnostics use std::vector. NFC.
The size of the result vector is currently around 4600 with
Flavor::WarningOrError, which makes std::vector a better candidate than
llvm::SmallVector.

Patch by: Andras Leitereg!

Differential Revision: https://reviews.llvm.org/D39372

llvm-svn: 321190
2017-12-20 16:55:41 +00:00
Pavel Labath bf8519b5c9 Remove llvm::MemoryBuffer const_casts
Summary:
llvm has grown a WritableMemoryBuffer class, which is convertible
(inherits from) a MemoryBuffer. We can use it to avoid conts_casting the
buffer contents when we want to write to it.

Reviewers: dblaikie, rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41387

llvm-svn: 321167
2017-12-20 11:34:38 +00:00
Richard Smith c70f1d63f8 [c++20] P0515R3: Parsing support and basic AST construction for operator <=>.
Adding the new enumerator forced a bunch more changes into this patch than I
would have liked. The -Wtautological-compare warning was extended to properly
check the new comparison operator, clang-format needed updating because it uses
precedence levels as weights for determining where to break lines (and several
operators increased their precedence levels with this change), thread-safety
analysis needed changes to build its own IL properly for the new operator.

All "real" semantic checking for this operator has been deferred to a future
patch. For now, we use the relational comparison rules and arbitrarily give
the builtin form of the operator a return type of 'void'.

llvm-svn: 320707
2017-12-14 15:16:18 +00:00
Alexey Bataev fbe17fb8a5 [OPENMP] Initial codegen for `target teams distribute simd` directive.
Host + generic device codegen for `target teams distribute simd`
directive.

llvm-svn: 320608
2017-12-13 19:45:06 +00:00
Krzysztof Parzyszek cc5cd2c013 [Hexagon] Add front-end support for Hexagon V65
llvm-svn: 320579
2017-12-13 13:48:07 +00:00
Aleksandar Beserminji 92985796dc [mips] Minor update to the comment (NFC)
llvm-svn: 320354
2017-12-11 12:12:16 +00:00
Aleksandar Beserminji 8ee5296152 [mips] Removal of microMIPS64R6
microMIPS64R6 is removed from backend, and therefore frontend
will show an error when target is microMIPS64R6.

This is Clang part of patch.

Differential Revision: https://reviews.llvm.org/D35624

llvm-svn: 320351
2017-12-11 11:29:17 +00:00
Akira Hatanaka 502775a2ee [CodeGen][X86] Fix handling of __fp16 vectors.
This commit fixes a bug in IRGen where it generates completely broken
code for __fp16 vectors on X86. For example when the following code is
compiled:

half4 hv0, hv1, hv2; // these are vectors of __fp16.

void foo221() {
  hv0 = hv1 + hv2;
}

clang generates the following IR, in which two i16 vectors are added:

@hv1 = common global <4 x i16> zeroinitializer, align 8
@hv2 = common global <4 x i16> zeroinitializer, align 8
@hv0 = common global <4 x i16> zeroinitializer, align 8

define void @foo221() {
  %0 = load <4 x i16>, <4 x i16>* @hv1, align 8
  %1 = load <4 x i16>, <4 x i16>* @hv2, align 8
  %add = add <4 x i16> %0, %1
  store <4 x i16> %add, <4 x i16>* @hv0, align 8
  ret void
}

To fix the bug, this commit uses the code committed in r314056, which
modified clang to promote and truncate __fp16 vectors to and from float
vectors in the AST. It also fixes another IRGen bug where a short value
is assigned to an __fp16 variable without any integer-to-floating-point
conversion, as shown in the following example:

__fp16 a;
short b;

void foo1() {
  a = b;
}

@b = common global i16 0, align 2
@a = common global i16 0, align 2

define void @foo1() #0 {
  %0 = load i16, i16* @b, align 2
  store i16 %0, i16* @a, align 2
  ret void
}

rdar://problem/20625184

Differential Revision: https://reviews.llvm.org/D40112

llvm-svn: 320215
2017-12-09 00:02:37 +00:00
Alexey Bataev dfa430f694 [OPENMP] Initial codegen for `target teams distribute` directive.
Host + default devices codegen for `target teams distribute` directive.

llvm-svn: 320149
2017-12-08 15:03:50 +00:00
Sven van Haastregt 3bb7eaf72e [OpenCL] Fix layering violation by getOpenCLTypeAddrSpace
Commit 7ac28eb0a5 / r310911 ("[OpenCL] Allow targets to select address
space per type", 2017-08-15) made Basic depend on AST, introducing a
circular dependency.  Break this dependency by adding the
OpenCLTypeKind enum in Basic and map from AST types to this enum in
ASTContext.

Differential Revision: https://reviews.llvm.org/D40838

llvm-svn: 319883
2017-12-06 10:11:28 +00:00
Dan Gohman b24e9dbafe [WebAssembly] Don't use Wasm function sections for more than one function
Patch by Nicholas Wilson!

Fixes PR35467.

Differential Revision: https://reviews.llvm.org/D40738

llvm-svn: 319801
2017-12-05 17:46:17 +00:00
Matt Arsenault e4f6280a26 AMDGPU: Don't add fp64 feature to r600 subtargets
Should fix test after r319709

llvm-svn: 319735
2017-12-05 03:51:26 +00:00
Carlo Bertolli 56a2aa4ddc [OpenMP] Initial implementation of code generation for pragma 'teams distribute parallel for simd' on host
https://reviews.llvm.org/D40795

This includes regression tests for all associated clauses.

llvm-svn: 319696
2017-12-04 20:57:19 +00:00
Aaron Ballman c351fba69e Now that C++17 is official (https://www.iso.org/standard/68564.html), start changing the C++1z terminology over to C++17. NFC intended, these are all mechanical changes.
llvm-svn: 319688
2017-12-04 20:27:34 +00:00
Martell Malone c950c651a4 Toolchain: Normalize dwarf, sjlj and seh eh
This is a re-apply of r319294.

adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

-fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319297
2017-11-29 07:25:12 +00:00
Martell Malone 2fa25706ed Revert "Toolchain: Normalize dwarf, sjlj and seh eh"
This reverts rL319294.
The windows sanitizer does not like seh on x86.
Will re apply with None type for x86

llvm-svn: 319295
2017-11-29 06:51:27 +00:00
Martell Malone 390cfcb0b1 Toolchain: Normalize dwarf, sjlj and seh eh
adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

clang cc1 assumes dwarf is the default if none is passed
and -fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319294
2017-11-29 06:25:13 +00:00
Alexey Bataev 2ba67045e3 [OPENMP] Generalize capturing of clauses expressions.
The handling and capturing of the non-constant expressions of some of
the capturable clauses in combined directives is generalized.

llvm-svn: 319227
2017-11-28 21:11:44 +00:00
Dan Gohman 0811cd1d15 [WebAssembly] Add options for using the nontrapping-fptoint feature.
This adds ways to control use of WebAssembly's new nontrapping-fptoint
feature.

llvm-svn: 319129
2017-11-28 01:13:45 +00:00
Alexey Bataev 974acd6b13 [OPENMP] Codegen for `distribute parallel for simd` directive.
Added proper codegen for `distribute parallel for simd` directive.

llvm-svn: 319078
2017-11-27 19:38:52 +00:00
Oren Ben Simhon fec21ec0c6 Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)
Shadow stack solution introduces a new stack for return addresses only.
The stack has a Shadow Stack Pointer (SSP) that points to the last address to which we expect to return.
If we return to a different address an exception is triggered.
This patch includes shadow stack intrinsics as well as the corresponding CET header.
It includes CET clang flags for shadow stack and Indirect Branch Tracking.

For more information, please see the following:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

Differential Revision: https://reviews.llvm.org/D40224

Change-Id: I79ad0925a028bbc94c8ecad75f6daa2f214171f1
llvm-svn: 318995
2017-11-26 12:34:54 +00:00
Alexey Bataev 7f96c375ac [OPENMP] General improvement of code, NFC.
llvm-svn: 318849
2017-11-22 17:19:31 +00:00
Erich Keane 0a340ab31c [X86] Update CPUSupports code to reuse LLVM .def file [NFC]
llvm-svn: 318815
2017-11-22 00:54:01 +00:00
Alexey Bataev 7828b25251 [OPENMP] Initial support for asynchronous data update, NFC.
OpenMP 5.0 introduces asynchronous data update/dependecies clauses on
target data directives. Patch adds initial support for outer task
regions to use task-based codegen for future async target data
directives.

llvm-svn: 318781
2017-11-21 17:08:48 +00:00
Martell Malone 051e966e49 [MINGW] normalize WIN32 macros
move _WIN64 and _WIN32 defines to lib/Basic/Targets/OSTargets.h
move WIN32, WIN64 and __MINGW64__ to addMinGWDefines

fixes __MINGW64__ not being defined for aarch64
adds WIN32 definition for x64

Reviewers: mstorsjo

Differential Revision: https://reviews.llvm.org/D40285

llvm-svn: 318755
2017-11-21 11:28:29 +00:00
Coby Tayree afdaa6704f [x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blob
Differential Revision: https://reviews.llvm.org/D38445

llvm-svn: 318739
2017-11-21 08:50:10 +00:00
Reid Kleckner 13a3d9eb7b [MS] Increase default new alignment for win64 and test it
Summary:
This raises __STDCPP_DEFAULT_NEW_ALIGNMENT__ from 8 to 16 on Win64.
This matches platforms that follow the usual `2 * sizeof(void*)`
alignment requirement for malloc. We might want to consider making that
the default rather than relying on long double alignment.

Fixes PR35356

Reviewers: STL_MSFT, rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40277

llvm-svn: 318723
2017-11-21 01:25:56 +00:00
Craig Topper 0ff0fbbd6b [X86] Remove 'mm3now' from isValidFeatureName.
The correct spelling is '3dnow' which is already in the list.

llvm-svn: 318716
2017-11-21 00:33:26 +00:00
Carlo Bertolli 62fae15600 [OpenMP] Initial implementation of code generation for pragma 'teams distribute parallel for' on host
https://reviews.llvm.org/D40187

This patch implements code gen for 'teams distribute parallel for' on the host, including all its clauses and related regression tests.

llvm-svn: 318692
2017-11-20 20:46:39 +00:00
Craig Topper 546cee4170 [X86] Add icelake CPU support for -march.
llvm-svn: 318617
2017-11-19 02:55:15 +00:00
Craig Topper 222c1725cd [X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.
This is the resolution we came to in D38824.

llvm-svn: 318616
2017-11-19 02:55:14 +00:00
Jonas Hahnfeld 87d4426988 [OpenMP] Show error if VLAs are not supported
Some target devices (e.g. Nvidia GPUs) don't support dynamic stack
allocation and hence no VLAs. Print errors with description instead
of failing in the backend or generating code that doesn't work.

This patch handles explicit uses of VLAs (local variable in target
or declare target region) or implicitly generated (private) VLAs
for reductions on VLAs or on array sections with non-constant size.

Differential Revision: https://reviews.llvm.org/D39505

llvm-svn: 318601
2017-11-18 21:00:46 +00:00
Alexey Bataev f836537516 [OPENMP] Codegen for `target simd` construct.
Added codegen support for `target simd` directive.

llvm-svn: 318536
2017-11-17 17:57:25 +00:00
Martin Storsjo ec82128971 [MinGW] Define __ARM_DWARF_EH__ for MinGW/ARM
Since SVN r318510, the MinGW/ARM configuration defaults to
dwarf exception handling.

Differential Revision: https://reviews.llvm.org/D39533

llvm-svn: 318511
2017-11-17 08:06:49 +00:00
Ben Hamilton 7838101678 [VirtualFileSystem] Support creating directories then adding files inside
Summary:
In https://reviews.llvm.org/D39572 , I added support for specifying
`Type` when invoking `InMemoryFileSystem::addFile()`.

However, I didn't account for the fact that when `Type` is
`directory_file`, we need to construct an `InMemoryDirectory`, not an
`InMemoryFile`, or else clients cannot create files inside that
directory.

This diff fixes the bug and adds a test.

Test Plan: New test added. Ran test with:

  % make -j12 check-clang-tools

Reviewers: bkramer, hokein

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40140

llvm-svn: 318445
2017-11-16 19:34:08 +00:00
Erich Keane 6da1108659 Split x86 "Processor" info into its own def file. [NFC]
A first step toward removing the repetition of
features/CPU info in the x86 target info, this
patch pulls all the processor information out into
its own .def file.

Differential Revision: https://reviews.llvm.org/D40093

llvm-svn: 318343
2017-11-15 22:25:39 +00:00
Erich Keane 8202521cf5 Simplify CpuIs code to use include from LLVM
LLVM exposes a file in the backend (X86TargetParser.def) that
contains information about the correct list of CpuIs values.

This patch removes 2 of the copied and pasted versions of this
list from clang and instead includes the data from the .def file.

Differential Revision: https://reviews.llvm.org/D40054

llvm-svn: 318234
2017-11-15 00:11:24 +00:00
Gabor Horvath 328d3afc3b Make DiagnosticIDs::getAllDiagnostics static. NFC.
Patch by: Andras Leitereg!

Differential Revision: https://reviews.llvm.org/D39372

llvm-svn: 318150
2017-11-14 12:14:49 +00:00
Alexey Bataev 5d7edca316 [OPENMP] Codegen for `#pragma omp target parallel for simd`.
Added codegen for `#pragma omp target parallel for simd` and clauses.

llvm-svn: 317813
2017-11-09 17:32:15 +00:00
Alexey Bataev 9a5e64f56a [OPENMP] Treat '#pragma omp target parallel for simd' as simd directive.
`#pragma omp target parallel for simd` mistakenly was not treated as a
simd directive, fixed this problem.

llvm-svn: 317811
2017-11-09 17:01:35 +00:00
Ben Hamilton e5af5bde71 [VirtualFileSystem] InMemoryFileSystem::addFile(): Type and Perms
Summary:
This implements a FIXME in InMemoryFileSystem::addFile(), allowing
clients to specify User, Group, Type, and/or Perms when creating a
file in an in-memory filesystem.

New tests included. Ran tests with:

% ninja BasicTests && ./tools/clang/unittests/Basic/BasicTests

Fixes PR#35172 (https://bugs.llvm.org/show_bug.cgi?id=35172)

Reviewers: bkramer, hokein

Reviewed By: bkramer, hokein

Subscribers: alexfh

Differential Revision: https://reviews.llvm.org/D39572

llvm-svn: 317800
2017-11-09 16:01:16 +00:00
Alexey Bataev fb0ebecf0e [OPENMP] Codegen for `#pragma omp target parallel for`.
llvm-svn: 317719
2017-11-08 20:16:14 +00:00
Mitch Phillips 512fa40b3e Update SanitizerSpecialCaseList to use renamed functions in base class.
Note: This change has a cyclical dependency on D39485. Both these changes must be submitted at the same time to avoid a build breakage.

Reviewers: vlad.tsyrklevich

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39486

llvm-svn: 317616
2017-11-07 21:16:37 +00:00
Martin Storsjo b438ea3f1c [X86] Add 3dnow and 3dnowa to the list of valid target features
These were missed in SVN r316783, which broke compiling mingw-w64 CRT.

Differential Revision: https://reviews.llvm.org/D39631

llvm-svn: 317504
2017-11-06 20:33:13 +00:00
Eugene Zelenko 918e0ca77a [Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 317381
2017-11-03 22:35:27 +00:00
Craig Topper a2b907a469 [X86] Define i586 and pentium preprocessor defines for -march=lakemont to match GCC
llvm-svn: 317069
2017-11-01 02:18:49 +00:00
Saleem Abdulrasool 1924b24aca Basic: improve coverage for Darwin targets and fix ABI
The existing coverage for the Darwin targets wasn't enough to catch all
the variations.  Improve the coverage a bit further and fix a few cases
for Darwin targets.

llvm-svn: 316826
2017-10-28 06:00:43 +00:00
Saleem Abdulrasool 418a816cdc ARM: centralise SizeType, PtrDiffType, and IntPtrType
Centralise the definitions of these compiler vended types to aid
inspection to ensure that they are defined similarly.  The one case that
stands out is the Darwin case where the types do not match up.  This
fixes the API conformance for APCS-GNU as well.

llvm-svn: 316810
2017-10-27 23:04:27 +00:00
Erich Keane cf8807c931 Filter out invalid 'target' items from being passed to LLVM
Craig noticed that CodeGen wasn't properly ignoring the
values sent to the target attribute. This patch ignores
them.

This patch also sets the 'default' for this checking to
'supported', since only X86 has implemented the support
for checking valid CPU names and Feature Names.

One test was changed to i686, since it uses a lakemont,
which would otherwise be prohibited in x86_64.

Differential Revision: https://reviews.llvm.org/D39357

llvm-svn: 316783
2017-10-27 18:32:23 +00:00
Erich Keane 3231918f4f Remove x86,x86_32/64 from isValidFeatureName
These are not valid values for this, and are pretty
non-sensical, since LLVM doesn't understand them.

Differential Revision: https://reviews.llvm.org/D39378

llvm-svn: 316781
2017-10-27 18:29:02 +00:00
Craig Topper 13cb23b8b3 [X86] Add 'sse4' to X86TargetInfo::isValidFeatureName
sse4 is valid for target attribute and functions as an alias of sse4.2.

llvm-svn: 316718
2017-10-27 00:18:16 +00:00
Craig Topper a6021e3bc1 [X86] Make -march=i686 an alias of -march=pentiumpro
I think the only reason they are different is because we don't set tune_i686 for -march=i686 to match GCC. But GCC 4.9.0 seems to have changed this behavior and they do set it now. So I think they can aliases now.

Differential Revision: https://reviews.llvm.org/D39349

llvm-svn: 316712
2017-10-26 23:06:19 +00:00
Justin Lebar 066494d8c1 [CUDA] Print an error if you try to compile with < sm_30 on CUDA 9.
Summary:
CUDA 9's minimum sm is sm_30.

Ideally we should also make sm_30 the default when compiling with CUDA
9, but that seems harder than it should be.

Subscribers: sanjoy

Differential Revision: https://reviews.llvm.org/D39109

llvm-svn: 316611
2017-10-25 21:32:06 +00:00
Craig Topper 009cebfed8 [X86] Add avx512vpopcntdq to Knights Mill
As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017.

llvm-svn: 316593
2017-10-25 17:10:58 +00:00
Erich Keane 9ec60988cd Pull X86 "CPUKind" checking into .cpp file. [NFC]
Preparing to do a refactor of CPU/feature checking, this
patch pulls the one CPU implementation from the .h file
to the .cpp file.

llvm-svn: 316338
2017-10-23 16:20:15 +00:00
Saleem Abdulrasool e5696580aa Basic: restore {,u}intptr_t on NetBSD/ARM
NetBSD uses `long int` for `intptr_t` on ARM.  This was changed in SVN
r316046, referenced against other compilers.  However, NetBSD's
reference was incorrect as the current clang behaviour is more
up-to-date.  Restore the original behaviour for that target.

llvm-svn: 316204
2017-10-20 04:11:28 +00:00
Jan Vesely cda72c9c3c AMDGPU: Parse r600 CPU name early and expose FMAF capability
Improve amdgcn macro test
Differential Revision: https://reviews.llvm.org/D38667

llvm-svn: 316181
2017-10-19 20:40:13 +00:00
Sumanth Gundapaneni 57098f5ac3 [Hexagon] Handling of new HVX flags and target-features
This patch has the following changes
A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector.
Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b"

The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag
is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx
or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The 
-mhvx flag adds the target-feature "+hvxv{hvx_version}"

The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is
still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag.

The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees
them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B"

The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag

The macro HVX_LENGTH is defined and is set to the length of the vector. 
Eg: #define HVX_LENGTH 64

The macro HVX_ARCH is defined and is set to the version of the HVX. 
Eg: #define HVX_ARCH 62

Differential Revision: https://reviews.llvm.org/D38852

llvm-svn: 316102
2017-10-18 18:10:13 +00:00
Saleem Abdulrasool 8d799f8ef9 Basic: fix __{,U}INTPTR_TYPE__ on ARM
Darwin and OpenBSD are the only platforms which use `long int` for
`__INTPTR_TYPE__`.  The other platforms use `int` in 32-bit, and `long
int` on 64-bit (except for VMS and Windows which are LLP64).  Adjust the
type definitions to match the platform definitions.  We now generate the
same definition as GCC on all the targets.

llvm-svn: 316046
2017-10-18 00:00:50 +00:00
Saleem Abdulrasool f78f7c05d4 Basic: fix `__INTPTR_TYPE__` for Windows ARM
The `IntPtrType` for Windows ARM should be `int` as per MSVC.  Adjust
the type accordingly.

llvm-svn: 316042
2017-10-17 22:49:53 +00:00
Jonas Hahnfeld 23604a8399 [OpenMP] Implement omp_is_initial_device() as builtin
This allows to return the static value that we know at compile time.

Differential Revision: https://reviews.llvm.org/D38968

llvm-svn: 316001
2017-10-17 14:28:14 +00:00
Alex Lorenz f5ca27cc37 [refactor] allow the use of refactoring diagnostics
This commit allows the refactoring library to use its own set of
refactoring-specific diagnostics to reports things like initiation errors.

Differential Revision: https://reviews.llvm.org/D38772

llvm-svn: 315924
2017-10-16 18:28:26 +00:00
Alexander Richardson 6d989436d0 Convert clang::LangAS to a strongly typed enum
Summary:
Convert clang::LangAS to a strongly typed enum

Currently both clang AST address spaces and target specific address spaces
are represented as unsigned which can lead to subtle errors if the wrong
type is passed. It is especially confusing in the CodeGen files as it is
not possible to see what kind of address space should be passed to a
function without looking at the implementation.
I originally made this change for our LLVM fork for the CHERI architecture
where we make extensive use of address spaces to differentiate between
capabilities and pointers. When merging the upstream changes I usually
run into some test failures or runtime crashes because the wrong kind of
address space is passed to a function. By converting the LangAS enum to a
C++11 we can catch these errors at compile time. Additionally, it is now
obvious from the function signature which kind of address space it expects.

I found the following errors while writing this patch:

- ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address
  space to  TargetInfo::getPointer{Width,Align}()
- TypePrinter::printAttributedAfter() prints the numeric value of the
  clang AST address space instead of the target address space.
  However, this code is not used so I kept the current behaviour
- initializeForBlockHeader() in CGBlocks.cpp was passing
  LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}()
- CodeGenFunction::EmitBlockLiteral() was passing a AST address space to
  TargetInfo::getPointerWidth()
- CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space
  to Qualifiers::addAddressSpace()
- CGOpenMPRuntimeNVPTX::getParameterAddress() was using
  llvm::Type::getPointerTo() with a AST address space
- clang_getAddressSpace() returns either a LangAS or a target address
  space. As this is exposed to C I have kept the current behaviour and
  added a comment stating that it is probably not correct.

Other than this the patch should not cause any functional changes.

Reviewers: yaxunl, pcc, bader

Reviewed By: yaxunl, bader

Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D38816

llvm-svn: 315871
2017-10-15 18:48:14 +00:00
Craig Topper f8c10aa3a3 [X86] Add skeleton support for knm cpu
This adds support Knights Mill CPU. Preprocessor defines match gcc's implementation.

Differential Revision: https://reviews.llvm.org/D38813

llvm-svn: 315723
2017-10-13 18:14:24 +00:00
Yaxun Liu b7318e02c1 [OpenCL] Add LangAS::opencl_private to represent private address space in AST
Currently Clang uses default address space (0) to represent private address space for OpenCL
in AST. There are two issues with this:

Multiple address spaces including private address space cannot be diagnosed.
There is no mangling for default address space. For example, if private int* is emitted as
i32 addrspace(5)* in IR. It is supposed to be mangled as PUAS5i but it is mangled as
Pi instead.

This patch attempts to represent OpenCL private address space explicitly in AST. It adds
a new enum LangAS::opencl_private and adds it to the variable types which are implicitly
private:

automatic variables without address space qualifier

function parameter

pointee type without address space qualifier (OpenCL 1.2 and below)

Differential Revision: https://reviews.llvm.org/D35082

llvm-svn: 315668
2017-10-13 03:37:48 +00:00
Martin Storsjo d8a44ed74c [COFF, ARM64] Add MS builtins __dmb, __dsb, __isb
Differential Revision: https://reviews.llvm.org/D38821

llvm-svn: 315567
2017-10-12 07:05:37 +00:00
Craig Topper 8c8e83a15f [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.
The compiler-rt implementation already supported it, it just wasn't exposed.

llvm-svn: 315517
2017-10-11 21:42:02 +00:00
Peter Collingbourne 0dfdb44797 Support: Have directory_iterator::status() return FindFirstFileEx/FindNextFile results on Windows.
This allows clients to avoid an unnecessary fs::status() call on each
directory entry. Because the information returned by FindFirstFileEx
is a subset of the information returned by a regular status() call,
I needed to extract a base class from file_status that contains only
that information.

On my machine, this reduces the time required to enumerate a ThinLTO
cache directory containing 520k files from almost 4 minutes to less
than 2 seconds.

Differential Revision: https://reviews.llvm.org/D38716

llvm-svn: 315378
2017-10-10 22:19:46 +00:00
Saleem Abdulrasool 729379a1e1 Driver: hoist the `wchar_t` handling to the driver
Move the logic for determining the `wchar_t` type information into the
driver.  Rather than passing the single bit of information of
`-fshort-wchar` indicate to the frontend the desired type of `wchar_t`
through a new `-cc1` option of `-fwchar-type` and indicate the
signedness through `-f{,no-}signed-wchar`.  This replicates the current
logic which was spread throughout Basic into the
`RenderCharacterOptions`.

Most of the changes to the tests are to ensure that the frontend uses
the correct type.  Add a new test set under `test/Driver/wchar_t.c` to
ensure that we calculate the proper types for the various cases.

llvm-svn: 315126
2017-10-06 23:09:55 +00:00
Carlo Bertolli ba1487ba69 [OpenMP] Initial implementation of teams distribute code generation
https://reviews.llvm.org/D38371

This patch implements codegen for the combined 'teams distribute" OpenMP pragma and adds regression tests for all its clauses.

llvm-svn: 314905
2017-10-04 14:12:09 +00:00
Walter Lee fc7f8f25f3 Add support for Myriad ma2x8x series of CPUs
Summary:
Also:
- Add support for some older Myriad CPUs that were missing.
- Fix some incorrect compiler defines for exisitng CPUs.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D37551

llvm-svn: 314706
2017-10-02 18:50:57 +00:00
Yaxun Liu 304f349770 [AMDGPU] Allow flexible register names in inline asm constraints
Currently AMDGPU inline asm only allow v and s as register names in constraints.

This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)

v

s

{vn} or {v[n]}

{sn} or {s[n]}

{S} , where S is a special register name

{v[n:m]}

{s[n:m]}

Differential Revision: https://reviews.llvm.org/D37568

llvm-svn: 314452
2017-09-28 19:07:59 +00:00
Davide Italiano 64094f8621 [Targets/X86] Remove unneded `return` in setMaxAtomicWidth(). NFCI.
llvm-svn: 314367
2017-09-28 00:24:20 +00:00
Dylan McKay 74d1e8683c [AVR] Update data layout to match current LLVM trunk
The data layout was changed in r314179 to fix atomic loads and stores.

llvm-svn: 314354
2017-09-27 22:09:01 +00:00
Saleem Abdulrasool 4d321336d0 Basic: support Preserve{Most,All} CC on Windows
Add support for the `preserve_mostcc` and `preserve_allcc` on Windows
x86_64 and AArch64.  This is used by Swift.

llvm-svn: 314236
2017-09-26 19:26:01 +00:00
Vlad Tsyrklevich 2eccdab308 Allow specifying sanitizers in blacklists
Summary:
This is the follow-up patch to D37924.

This change refactors clang to use the the newly added section headers
in SpecialCaseList to specify which sanitizers blacklists entries
should apply to, like so:

  [cfi-vcall]
  fun:*bad_vcall*
  [cfi-derived-cast|cfi-unrelated-cast]
  fun:*bad_cast*

The SanitizerSpecialCaseList class has been added to allow querying by
SanitizerMask, and SanitizerBlacklist and its downstream users have been
updated to provide that information. Old blacklists not using sections
will continue to function identically since the blacklist entries will
be placed into a '[*]' section by default matching against all
sanitizers.

Reviewers: pcc, kcc, eugenis, vsk

Reviewed By: eugenis

Subscribers: dberris, cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D37925

llvm-svn: 314171
2017-09-25 22:11:12 +00:00
Michael Zuckerman 35731a0b84 [Clang] Adding missing feature to goldmont
Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c
llvm-svn: 314104
2017-09-25 13:49:32 +00:00
Wei Mi b086289787 [Atomic][X8664] set max atomic inline width according to the target
This is to fix PR31620. MaxAtomicInlineWidth is set to 128 for x86_64. However
for target without cx16 support, 128 atomic operation will generate __sync_*
libcalls. The patch set MaxAtomicInlineWidth to 64 if the target doesn't support
cx16.

Differential Revision: https://reviews.llvm.org/D38046

llvm-svn: 313992
2017-09-22 16:30:00 +00:00
Gabor Horvath e350b0a196 Add Cross Translation Unit support library
This patch introduces a class that can help to build tools that require cross
translation unit facilities. This class allows function definitions to be loaded
from external AST files based on an index. In order to use this functionality an
index is required. The index format is a flat text file but it might be
replaced with a different solution in the near future. USRs are used as names to
look up the functions definitions. This class also does caching to avoid
redundant loading of AST files.

Right now only function defnitions can be loaded using this API because this is
what the in progress cross translation unit feature of the Static Analyzer
requires. In to future this might be extended to classes, types etc.

Differential Revision: https://reviews.llvm.org/D34512

llvm-svn: 313975
2017-09-22 11:11:01 +00:00
Craig Topper a98e1e214d [X86] Move even more of our CPU to feature mapping switch to use fallthroughs
This arranges more of the Intel and AMD CPUs into fallthrough positions based on their features. We may be able to merge this new AMD set with the BTVER or BDVER sets but I didn't look that closely.

Differential Revision: https://reviews.llvm.org/D37941

llvm-svn: 313497
2017-09-17 19:05:46 +00:00
Craig Topper 19a0a3ab68 [X86] Remove unnecessary extra encodings from the CPU name enum in clang
Summary:
For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. But many of them are effectively aliases of each other and as a result are always repeated together at every usage

This patch removes most of the duplication. It also uses StringSwitch::Cases to make the many to one mapping in the StringSwitch more obvious.

Reviewers: RKSimon, spatel, zvi, igorb

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D37938

llvm-svn: 313462
2017-09-16 16:44:39 +00:00
Douglas Gregor f0b11de279 [Module map] Introduce a private module re-export directive.
Introduce a new "export_as" directive for top-level modules, which
indicates that the current module is a "private" module whose symbols
will eventually be exported through the named "public" module. This is
in support of a common pattern in the Darwin ecosystem where a single
public framework is constructed of several private frameworks, with
(currently) header duplication and some support from the linker.

Addresses rdar://problem/34438420.

llvm-svn: 313316
2017-09-14 23:38:44 +00:00
Yaxun Liu e37793545e [AMDGPU] Change addr space of clk_event_t, queue_t and reserve_id_t to global
Differential Revision: https://reviews.llvm.org/D37703

llvm-svn: 313171
2017-09-13 18:50:42 +00:00
MinSeong Kim 7c2556a895 [Basic] Update CMakeLists.txt to handle repo
Summary:
The find_first_existing_file and find_first_existing_vc_file macros in
lib/Basic/CMakeLists.txt are removed. The macros are also defined in
{LLVM}/cmake/modules/AddLLVM.cmake for the same purpose. This change
serves the following 2 objectives:

    1. To remove the redundant code in clang to use the same
       macros in llvm,
    2. The macros in AddLLVM.cmake can also handle repo for
       displaying correct version information.

Reviewers: jordan_rose, cfe-commits, modocache, hintonda

Reviewed By: hintonda

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D35533

llvm-svn: 312865
2017-09-09 14:18:53 +00:00
Richard Smith 6d9bc278ef Fix ownership of the MemoryBuffer in a FrontendInputFile.
This fixes a possible crash on certain kinds of corrupted AST file, but
checking in an AST file corrupted in just the right way will be a maintenance
nightmare because the format changes frequently.

llvm-svn: 312851
2017-09-09 01:14:04 +00:00
Jan Vesely 31ecb4bf60 [OpenCL] Add half load and store builtins
This enables load/stores of half type, without half being a legal type.

Differential Revision: https://reviews.llvm.org/D37231

llvm-svn: 312742
2017-09-07 19:39:10 +00:00
Artem Belevich 8af4e23d1e [CUDA] Added rudimentary support for CUDA-9 and sm_70.
For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.

On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.

Differential Revision: https://reviews.llvm.org/D37576

llvm-svn: 312734
2017-09-07 18:14:32 +00:00
Erich Keane 0a539b5859 Change Diagnostic Category size error from runtime to compiletime
Diagnostic Categories are fairly annoying, and are only enforced
by a runtime-debug-only assert. This puts in a touch more work
to get this all done at compile-time with static asserts

Differential Revision: https://reviews.llvm.org/D37122

llvm-svn: 311905
2017-08-28 18:53:17 +00:00
Alex Lorenz d0e27266d8 [Basic] Add a DiagnosticError llvm::ErrorInfo subclass
Clang's DiagnosticError is an llvm::Error payload that stores a partial
diagnostic and its location. I'll be using it in the refactoring engine.

Differential Revision: https://reviews.llvm.org/D36969

llvm-svn: 311778
2017-08-25 15:48:00 +00:00
Petar Jovanovic 5076511ed6 [mips] Introducing option -mabs=[legacy/2008]
In patch r205628 using abs.[ds] instruction is forced, as they should behave
in accordance with flags Has2008 and ABS2008. Unfortunately for revisions
prior mips32r6 and mips64r6, abs.[ds] is not generating correct result when
working with NaNs. To generate a sequence which always produce a correct
result but also to allow user more control on how his code is compiled,
option -mabs is added where user can choose legacy or 2008.
By default legacy mode is used on revisions prior R6. Mips32r6 and mips64r6
use abs2008 mode by default.

Patch by Aleksandar Beserminji

Differential Revision: https://reviews.llvm.org/D35982

llvm-svn: 311669
2017-08-24 16:06:30 +00:00
Coby Tayree 7b49dc9c68 [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35205
llvm counterpart: D36369

Differential Revision: https://reviews.llvm.org/D36371

llvm-svn: 311643
2017-08-24 09:07:34 +00:00
Yonghong Song c4ea1010c1 bpf: add -mcpu=# support for bpf
-mcpu=# will support:
  . generic: the default insn set
  . v1: insn set version 1, the same as generic
  . v2: insn set version 2, version 1 + additional jmp insns
  . probe: the compiler will probe the underlying kernel to
           decide proper version of insn set.

Examples:
$ clang -target bpf -mcpu=v1 -c t.c
$ clang -target bpf -mcpu=v2 -c t.c
$ clang -target bpf -mcpu=generic -c t.c
$ clang -target bpf -mcpu=probe -c t.c
$ clang -target bpf -mcpu=v3 -c t.c
error: unknown target CPU 'v3'

Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 311523
2017-08-23 04:26:17 +00:00
Petar Jovanovic 9d1c094670 [mips] Rename getSupportedNanEncoding() to getIEEE754Standard()
Rename the function getSupportedNanEncoding() to getIEEE754Standard(), since
this function will be used for non-nan related features.

Patch by Aleksandar Beserminji.

Differential Revision: https://reviews.llvm.org/D36824

llvm-svn: 311454
2017-08-22 13:35:27 +00:00
Konstantin Zhuravlyov a42719406f AMDGPU: add missing amdgcn processors and tests
- gfx600
  - gfx601
  - gfx703
  - gfx902
  - gfx903

Differential Revision: https://reviews.llvm.org/D36771

llvm-svn: 311141
2017-08-18 01:13:39 +00:00
Sven van Haastregt efb4d4c78c [OpenCL] Allow targets to select address space per type
Generalize getOpenCLImageAddrSpace into getOpenCLTypeAddrSpace, such
that targets can select the address space per type.

No functional changes intended.

Initial patch by Simon Perretta.

Differential Revision: https://reviews.llvm.org/D33989

llvm-svn: 310911
2017-08-15 09:38:18 +00:00
Richard Smith 6c74e32139 [c++2a] Treat 'concept' and 'requires' as keywords, add compat warning for C++17 and before.
llvm-svn: 310803
2017-08-13 21:32:33 +00:00
Martin Storsjo 31cac7a67c [AArch64] Add support for a MinGW AArch64 target
Differential Revision: https://reviews.llvm.org/D36364

llvm-svn: 310798
2017-08-13 19:42:17 +00:00
Stefan Maksimovic 76391b101d Revert r310057
Bring back changes which r304953 introduced since
they were in fact not the cause of failures described
in r310057 commit message.

llvm-svn: 310702
2017-08-11 11:03:54 +00:00
Craig Topper 699ae0c173 [X86] Implement __builtin_cpu_is
This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc.

Differential Revision: https://reviews.llvm.org/D35449

llvm-svn: 310657
2017-08-10 20:28:30 +00:00
Craig Topper 41a550ccfa [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.
They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO.

llvm-svn: 310386
2017-08-08 17:43:44 +00:00
Martin Storsjo c85d26b0f3 [AArch64] Ignore stdcall and similar on aarch64/windows
This is similar to what's done on arm and x86_64, where
these calling conventions are silently ignored, as in
SVN r245076.

Differential Revision: https://reviews.llvm.org/D36105

llvm-svn: 310303
2017-08-07 20:52:04 +00:00
Yaxun Liu 39195062c2 Add OpenCL 2.0 atomic builtin functions as Clang builtin
OpenCL 2.0 atomic builtin functions have a scope argument which is ideally
represented as synchronization scope argument in LLVM atomic instructions.

Clang supports translating Clang atomic builtin functions to LLVM atomic
instructions. However it currently does not support synchronization scope
of LLVM atomic instructions. Without this, users have to use LLVM assembly
code to implement OpenCL atomic builtin functions.

This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin
functions, which supports generating LLVM atomic instructions with
synchronization scope operand.

Currently only constant memory scope argument is supported. Support of
non-constant memory scope argument will be added later.

Differential Revision: https://reviews.llvm.org/D28691

llvm-svn: 310082
2017-08-04 18:16:31 +00:00
Stefan Maksimovic 5c7aaa5ff3 Revert r304953 for release 5.0.0
This is causing failures when compiling clang with -O3
as one of the structures used by clang is passed by
value and uses the fastcc calling convention.

Faliures manifest for stage2 mips build.

llvm-svn: 310057
2017-08-04 12:37:34 +00:00
Walter Lee 4e93a6986e Define _GNU_SOURCE for RTEMS c++
Summary: This is required by the libc++ locale support.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D36121

llvm-svn: 309815
2017-08-02 14:36:52 +00:00
Ilya Biryukov 47035c0255 Use VFS operations in FileManager::makeAbsolutePath.
Summary: It used to call into llvm::sys::fs::make_absolute.

Reviewers: akyrtzi, erikjv, bkramer, krasimir, klimek

Reviewed By: klimek

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D36155

llvm-svn: 309795
2017-08-02 07:25:24 +00:00
Coby Tayree d2bb48f0bd [x86][inline-asm]Allow a pack of Control Debug to be properly picked
Allows the incorporation of legit (x86) Debug Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D36074

llvm-svn: 309672
2017-08-01 10:51:09 +00:00
Walter Lee 973131071a Move RTEMS to OSTargets.h
Differential Revision: https://reviews.llvm.org/D36106

llvm-svn: 309626
2017-07-31 21:00:16 +00:00
Martin Storsjo 588a3e5e6c [AArch64] Don't define __LP64__ when targeting Windows
Windows/ARM64 is a LLP64 environment, so don't set this default
define.

Differential Revision: https://reviews.llvm.org/D36098

llvm-svn: 309619
2017-07-31 20:40:53 +00:00
Martin Storsjo e2a247ccb0 [Targets] Move addCygMingDefines into the arch-independent Targets.cpp (NFC)
This fixes a dependency inconsistency, where addMinGWDefines in Targets.cpp
(used from other architectures than X86) called the addCygMingDefines function
in X86.h.

This was inconsistently split in SVN r308791 (D35701).

Differential Revision: https://reviews.llvm.org/D36072

llvm-svn: 309598
2017-07-31 18:17:38 +00:00
Coby Tayree 5ac75b5744 [x86][inline-asm]Allow a pack of Control Regs to be properly picked
Allows the incorporation of legit (x86) Control Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D35903

llvm-svn: 309508
2017-07-30 10:19:10 +00:00
Akira Hatanaka c47fcf0ae5 Revert r264998 and r265035.
r303175 made changes to have __cxa_allocate_exception return a 16-byte
aligned pointer, so it's no longer necessary to specify a lower
alignment (8-bytes) for exception objects on Darwin.

rdar://problem/32363695

llvm-svn: 309308
2017-07-27 18:52:44 +00:00
Florian Hahn ef5bbd61da Update to use enum classes for various ARM *Kind enums
Summary: This updates the relevant Clang parts for the LLVM change D35882.

Reviewers: rengolin, chandlerc, javed.absar, rovka

Reviewed By: rovka

Subscribers: aemerson, cfe-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D35884

llvm-svn: 309289
2017-07-27 16:28:39 +00:00
Tim Northover ad4c5db1ef AArch64 & ARM: move TargetInfo functions from .h to .cpp file. NFC.
Most of them are virtual anyway, and the few remaining ones can move to the
.cpp for consistency.

llvm-svn: 308898
2017-07-24 17:06:23 +00:00
Yuka Takahashi b40f4db4af [Bash-autocompletion] Fixed typo and add '-' after -Wno
Summary: -Wno-<warning> was autocompleted as -Wno<warning>, so fixed this typo.

Differential Revision: https://reviews.llvm.org/D35762

llvm-svn: 308824
2017-07-22 12:35:15 +00:00
Erich Keane 2b9657b570 Remove Bitrig: Clang Changes
Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned.

Differential Revision: https://reviews.llvm.org/D35708

llvm-svn: 308797
2017-07-21 22:46:31 +00:00
Erich Keane ebba592682 Break up Targets.cpp into a header/impl pair per target type[NFCI]
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing 
to cause recompilation for everyone. This patch bites the bullet and breaks 
it up into a number of files.

I tended to keep function definitions in the class declaration unless it 
caused additional includes to be necessary. In those cases, I pulled it 
over into the .cpp file. Content is copy/paste for the most part, 
besides includes/format/etc.


Differential Revision: https://reviews.llvm.org/D35701

llvm-svn: 308791
2017-07-21 22:37:03 +00:00
Alexey Bataev fa312f33f8 [OPENMP] Initial support for 'in_reduction' clause.
Parsing/sema analysis for 'in_reduction' clause for task-based
directives.

llvm-svn: 308768
2017-07-21 18:48:21 +00:00
Krzysztof Parzyszek 33e67ad098 [Hexagon] Add inline-asm constraint 'a' for modifier register class
For example
  asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")

llvm-svn: 308763
2017-07-21 18:07:15 +00:00
Artem Belevich d7a73824e4 [NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].

Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
  ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
  [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types

Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)

llvm-svn: 308675
2017-07-20 21:16:03 +00:00
Benjamin Kramer d515291ffd [vfs] Assert that the status is known in equivalent().
Otherwise we'd silently compare uninitialized data.

llvm-svn: 308604
2017-07-20 11:57:02 +00:00
Craig Topper 9377b9fa69 [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports string switch.
The validateCpuSupports switch is in the order of the enum defined in CGBuiltin.cpp and libgcc/compiler-rt.

llvm-svn: 308546
2017-07-19 22:58:58 +00:00
Erich Keane 2c748cc756 Add isValidCPUName and isValidFeature to TargetInfo
These two functions are really useful for implementations of attributes 
(including attribute-target), so add the functionality.

llvm-svn: 308530
2017-07-19 21:50:08 +00:00
Alexey Bataev 169d96a203 [OPENMP] Initial support for 'task_reduction' clause.
Parsing/sema analysis of the 'task_reduction' clause.

llvm-svn: 308352
2017-07-18 20:17:46 +00:00
Mandeep Singh Grang daa40b98ef [COFF, ARM64] Set the data type widths and the data layout string
Summary: COFF ARM64 is LLP64 platform. So int is 4 bytes, long is 4 bytes and long long is 8 bytes.

Reviewers: compnerd, ruiu, rnk, efriedma

Reviewed By: compnerd, efriedma

Subscribers: efriedma, javed.absar, cfe-commits, aemerson, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D34859

llvm-svn: 308222
2017-07-17 21:10:45 +00:00
Martin Storsjo 022e782e75 [AArch64] Add support for __builtin_ms_va_list on aarch64
Move builtins from the x86 specific scope into the global
scope. Their use is still limited to x86_64 and aarch64 though.

This allows wine on aarch64 to properly handle variadic functions.

Differential Revision: https://reviews.llvm.org/D34475

llvm-svn: 308218
2017-07-17 20:49:45 +00:00
Brian Gesiak 7873d822f7 [Basic] Detect Git submodule version in CMake
Summary:
When searching for Git version control information, libBasic's CMake
checks for the path '.git/logs/HEAD'. However, when LLVM is included as
a Git submodule, this path does not exist. Instead, it contains a '.git'
file with the following:

```
gitdir: ../../.git/modules/external/llvm
```

Where '../..' is the relative path to the root repository that contains
the LLVM Git submodule.

Because of this discrepancy, `clang --version` does not output source
control information if built from a Git submodule.

To fix, check whether '.git' is a directory or a file. If it's a
directory, simply use the '.git/logs/HEAD' path. If it's a file, read it
and check for the tell-tale sign of a Git submodule: the text "gitdir:".
If it exists, follow that path and use the 'logs/HEAD' at that location
instead. This allows not only the correct revision information to be
retrieved, but also uses a file that will change with each source
control revision.

Test Plan:
1. Before applying this change, build Clang as a Git submodule in a repository
   that places it in external/clang, and confirm no revision information
   is output when `clang --version` is invoked (just "clang 5.0.0" is
   output, no Git hashes).
2. Apply these changes and build Clang as a Git repository nested under
   llvm/tools/clang, and confirm that `clang --version` displays correct
   version information.
3. Apply these changes and build Clang as a Git submodule using the
   structure described in (1), and confirm version control information
   is output as in (2).

Reviewers: jordan_rose, beanz, probinson

Reviewed By: jordan_rose

Subscribers: chapuni, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D34955

llvm-svn: 308205
2017-07-17 19:22:57 +00:00
Ulrich Weigand 76976a7920 [SystemZ] Add support for IBM z14 processor (2/3)
This patch extends the -fzvector language feature to enable the new
"vector float" data type when compiling at -march=z14.  This matches
the updated extension definition implemented by other compilers for
the platform, which is indicated to applications by pre-defining
__VEC__ to 10302 (instead of 10301).

llvm-svn: 308198
2017-07-17 17:46:47 +00:00
Ulrich Weigand cac24ab04c [SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor.  This part includes:
- Basic support for the new processor and its features.
- Support for low-level builtins mapped to new LLVM intrinsics.

Support for the -fzvector extension to vector float and the new
high-level vector intrinsics is provided by separate patches.

llvm-svn: 308197
2017-07-17 17:45:57 +00:00
Brad Smith 733fe193d3 Enable TLS support on OpenBSD, but default to the emulatated TLS model.
llvm-svn: 308155
2017-07-17 00:49:31 +00:00
Yuka Takahashi 64918d0b25 [Bash-autocompletion] Add support for -W<warning> and -Wno<warning>
Summary:
`-W[tab]` will autocomplete warnings defined in this link:
https://clang.llvm.org/docs/DiagnosticsReference.html#wweak-vtables

Differential Revision: https://reviews.llvm.org/D35447

llvm-svn: 308139
2017-07-16 15:07:20 +00:00
Craig Topper 3544b3e501 [X86] Add 'movbe' to btver2 CPU.
This probably doesn't change anything because the frotend doesn't do anything with this feature and the backend will infer from the cpu string. So this is just for consistency with other cpus that support movbe.

llvm-svn: 308002
2017-07-14 06:36:17 +00:00
Amara Emerson ebe02904d4 [AArch64] Add support for handling the +sve target feature.
This also adds the appropriate predefine for SVE if enabled.

Differential Revision: https://reviews.llvm.org/D35118

llvm-svn: 307919
2017-07-13 15:36:01 +00:00
Simon Atanasyan 3606ebf6d6 [mips] Create the correct profiling symbol on Linux MIPS
llvm-svn: 307627
2017-07-11 06:19:01 +00:00
Yaxun Liu cbf647cc3a CodeGen: Fix address space of global variable
Certain targets (e.g. amdgcn) require global variable to stay in global or constant address
space. In C or C++ global variables are emitted in the default (generic) address space.
This patch introduces virtual functions TargetCodeGenInfo::getGlobalVarAddressSpace
and TargetInfo::getConstantAddressSpace to handle this in a general approach.

It only affects IR generated for amdgcn target.

Differential Revision: https://reviews.llvm.org/D33842

llvm-svn: 307470
2017-07-08 13:24:52 +00:00
Craig Topper 61395176f9 [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH.
llvm-svn: 307420
2017-07-07 18:41:09 +00:00
Sjoerd Meijer 98ee78578b This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it shows
problems in testing, see comments in D34161 for some more details.
A fix is in progres in D35011, but a revert seems better now as the fix will
probably take some more time to land.

llvm-svn: 307277
2017-07-06 16:37:31 +00:00
Ulrich Weigand 6d6c4808ef [SystemZ] Simplify handling of ISA revisions
This moves determination of the ISA revision from the CPU name to
one single place, removing a bunch of duplicated code.  It also
makes the supported ISA revisions available as feature strings.

No functional change.

llvm-svn: 307156
2017-07-05 13:19:47 +00:00
Yaxun Liu 25d1b4341f [AMDGPU] Fix size and alignment of size_t and pointer types
Differential Revision: https://reviews.llvm.org/D34995

llvm-svn: 307121
2017-07-05 04:58:24 +00:00
Yaxun Liu 3ba4a720ad [AMDGPU] Fix regressions on mesa/clover with libclc due to address space
Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D34987

llvm-svn: 307105
2017-07-04 19:57:18 +00:00
Hiroshi Inoue 3170de0eb8 fix trivial typos; NFC
llvm-svn: 306954
2017-07-01 08:46:43 +00:00
Yuka Takahashi dc771509a4 Changed Opts.EABIVersion type string to llvm::EABI enum class
Summary:
Changed EABIVersion type from string to llvm::EABI.
It seems it was just a typo and this is intended implementation.

Differential Revision: https://reviews.llvm.org/D34595

llvm-svn: 306953
2017-07-01 07:57:23 +00:00
Craig Topper 9dd7e808b3 [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs.
Diffential Revision: https://reviews.llvm.org/D34842

llvm-svn: 306851
2017-06-30 18:14:04 +00:00
Craig Topper 541075ded5 [X86] Add a break to the last case of a few switches to prevent accidents in the future. NFC
llvm-svn: 306850
2017-06-30 18:14:02 +00:00
Craig Topper f458bd2135 [X86] Move all atom CPUs to the same section of the switch and use fallthroughs like we do for other CPU generations. NFC
This is prep work to add MOVBE to all Atom CPUs. This instruction didn't come in to the Nehalem/Westmere/SandyBridge/etc. line until later so there's no natural place to overlap the Atom CPUs into that part of the switch.

llvm-svn: 306849
2017-06-30 18:14:01 +00:00
Sjoerd Meijer cb75f61c1d ARMV8-A archkind and target defines helper functions
This introduces helper functions that set target defines for different ARMV8-A
architecture kinds. It fixes an issue that the v8.1 define ARM_FEATURE_QRDMX
was not set for v8.2. These helper functions make things more “scalable” if we
want to add ARMv8.3 at some point, and a cleanup has been done to hold the
architecture kind in one variable (instead of one for each).

Differential Revision: https://reviews.llvm.org/D34686

llvm-svn: 306805
2017-06-30 08:07:34 +00:00
Michael Zuckerman a046ef4c26 [Clang][X86][Goldmont]Adding new target-cpu: Goldmont
[Clang-side] Connecting the GoldMont processor to his feature.


Reviewers:
1. igorb
2. delena
3. zvi


Differential Revision: https://reviews.llvm.org/D34807

llvm-svn: 306673
2017-06-29 13:41:04 +00:00
Gabor Horvath 7848b388ee Factor out a functionality from isBeforeInTranslationUnit
The first user of this API will be the cross translation unit
functionality of the Static Analyzer which will be committed in a
follow-up patch. 

Differential Revision: https://reviews.llvm.org/D34506

llvm-svn: 306648
2017-06-29 06:53:13 +00:00
Mandeep Singh Grang 2fd6b1651d [COFF, ARM64] Add support for Windows ARM64 COFF format
Summary: This is the clang part of the initial implementation to support Windows ARM64 COFF format.

Reviewers: ruiu, t.p.northover, rnk, compnerd

Reviewed By: ruiu, compnerd

Subscribers: aemerson, kristof.beyls, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D34706

llvm-svn: 306489
2017-06-27 23:56:34 +00:00
Christof Douma fb4a0450db Revert "Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc""
This reverts commit r305688 meaning it reintroduces r305684. To repeat:

[NFC] Refactor DiagnosticRenderer to use FullSourceLoc

Move the DiagnosticRenderer and its dependents to using FullSourceLocs
instead of a SourceLocation and SourceManager pointer. The changeset is
rather large but entirely mechanical.

This is step one to allow DiagnosticRenderer to take either
llvm::SMLocs or clang::SourceLocations.

This breaks clang-tidy and clng-query which will be fixed in a commit
soon after.

Patch by Sanne Wouda

Differential Revision: https://reviews.llvm.org/D31709

llvm-svn: 306384
2017-06-27 09:50:38 +00:00
Nikolai Bozhenov 35d3c35bea Reapply "Frontend support for Nios2 target"
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 306383
2017-06-27 09:48:24 +00:00
Richard Smith b4fd6a6141 Remove some redundant setup when preprocessing .pcm files.
Both of these steps are immediately overwritten by the FrontendAction setup.

llvm-svn: 306325
2017-06-26 20:15:21 +00:00
Marina Yatsina 33eb775265 [inline asm][gcc-compatiblity] "=i" output constraint support
Ignore ‘i’,’n’,’E’,’F’ as output constraints in inline assembly (gcc compatibility)

Differential Revision: https://reviews.llvm.org/D31383

llvm-svn: 306297
2017-06-26 15:55:51 +00:00
Ed Schouten 4dabea22d3 Add support for Ananas platform
Ananas is a home-brew operating system, mainly for amd64 machines. After
using GCC for quite some time, it has switched to clang and never looked
back - yet, having to manually patch things is annoying, so it'd be much
nicer if this was in the official tree.

More information:

https://github.com/zhmu/ananas/
https://rink.nu/projects/ananas.html

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D32936

llvm-svn: 306239
2017-06-25 08:29:09 +00:00
Vadzim Dambrouski 00b396c0a0 [MSP430] Fix data layout string.
Summary:
Change data layout string so it would be compatible with MSP430 EABI.

Depends on D34561

Reviewers: asl, awygle

Reviewed By: asl

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D34562

llvm-svn: 306161
2017-06-23 21:12:56 +00:00
Abderrazek Zaafrani f10ca93f34 [AArch64] ADD ARMv.2-A FP16 vector intrinsics
Differential Revision: https://reviews.llvm.org/D34161

llvm-svn: 305820
2017-06-20 18:54:57 +00:00
Richard Smith 9565c75b29 Support non-identifier module names when preprocessing modules.
llvm-svn: 305758
2017-06-19 23:09:36 +00:00
Christof Douma cc1c112806 Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc"
This reverts commit 305684.
This patch breaks extra/tools/clang-tidy

llvm-svn: 305688
2017-06-19 12:41:22 +00:00
Christof Douma f9d86db755 [NFC] Refactor DiagnosticRenderer to use FullSourceLoc
Move the DiagnosticRenderer and its dependents to using FullSourceLocs
instead of a SourceLocation and SourceManager pointer. The changeset is
rather large but entirely mechanical.

This is step one to allow DiagnosticRenderer to take either
llvm::SMLocs or clang::SourceLocations.

Patch by Sanne Wouda

Review: https://reviews.llvm.org/D31709

Change-Id: If351a112cdf6718e2d3ef6721b8da9c6376b32dd
llvm-svn: 305684
2017-06-19 12:05:58 +00:00
Daniel Jasper d078254049 Revert "Define _GNU_SOURCE for rtems c++"
This reverts commit r305399.

This breaks a build in libcxx:
libcxx/src/system_error.cpp:90:16: error: assigning to 'int' from incompatible type 'char *'
    if ((ret = ::strerror_r(ev, buffer, strerror_buff_size)) != 0) {
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Which makes sense according to:
https://linux.die.net/man/3/strerror_r

Not entirely sure how this needs to be fixed.

llvm-svn: 305456
2017-06-15 09:17:12 +00:00
James Y Knight 02b0e9d97a Define _GNU_SOURCE for rtems c++
This is required by the libc++ locale support.

Patch by Walter Lee.

Differential Revision: https://reviews.llvm.org/D34105

llvm-svn: 305399
2017-06-14 17:01:18 +00:00
Nikolai Bozhenov de57795cc8 Revert of r305066 "Reapply Frontend support for Nios2 target"
llvm-svn: 305068
2017-06-09 12:09:29 +00:00
Nikolai Bozhenov b2de17c734 Reapply "Frontend support for Nios2 target"
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 305066
2017-06-09 10:56:18 +00:00
Nikolai Bozhenov 1c36934883 Revert "Frontend support for Nios2 target"
As it breaks many buildbots.

llvm-svn: 305002
2017-06-08 18:36:35 +00:00
Nikolai Bozhenov 32dc6c8540 Frontend support for Nios2 target.
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 304994
2017-06-08 17:40:30 +00:00
Petar Jovanovic 9b5d3b6a9f Reapply r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
The test in r304929 broke multiple buildbots as it expected mips target to
be registered and available (which is not necessarily true). Updating the
test with this condition.

Original commit:

  [mips] Add runtime options to enable/disable madd.fmt and msub.fmt

  Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
  generation of madd.fmt and similar instructions respectively, as per GCC.

  Patch by Stefan Maksimovic.

llvm-svn: 304953
2017-06-07 23:51:52 +00:00
Petar Jovanovic 53900b0221 Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
Revert r304929 since the test broke buildbots.

Original commit:

  [mips] Add runtime options to enable/disable madd.fmt and msub.fmt

  Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
  generation of madd.fmt and similar instructions respectively, as per GCC.

  Patch by Stefan Maksimovic.

llvm-svn: 304935
2017-06-07 18:57:56 +00:00
Petar Jovanovic c6d9b04cc3 [mips] Add runtime options to enable/disable madd.fmt and msub.fmt
Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
generation of madd.fmt and similar instructions respectively, as per GCC.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33401

llvm-svn: 304929
2017-06-07 17:17:57 +00:00
Florian Hahn cc524bf6ac [CodeGen] Add thumb-mode to target-features for arm/thumb triples.
Summary:
The thumb-mode target feature is used to force Thumb or ARM code
generation on a per-function basis. Explicitly adding +thumb-mode to
functions for thumbxx triples enables mixed ARM/Thumb code generation in
places where compilation units with thumbxx and armxx triples are merged
together (e.g. the IR linker or LTO).

For armxx triples, -thumb-mode is added in a similar fashion.

Reviewers: echristo, t.p.northover, kristof.beyls, rengolin

Reviewed By: echristo

Subscribers: rinon, aemerson, mehdi_amini, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D33448

llvm-svn: 304897
2017-06-07 11:50:45 +00:00
Javed Absar 15b80a5b23 [ARM] Fix Neon vector type alignment to 64-bit
This is restricted version of patch - https://reviews.llvm.org/D33205
that I reverted as it was leading to ABI breaks on darwin etc.
This patch restricts the fix to AAPCS (Android remains 128-bit).
Reviewed by: Renato Golin, Stephen Hines
Differential Revision: https://reviews.llvm.org/D33786

llvm-svn: 304889
2017-06-07 10:02:02 +00:00
Dan Gohman 7dee171f69 [WebAssembly] Set MaxAtomicInlineWidth to 64.
The WebAssembly threads proposal has changed such that C++
implementations can now declare that atomics up to 64 bits are
"lock free" in C++'s terms.

llvm-svn: 304859
2017-06-07 02:22:40 +00:00
Florian Hahn 28f03bbcbb [ARM] Add support for target("arm") and target("thumb").
Summary:
This patch adds support for the target("arm") and target("thumb")
attributes, which can be used to force the compiler to generated ARM or
Thumb code for a function.

In LLVM, ARM or Thumb code generation can be controlled by the
thumb-mode target feature. But GCC already uses target("arm") and
target("thumb"), so we have to substitute "arm" with -thumb-mode and
"thumb" with +thumb-mode.


Reviewers: echristo, pcc, kristof.beyls

Reviewed By: echristo

Subscribers: ahatanak, aemerson, javed.absar, kristof.beyls, cfe-commits

Differential Revision: https://reviews.llvm.org/D33721

llvm-svn: 304781
2017-06-06 09:26:15 +00:00
Richard Smith f878a84cc4 Fix memory leak exposed by r304726.
When giving a ContentCache a null buffer, ignore the DoNotFree flag rather than
inheriting it onto whatever buffer we end up using for the file. Also ensure
that the main buffer is properly destroyed.

llvm-svn: 304740
2017-06-05 22:05:31 +00:00
Richard Smith ab75597dda Rather than rejecting attempts to run preprocessor-only actions on AST files,
replay the steps taken to create the AST file with the preprocessor-only action
installed to produce preprocessed output.

This can be used to produce the preprocessed text for an existing .pch or .pcm
file.

llvm-svn: 304726
2017-06-05 18:10:11 +00:00
Galina Kistanova ddcd2812f5 Added missing break.
llvm-svn: 304653
2017-06-03 06:40:10 +00:00
Galina Kistanova 96088f4d41 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304652
2017-06-03 06:38:22 +00:00
Richard Smith 040e12662a Support lazy stat'ing of files referenced by module maps.
This patch adds support for a `header` declaration in a module map to specify
certain `stat` information (currently, size and mtime) about that header file.
This has two purposes:

- It removes the need to eagerly `stat` every file referenced by a module map.
  Instead, we track a list of unresolved header files with each size / mtime
  (actually, for simplicity, we track submodules with such headers), and when
  attempting to look up a header file based on a `FileEntry`, we check if there
  are any unresolved header directives with that `FileEntry`'s size / mtime and
  perform deferred `stat`s if so.

- It permits a preprocessed module to be compiled without the original files
  being present on disk. The only reason we used to need those files was to get
  the `stat` information in order to do header -> module lookups when using the
  module. If we're provided with the `stat` information in the preprocessed
  module, we can avoid requiring the files to exist.

Unlike most `header` directives, if a `header` directive with `stat`
information has no corresponding on-disk file the enclosing module is *not*
marked unavailable (so that behavior is consistent regardless of whether we've
resolved a header directive, and so that preprocessed modules don't get marked
unavailable). We could actually do this for all `header` directives: the only
reason we mark the module unavailable if headers are missing is to give a
diagnostic slightly earlier (rather than waiting until we actually try to build
the module / load and validate its .pcm file).

Differential Revision: https://reviews.llvm.org/D33703

llvm-svn: 304515
2017-06-02 01:55:39 +00:00
Vedant Kumar a44a6ac81f Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"
This reverts commit r304493. It breaks all the Darwin bots:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168

Failure:
Failing Tests (2):
    Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c
    Clang :: CodeGen/arm_neon_intrinsics.c

llvm-svn: 304509
2017-06-02 01:22:14 +00:00
Abderrazek Zaafrani a44e5f601d [AArch64] Add ARMv8.2-A FP16 vefctor intrinsics
llvm-svn: 304493
2017-06-01 23:22:29 +00:00
Vedant Kumar 85a83c2ced [Modules] Handle sanitizer feature mismatches when importing modules
This patch makes it an error to have a mismatch between the enabled
sanitizers in a CU, and in any module being imported into the CU. Only
mismatches between non-modular sanitizers are treated as errors.

This patch also includes non-modular sanitizers in module hashes, in
order to ensure module rebuilds occur when -fsanitize=X is toggled on
and off for non-modular sanitizers, and to cut down on module rebuilds
when the option is toggled for modular sanitizers.

This fixes a longstanding issue with implicit modules and sanitizers,
which Duncan originally diagnosed.

When building with implicit modules it's possible to hit a scenario
where modules are built without -fsanitize=address, and are subsequently
imported into CUs with -fsanitize=address enabled. This causes strange
failures at runtime. The case Duncan found affects libcxx, since its
vector implementation behaves differently when ASan is enabled.

Implicit module builds should "just work" when -fsanitize=X is toggled
on and off across multiple compiler invocations, which is what this
patch does.

Differential Revision: https://reviews.llvm.org/D32724

llvm-svn: 304463
2017-06-01 20:01:01 +00:00
Pekka Jaaskelainen fc2629a65a [OpenCL] Makes kernels use the SPIR_KERNEL CC by default.
Rationale: OpenCL kernels are called via an explicit runtime API
with arguments set with clSetKernelArg(), not as normal sub-functions.
Return SPIR_KERNEL by default as the kernel calling convention to ensure
the fingerprint is fixed such way that each OpenCL argument gets one
matching argument in the produced kernel function argument list to enable
feasible implementation of clSetKernelArg() with aggregates etc. In case
we would use the default C calling conv here, clSetKernelArg() might
break depending on the target-specific conventions; different targets
might split structs passed as values to multiple function arguments etc.

https://reviews.llvm.org/D33639

llvm-svn: 304389
2017-06-01 07:18:49 +00:00
Javed Absar 089f678784 Reverting Neon vector type 64-alignment fix
The patch caused ABI breaks on darwin/others.
Reverting to come back with a more restrictive patch.

llvm-svn: 304220
2017-05-30 17:09:47 +00:00
Javed Absar 3d92d7ab36 [ARM] Fix Neon vector type alignment to 64-bit
The maximum alignment for ARM NEON data types should be 64-bits as specified
in ARM procedure call standard document Sec. A.2 Notes.
This patch fixes it from its current larger natural default values, except
for Android (so as not to break existing ABI).
Reviewed by: Stephen Hines, Renato Golin.
Differential Revision: https://reviews.llvm.org/D33205

llvm-svn: 304201
2017-05-30 10:12:15 +00:00
Eric Fiselier e38cea026b [coroutines] Support "coroutines" feature in module map requires clause
Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang. 

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33538

llvm-svn: 304107
2017-05-28 21:07:22 +00:00
Eric Fiselier 9208dd63ef Revert "[coroutines] Support "coroutines" feature in module map requires clause"
This reverts commit r304054.

llvm-svn: 304057
2017-05-27 03:04:51 +00:00
Eric Fiselier 0bb3bcd0ef [coroutines] Support "coroutines" feature in module map requires clause
Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang. 

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33538

llvm-svn: 304054
2017-05-27 02:46:17 +00:00
Reid Kleckner a40b38a637 Only define __SIZEOF_FLOAT128__ on x86 as intended in r304012
GCC only defines it on x86.

llvm-svn: 304013
2017-05-26 17:48:01 +00:00
Reid Kleckner 9eabbb6066 Enable __float128 for mingw for GCC compatibility and define __SIZEOF_FLOAT128__ on x86
GCC defines __FLOAT128__ on Power and __SIZEOF_FLOAT128__ on x86. We're
just following the inconsistency for now so users have some way to test.

Effectively merges this patch as requested by Martell Malone:
https://github.com/Alexpux/MINGW-packages/blob/master/mingw-w64-clang/0107-enable-__float128-for-X86-MinGW.patch

llvm-svn: 304012
2017-05-26 17:38:15 +00:00
Oren Ben Simhon 140c1fb9ec [X86] Adding avx512_vpopcntdq feature set and its intrinsics
AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170

llvm-svn: 303857
2017-05-25 13:44:11 +00:00
Saleem Abdulrasool b6e946b164 Basic: fix whitespace in file header (NFC)
llvm-svn: 303804
2017-05-24 20:27:09 +00:00
Dean Michael Berris 170429e290 [XRay][clang] Allow imbuing arg1 logging attribute via -fxray-always-instrument=
Summary:
This change allows us to add arg1 logging support to functions through
the special case list provided through -fxray-always-instrument=. This
is useful for adding arg1 logging to functions that are either in
headers that users don't have control over (i.e. cannot change the
source) or would rather not do.

It only takes effect when the pattern is matched through the "fun:"
special case, as a category. As in:

  fun:*pattern=arg1

Reviewers: pelikan, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33392

llvm-svn: 303719
2017-05-24 05:46:36 +00:00
Galina Kistanova 3677c0f1d8 Removed fallthrough annotation which does not directly precede switch label.
llvm-svn: 303653
2017-05-23 16:56:10 +00:00
Galina Kistanova 078b301bcc Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
llvm-svn: 303649
2017-05-23 16:33:07 +00:00
Yaxun Liu af3d4db64b [AMDGPU] Do not require opencl triple environment for OpenCL
A recent change requires opencl triple environment for compiling OpenCL
program, which causes regressions in libclc.

This patch fixes that. Instead of deducing language based on triple
environment, it checks LangOptions.

Differential Revision: https://reviews.llvm.org/D33445

llvm-svn: 303644
2017-05-23 16:15:53 +00:00
Reid Kleckner eb00ee07be Give files from #line the characteristics of the current file
This allows #line directives to appear in system headers that have code
that clang would normally warn on. This is compatible with GCC, which is
easy to test by running `gcc -E`.

Fixes PR30752

llvm-svn: 303582
2017-05-22 21:42:58 +00:00
Yaxun Liu 6d96f16347 CodeGen: Cast alloca to expected address space
Alloca always returns a pointer in alloca address space, which may
be different from the type defined by the language. For example,
in C++ the auto variables are in the default address space. Therefore
cast alloca to the expected address space when necessary.

Differential Revision: https://reviews.llvm.org/D32248

llvm-svn: 303370
2017-05-18 18:51:09 +00:00
James Y Knight eb96e44aea [SPARC] Support 'f' and 'e' inline asm constraints.
Patch by Patrick Boettcher.

Differential Revision: https://reviews.llvm.org/D29117

llvm-svn: 302913
2017-05-12 16:01:23 +00:00
Simon Pilgrim 3511348dbb [X86][LWP] Add clang support for LWP instructions.
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Differential Revision: https://reviews.llvm.org/D32770

llvm-svn: 302418
2017-05-08 12:09:45 +00:00
Weiming Zhao be380c711c [ARM] Limit the diagnose when an ISR calls a regular function
Summary:
When the function is compiled with soft-float or on CPU with no FPU, we
don't need to diagnose for a call from an ISR to a regular function.

Reviewers: jroelofs, eli.friedman

Reviewed By: jroelofs

Subscribers: aemerson, rengolin, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D32918

llvm-svn: 302274
2017-05-05 19:25:29 +00:00
Alex Lorenz ce4518f21d DiagnosticsEngine should clear DelayedDiagID before reporting the
delayed diagnostic

This fix avoids an infinite recursion that was uncovered in one of our internal
tests by r301992. The testcase is the most reduced version of that
auto-generated test.

This is an improved version of the reverted commit r302037. The previous fix
actually managed to expose another subtle bug whereby `fatal_too_many_errors`
error was reported twice, with the second report setting the
`FatalErrorOccurred` flag. That prevented the notes that followed the diagnostic
the caused `fatal_too_many_errors` to be emitted. This commit ensures that notes
that follow `fatal_too_many_errors` but that belong to the diagnostic that
caused `fatal_too_many_errors` won't be emitted by setting the
`FatalErrorOccurred` when emitting `fatal_too_many_errors`.

rdar://31962618

llvm-svn: 302151
2017-05-04 13:56:51 +00:00
Alex Lorenz 5191e80b87 Revert r302037
The commit caused the following two buildbot failures:

    Clang :: Misc/error-limit-multiple-notes.cpp
    Clang :: Misc/error-limit.c

llvm-svn: 302046
2017-05-03 16:22:16 +00:00
Alex Lorenz d7dfec818b DiagnosticsEngine should clear DelayedDiagID before reporting the
delayed diagnostic

This avoids an infinite loop that was uncovered in one of our internal tests
by r301992. The testcase is the most reduced version of that auto-generated
test.

rdar://31962618

llvm-svn: 302037
2017-05-03 15:41:16 +00:00
Richard Smith e37391c4fe [modules] Round-trip -Werror flag through explicit module build.
The intent for an explicit module build is that the diagnostics produced within
the module are those that were configured when the module was built, not those
that are enabled within a user of the module. This includes diagnostics that
don't actually show up until the module is used (for instance, diagnostics
produced during template instantiation and weird cases like -Wpadded).

We serialized and restored the diagnostic state for individual warning groups,
but previously did not track the state for flags like -Werror and -Weverything,
which are implemented as separate bits rather than as part of the diagnostics
mapping information.

llvm-svn: 301992
2017-05-03 00:28:49 +00:00
Duncan P. N. Exon Smith 16b1ac950b Darwin: Define __STDC_NO_THREADS__ on Darwin targets
Darwin doesn't support C11 threads.h.  Define `__STDC_NO_THREADS__` so
that users can check for it.

rdar://problem/18461003

llvm-svn: 301508
2017-04-27 01:47:22 +00:00
Carlo Bertolli ffafe10fac [OpenMP] Prepare sema to support combined constructs with omp distribute and omp for
https://reviews.llvm.org/D32237

This patch prepares sema with additional fields to support all those composite and combined constructs of OpenMP that include pragma 'distribute' and 'for', such as 'distribute parallel for'. It also extends the regression tests for 'distribute parallel for' and adds a new one.

llvm-svn: 300802
2017-04-20 00:39:39 +00:00
Alex Lorenz 9e7bf161ea Add #pragma clang attribute
This is a recommit of r300539 that was reverted in r300543 due to test failures.
The original commit message is displayed below:

The new '#pragma clang attribute' directive can be used to apply attributes to
multiple declarations. An attribute must satisfy the following conditions to
be supported by the pragma:
- It must have a subject list that's defined in the TableGen file.
- It must be documented.
- It must not be late parsed.
- It must have a GNU/C++11 spelling.

Differential Revision: https://reviews.llvm.org/D30009

llvm-svn: 300556
2017-04-18 14:33:39 +00:00
Oliver Stannard 233310f3e6 [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64
This macro is defined for arm-none-eabi as of r266625, but it should also be
defined for eabihf and aarch64.

llvm-svn: 300549
2017-04-18 13:12:36 +00:00
Alex Lorenz 3bfe962afa Revert r300539 - Add #pragma clang attribute
Some tests fail on the Windows buildbots. I will have to investigate more.
This commit reverts r300539, r300540 and r300542.

llvm-svn: 300543
2017-04-18 10:46:41 +00:00
Alex Lorenz 0a849f47d2 Add #pragma clang attribute
The new '#pragma clang attribute' directive can be used to apply attributes to
multiple declarations. An attribute must satisfy the following conditions to
be supported by the pragma:
- It must have a subject list that's defined in the TableGen file.
- It must be documented.
- It must not be late parsed.
- It must have a GNU/C++11 spelling.

Differential Revision: https://reviews.llvm.org/D30009

llvm-svn: 300539
2017-04-18 09:41:47 +00:00
Eric Christopher d26d8839d8 When we turn on vsx it should also turn on altivec explicitly, same
with disabling it as well as disabling all vsx specific features when
turning off altivec.

Fixes PR32663.

llvm-svn: 300395
2017-04-15 06:15:00 +00:00
Konstantin Zhuravlyov e668b1cd1e [AMDGPU][GFX9] Set +fp32-denormals for >=gfx900 unless -cl-denorms-are-zero is set
Differential Revision: https://reviews.llvm.org/D31482

llvm-svn: 300306
2017-04-14 05:33:57 +00:00
Duncan P. N. Exon Smith 900f817591 Serialization: Simulate -Werror settings in implicit modules
r293123 started serializing diagnostic pragma state for modules.  This
makes the serialization work properly for implicit modules.

An implicit module build (using Clang's internal build system) uses the
same PCM file location for different `-Werror` levels.

E.g., if a TU has `-Werror=format` and tries to load a PCM built without
`-Werror=format`, a new PCM will be built in its place (and the new PCM
should have the same signature, since r297655).  In the other direction,
if a TU does not have `-Werror=format` and tries to load a PCM built
with `-Werror=format`, it should "just work".

The idea is to evolve the PCM toward the strictest -Werror flags that
anyone tries.

r293123 started serializing the diagnostic pragma state for each PCM.
Since this encodes the -Werror settings at module-build time, it breaks
the implicit build model.

This commit filters the diagnostic state in order to simulate the
current compilation's diagnostic settings.  Firstly, it ignores the
module's serialized first diagnostic state, replacing it with the state
from this compilation's command-line.  Secondly, if a pragma warning was
upgraded to error/fatal when generating the PCM (e.g., due to `-Werror`
on the command-line), it checks whether it should still be upgraded in
its current context.

llvm-svn: 300025
2017-04-12 03:58:58 +00:00
David Blaikie e6b7c28d17 Modular Codegen: Add/use a bit in serialized function definitions to track whether they are the subject of modular codegen
Some decls are created not where they are written, but in other module
files/users (implicit special members and function template implicit
specializations). To correctly identify them, use a bit next to the definition
to track the modular codegen property.

Discussed whether the module file bit could be omitted in favor of
reconstituting from the modular codegen decls list - best guess today is that
the efficiency improvement of not having to deserialize the whole list whenever
any function is queried by a module user is worth it for the small size
increase of this redundant (list + bit-on-def) representation.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D29901

llvm-svn: 299982
2017-04-11 20:46:34 +00:00
Yaxun Liu b34ec829be [OpenCL] Map default address space to alloca address space
For OpenCL, the private address space qualifier is 0 in AST. Before this change, 0 address space qualifier
is always mapped to target address space 0. As now target private address space is specified by
alloca address space in data layout, address space qualifier 0 needs to be mapped to alloca addr space specified by the data layout.

This change has no impact on targets whose alloca addr space is 0.

With contributions from Matt Arsenault, Tony Tye and Wen-Heng (Jack) Chung

Differential Revision: https://reviews.llvm.org/D31404

llvm-svn: 299965
2017-04-11 17:24:23 +00:00
Alex Lorenz f127821140 [Parser][ObjC++] Improve diagnostics and recovery when C++ keywords are used
as identifiers in Objective-C++

This commit improves the 'expected identifier' errors that are presented when a
C++ keyword is used as an identifier in Objective-C++ by mentioning that this is
a C++ keyword in the diagnostic message. It also improves the error recovery:
the parser will now treat the C++ keywords as identifiers to prevent unrelated
parsing errors.

rdar://20626062

Differential Revision: https://reviews.llvm.org/D26503

llvm-svn: 299950
2017-04-11 15:01:53 +00:00
Yaxun Liu b122ed9181 [AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping
Change constant address space from 4 to 2 for the new address space mapping in Clang.

Differential Revision: https://reviews.llvm.org/D31771

llvm-svn: 299691
2017-04-06 19:18:36 +00:00
Chih-Hung Hsieh a0b99e45e9 [Basic] getColumnNumber returns location of CR+LF on Windows
When fixing a Clang-Tidy bug in D31406,
reuse of FileID enabled the missing highlightRange function.
Assertion in highlightRange failed because the end-of-range column
number was 2 + the last column of a line on Windows.
This fix is required to enable D31406.

Differential Revision: https://reviews.llvm.org/D31713

llvm-svn: 299681
2017-04-06 18:36:50 +00:00
Dean Michael Berris 835832d37a [XRay] Add -fxray-{always,never}-instrument= flags to clang
Summary:
The -fxray-always-instrument= and -fxray-never-instrument= flags take
filenames that are used to imbue the XRay instrumentation attributes
using a whitelist mechanism (similar to the sanitizer special cases
list). We use the same syntax and semantics as the sanitizer blacklists
files in the implementation.

As implemented, we respect the attributes that are already defined in
the source file (i.e. those that have the
[[clang::xray_{always,never}_instrument]] attributes) before applying
the always/never instrument lists.

Reviewers: rsmith, chandlerc

Subscribers: jfb, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D30388

llvm-svn: 299041
2017-03-30 00:29:36 +00:00
Eric Christopher fc6ffede65 Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf

the -mrtm option will still work normally.

llvm-svn: 298956
2017-03-28 23:03:19 +00:00
Erik Verbruggen dfffaf579f FileManager: mark virtual file entries as valid entries
The getVirtualFile method would create entries for e.g. libclang's
CXUnsavedFile but not mark them as valid. The effect is that a lookup
through getFile where the file name is not exactly matching the virtual
file (e.g. through mixing slashes and backslashes on Windows) would
result in a normal file "lookup", and re-using the file entry found
by using the UniqueID, and overwrite the file entry fields. Because the
lookup involves opening the file, and moving it into the file entry, the
file is now open. The SourceManager keys its buffers on the UniqueID
(which is still the same), so it will find an already loaded buffer.
Because only the loading a buffer from disk will close the file, the
FileEntry will hold on to an open file for as long as the FileManager
is around. As the FileManager will only get destroyed at a reparse,
you can't safe to the "leaked" and locked file on Windows.

llvm-svn: 298905
2017-03-28 09:18:05 +00:00
Eric Christopher 1e6fedbb83 _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit.
Adjust and add a test for the 32-bit side.

llvm-svn: 298778
2017-03-25 19:26:04 +00:00
Yaxun Liu 354097b05d [AMDGPU] Make AMDGPUTargetInfo::AS private
llvm-svn: 298773
2017-03-25 11:34:41 +00:00
Eric Christopher 19d8c1fed2 Update the comment on not yet generated preprocessor defines to remove __LONGDOUBLE128.
llvm-svn: 298771
2017-03-25 06:38:57 +00:00
Eric Christopher ee21410bdc Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles.
llvm-svn: 298770
2017-03-25 06:37:23 +00:00
Eric Christopher 0d36116394 Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as well.
llvm-svn: 298769
2017-03-25 05:40:13 +00:00
Yaxun Liu 3464f92e23 [AMDGPU] Switch address space mapping by triple environment amdgiz
For target environment amdgiz and amdgizcl (giz means Generic Is Zero), AMDGPU will use new address space mapping where generic address space is 0 and private address space is 5. The data layout is also changed correspondingly.

Differential Revision: https://reviews.llvm.org/D31210

llvm-svn: 298767
2017-03-25 03:46:25 +00:00
Eric Christopher 2fd2eda0ac Add the _CALL_LINUX preprocessor define for ppc linux platforms.
This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
our ppc suppport post-dates this and it should work on all linux platforms. It
is guaranteed to work on all elfv2 platforms.

llvm-svn: 298765
2017-03-25 03:33:59 +00:00
Eric Christopher 153dad4ca9 __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms rather
than the default of 8 in clang, fix and update tests accordingly.

llvm-svn: 298761
2017-03-25 02:55:21 +00:00
Eric Christopher b70819e6a2 Add preprocessor defines for a bare powerpc64le triple/cpu.
The le triple didn't exist until power8, so use that as a default (this
also matches what gcc does).

llvm-svn: 298759
2017-03-25 02:29:18 +00:00
Eric Christopher 3646e6289d Move setting of LangOpts based on target flags out of CompilerInstance
and into TargetInfo::adjust so that it gets called in more places
throughout the compiler (AST serialization in particular).

Should fix PPC modules after removing of faltivec.

llvm-svn: 298487
2017-03-22 06:36:09 +00:00
Eric Christopher 758aad76d8 Remove the -faltivec alias option and replace it with -maltivec everywhere.
The alias was only ever used on darwin and had some issues there,
and isn't used in practice much. Also fixes a problem with -mno-altivec
not turning off -maltivec.

Also add a diagnostic for faltivec/fno-altivec that directs users to use
maltivec options and include the altivec.h file explicitly.

llvm-svn: 298449
2017-03-21 22:06:18 +00:00
Benjamin Kramer f6021ecddc Apply clang-tidy's performance-unnecessary-value-param to parts of clang.
No functionality change intended.

llvm-svn: 298443
2017-03-21 21:35:04 +00:00
Eric Christopher 74fa24ff27 Turn on HTM on power8 and later (including powerpc64le) since it's
available by default on those cpus and configurations.

llvm-svn: 298307
2017-03-20 21:12:53 +00:00
Duncan P. N. Exon Smith 030d7d6daa Reapply "Modules: Cache PCMs in memory and avoid a use-after-free"
This reverts commit r298185, effectively reapplying r298165, after fixing the
new unit tests (PR32338).  The memory buffer generator doesn't null-terminate
the MemoryBuffer it creates; this version of the commit informs getMemBuffer
about that to avoid the assert.

Original commit message follows:

----

Clang's internal build system for implicit modules uses lock files to
ensure that after a process writes a PCM it will read the same one back
in (without contention from other -cc1 commands).  Since PCMs are read
from disk repeatedly while invalidating, building, and importing, the
lock is not released quickly.  Furthermore, the LockFileManager is not
robust in every environment.  Other -cc1 commands can stall until
timeout (after about eight minutes).

This commit changes the lock file from being necessary for correctness
to a (possibly dubious) performance hack.  The remaining benefit is to
reduce duplicate work in competing -cc1 commands which depend on the
same module.  Follow-up commits will change the internal build system to
continue after a timeout, and reduce the timeout.  Perhaps we should
reconsider blocking at all.

This also fixes a use-after-free, when one part of a compilation
validates a PCM and starts using it, and another tries to swap out the
PCM for something new.

The PCMCache is a new type called MemoryBufferCache, which saves memory
buffers based on their filename.  Its ownership is shared by the
CompilerInstance and ModuleManager.

- The ModuleManager stores PCMs there that it loads from disk, never
touching the disk if the cache is hot.

- When modules fail to validate, they're removed from the cache.

- When a CompilerInstance is spawned to build a new module, each
already-loaded PCM is assumed to be valid, and is frozen to avoid
the use-after-free.

- Any newly-built module is written directly to the cache to avoid the
round-trip to the filesystem, making lock files unnecessary for
correctness.

Original patch by Manman Ren; most testcases by Adrian Prantl!

llvm-svn: 298278
2017-03-20 17:58:26 +00:00
Renato Golin f1966cf646 Revert "Modules: Cache PCMs in memory and avoid a use-after-free"
This reverts commit r298165, as it broke the ARM builds.

llvm-svn: 298185
2017-03-18 12:31:32 +00:00
Duncan P. N. Exon Smith 079c40e886 Modules: Cache PCMs in memory and avoid a use-after-free
Clang's internal build system for implicit modules uses lock files to
ensure that after a process writes a PCM it will read the same one back
in (without contention from other -cc1 commands).  Since PCMs are read
from disk repeatedly while invalidating, building, and importing, the
lock is not released quickly.  Furthermore, the LockFileManager is not
robust in every environment.  Other -cc1 commands can stall until
timeout (after about eight minutes).

This commit changes the lock file from being necessary for correctness
to a (possibly dubious) performance hack.  The remaining benefit is to
reduce duplicate work in competing -cc1 commands which depend on the
same module.  Follow-up commits will change the internal build system to
continue after a timeout, and reduce the timeout.  Perhaps we should
reconsider blocking at all.

This also fixes a use-after-free, when one part of a compilation
validates a PCM and starts using it, and another tries to swap out the
PCM for something new.

The PCMCache is a new type called MemoryBufferCache, which saves memory
buffers based on their filename.  Its ownership is shared by the
CompilerInstance and ModuleManager.

  - The ModuleManager stores PCMs there that it loads from disk, never
    touching the disk if the cache is hot.

  - When modules fail to validate, they're removed from the cache.

  - When a CompilerInstance is spawned to build a new module, each
    already-loaded PCM is assumed to be valid, and is frozen to avoid
    the use-after-free.

  - Any newly-built module is written directly to the cache to avoid the
    round-trip to the filesystem, making lock files unnecessary for
    correctness.

Original patch by Manman Ren; most testcases by Adrian Prantl!

llvm-svn: 298165
2017-03-17 22:55:13 +00:00
Krzysztof Parzyszek ff7f6675e7 [Hexagon] Recognize hexagonv62 as a valid target CPU
llvm-svn: 297778
2017-03-14 20:29:23 +00:00
Juergen Ributzka f978743907 Reapply [VFS] Ignore broken symlinks in the directory iterator.
Modified the tests to accept any iteration order, to run only on Unix, and added
additional error reporting to investigate SystemZ bot issue.

The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts don't stat entries unless they have to
descend into the next directory, which allows to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds similar behavior to the VFS iterators. There should be no
change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297693
2017-03-14 00:14:40 +00:00
Matt Arsenault bf5e3e4391 AMDGPU: Make 0 the private nullptr value
We can't actually pretend that 0 is valid for address space 0.
r295877 added a workaround to stop allocating user objects
there, so we can use 0 as the invalid pointer.

Some of the tests seemed to be using private as the non-0 null
test address space, so add copies using local to make sure
this is still stressed.

llvm-svn: 297659
2017-03-13 19:47:53 +00:00
Duncan P. N. Exon Smith 60fa28882e Modules: Use hash of PCM content for SIGNATURE
Change ASTFileSignature from a random 32-bit number to the hash of the
PCM content.

  - Move definition ASTFileSignature to Basic/Module.h so Module and
    ASTSourceDescriptor can use it.

  - Change the signature from uint64_t to std::array<uint32_t,5>.

  - Stop using (saving/reading) the size and modification time of PCM
    files when there is a valid SIGNATURE.

  - Add UNHASHED_CONTROL_BLOCK, and use it to store the SIGNATURE record
    and other records that shouldn't affect the hash.  Because implicit
    modules reuses the same file for multiple levels of -Werror, this
    includes DIAGNOSTIC_OPTIONS and DIAG_PRAGMA_MAPPINGS.

This helps to solve a PCH + implicit Modules dependency issue: PCH files
are handled by the external build system, whereas implicit modules are
handled by internal compiler build system.  This prevents invalidating a
PCH when the compiler overwrites a PCM file with the same content
(modulo the diagnostic differences).

Design and original patch by Manman Ren!

llvm-svn: 297655
2017-03-13 18:45:08 +00:00
Juergen Ributzka 31d01baa9f Revert "Reapply [VFS] Ignore broken symlinks in the directory iterator."
Still broken on Windows and SystemZ bot ... sorry for the noise.

llvm-svn: 297533
2017-03-11 00:14:50 +00:00
Juergen Ributzka 46541f1b0b Reapply [VFS] Ignore broken symlinks in the directory iterator.
Modified the tests to accept any iteration order.

The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts allow to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds the same functionality to the VFS iterators. There should be
no change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297528
2017-03-10 22:49:04 +00:00
Juergen Ributzka bc1c5b1d04 Revert r297510 "[VFS] Ignore broken symlinks in the directory iterator."
The tests are failing on one of the bots.

llvm-svn: 297517
2017-03-10 21:46:51 +00:00
Juergen Ributzka 4a25956838 [VFS] Remove the Path variable from RealFSDirIter. NFC.
This variable is set, but never used.

llvm-svn: 297511
2017-03-10 21:23:29 +00:00
Juergen Ributzka fd958fca0b [VFS] Ignore broken symlinks in the directory iterator.
The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts allow to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds the same functionality to the VFS iterators. There should be
no change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297510
2017-03-10 21:23:27 +00:00
Yaxun Liu 4d86799219 [AMDGPU] Add builtin functions readlane ds_permute mov_dpp
Differential Revision: https://reviews.llvm.org/D30551

llvm-svn: 297436
2017-03-10 01:30:46 +00:00
Konstantin Zhuravlyov d1ba16e762 [DebugInfo] Add address space when creating DIDerivedTypes
Differential Revision: https://reviews.llvm.org/D29671

llvm-svn: 297321
2017-03-08 23:56:48 +00:00
Brad Smith 8e55bd5bbd Set the Int64Type / IntMaxType types correctly for OpenBSD/mips64
llvm-svn: 297098
2017-03-06 23:48:31 +00:00
Alex Lorenz 0e23c61c87 [Sema][ObjC] Warn about 'performSelector' calls with selectors
that return record or vector types

The performSelector family of methods from Foundation use objc_msgSend to
dispatch the selector invocations to objects. However, method calls to methods
that return record types might have to use the objc_msgSend_stret as the return
value won't find into the register. This is also supported by this sentence from
performSelector documentation: "The method should not have a significant return
value and should take a single argument of type id, or no arguments". This
commit adds a new warning that warns when a selector which corresponds to a
method that returns a record type is passed into performSelector.

rdar://12056271

Differential Revision: https://reviews.llvm.org/D30174

llvm-svn: 297019
2017-03-06 15:58:34 +00:00
Eric Christopher fb834a8278 Migrate all of aarch64-linux-gnu to \01_mcount instead of just when passing along gnueabi as this matches both gcc and what the kernel expects.
More of PR27311

llvm-svn: 296490
2017-02-28 17:22:05 +00:00
Brad Smith 3d648b357a Set ABIs correctly for OpenBSD/arm; soft float and aapcs-linux.
llvm-svn: 296430
2017-02-28 03:20:26 +00:00
Matt Arsenault a0c6dca15b AMDGPU: Add fmed3 half builtin
llvm-svn: 295874
2017-02-22 20:55:59 +00:00
Brad Smith 9aa2bf209b Hook up OpenBSD AArch64 support
llvm-svn: 295786
2017-02-21 23:13:09 +00:00
Simon Dardis df827a7165 [mips] Define macros related to -mabicalls in the preprocessor
Summary:
Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in
the preprocessor when -mabicalls is in effect.

Mainline GCC later defined __mips_abicalls when -mabicalls is in effect.

This patch teaches the preprocessor to define these macros when appropriate.

NetBSD does not require the ABICALLS macro.

This resolves PR/31694.

Thanks to Sean Bruno for highlighting this issue!

Reviewers: slthakur, seanbruno

Reviewed By: seanbruno

Subscribers: joerg, brad, emaste, seanbruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D29032

llvm-svn: 295728
2017-02-21 16:01:00 +00:00
Brad Smith 0561a5a7fe Enable support for __float128 in Clang on OpenBSD/X86
/usr/local/include/c++/4.9.4/type_traits:279:39: error: __float128 is not
supported on this target

llvm-svn: 295635
2017-02-20 03:18:15 +00:00
Matt Arsenault eb952fd93b AMDGPU: Add gfx900 and gfx901 processors
llvm-svn: 295556
2017-02-18 19:02:41 +00:00
Carlo Bertolli 8429d81202 [OpenMP] Prepare Sema for initial implementation for pragma 'distribute parallel for'
https://reviews.llvm.org/D29922

This patch adds two fields for use in the implementation of 'distribute parallel for':

The increment expression for the distribute loop. As the chunk assigned to a team is executed by multiple threads within the 'parallel for' region, the increment expression has to correspond to the value returned by the related runtime call (for_static_init).
The upper bound of the innermost loop ('for' in 'distribute parallel for') is not the globalUB expression normally used for pragma 'for' when found in isolation. It is instead the upper bound of the chunk assigned to the team ('distribute' loop). In this way, we prevent teams from executing chunks assigned to other teams.
The use of these two fields can be see in a related explanatory patch:
https://reviews.llvm.org/D29508

llvm-svn: 295497
2017-02-17 21:29:13 +00:00
Eric Christopher 32ac5e41ef Add a definition for __STRUCT_PARM_ALIGN__ for elfv2 and 64-bit darwin platforms to match what other compilers produce.
llvm-svn: 295156
2017-02-15 07:50:11 +00:00
Dylan McKay 315edb0216 [AVR] Fix __AVR_xxx macro definitions; authored by Peter Wu
Summary:
The -mmcu option for GCC sets macros like __AVR_ATmega328P__ (with the trailing
underscores), be sure to include these underscores for Clangs -mcpu option.

See "AVR Built-in Macros" in https://gcc.gnu.org/onlinedocs/gcc/AVR-Options.html

Reviewers: jroelofs, dylanmckay

Reviewed By: jroelofs, dylanmckay

Subscribers: efriedma, cfe-commits

Differential Revision: https://reviews.llvm.org/D29817

llvm-svn: 294869
2017-02-11 21:06:07 +00:00
Eric Christopher f6ee1f3d69 Temporarily revert "For X86-64 linux and PPC64 linux align int128 to 16 bytes."
until we can get better TargetMachine::isCompatibleDataLayout to compare - otherwise
we can't code generate existing bitcode without a string equality data layout.

This reverts commit r294703.

llvm-svn: 294708
2017-02-10 04:35:21 +00:00
Eric Christopher 4855ba8f24 For X86-64 linux and PPC64 linux align int128 to 16 bytes.
For other platforms we should find out what they need and likely
make the same change, however, a smaller additional change is easier
for platforms we know have it specified in the ABI.

clang support for r294702

llvm-svn: 294703
2017-02-10 03:32:34 +00:00
George Burgess IV fc9705679e Add support for armv7ve flag in clang (PR31358).
This is a followup change to add v7ve support to clang for gcc
compatibility. Please see r294661.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29773

llvm-svn: 294662
2017-02-09 23:30:10 +00:00
Craig Topper 4574226c3f [X86] Clzero flag addition and inclusion under znver1
1. Adds the command line flag for clzero.
2. Includes the clzero flag under znver1.
3. Defines the macro for clzero.
4. Adds a new file which has the intrinsic definition for clzero instruction.

Patch by Ganesh Gopalasubramanian with some additional tests from me.

Differential revision: https://reviews.llvm.org/D29386

llvm-svn: 294559
2017-02-09 06:10:14 +00:00
Craig Topper d2bf7b03e5 [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc.
llvm-svn: 294424
2017-02-08 08:23:40 +00:00
Craig Topper 204ecffdb4 [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.
llvm-svn: 294423
2017-02-08 08:23:17 +00:00
Craig Topper b16cb82c93 [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.
llvm-svn: 294419
2017-02-08 07:56:42 +00:00
Craig Topper 8c708cf6bc [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc.
In the future, we should also add a clwb intrinsic to the backend, a frontend builtin, and an instrinsic header file.

llvm-svn: 294416
2017-02-08 07:36:58 +00:00
Craig Topper 32c959dab3 [X86] Remove 'umip' feature flag.
This feature flag indicates that the processor has support for removing certain instructions from user mode software. But the feature flag by itself doesn't indicate if the support is enabled in the OS. The affected instructions aren't even instructions the compiler would emit. So I don't think think this feature flag should be in the compiler.

llvm-svn: 294414
2017-02-08 07:13:22 +00:00
Craig Topper 78b4787593 [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc.
llvm-svn: 294411
2017-02-08 06:48:58 +00:00
Craig Topper 7d494ef610 Use LLVM_FALLTHROUGH instead of FALLTHROUGH comments.
llvm-svn: 294404
2017-02-08 05:44:30 +00:00
Craig Topper c31d9e4a01 [X86] Remove PCOMMIT feature support since Intel has deprecated this instruction with no plans to release products with it.
Intel's documentation for the deprecation https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction

llvm-svn: 294403
2017-02-08 05:44:28 +00:00
Saleem Abdulrasool 5602709b98 Revert "Basic: match GCC behaviour for SuS macro"
This reverts commit SVN r294148.  Seems that it was mistaken, and GCC
does still define `__unix` and `unix` when in GNU mode.

llvm-svn: 294332
2017-02-07 19:00:06 +00:00
Dylan McKay ecb6e7b83c Revert "Revert "[AVR] Allow specifying the CPU on the command line""
This reverts commit 7ac30e0f839fdab6d723ce2ef6a5b7a4cf03d150.

llvm-svn: 294282
2017-02-07 06:04:18 +00:00
Ulrich Weigand 82a86cb155 [SystemZ] Provide predefined __ARCH__ and __VX__ macros
GCC 7 will predefine two new macros on s390x:

- __ARCH__ indicates the ISA architecture level
- __VX__ indicates that the vector facility is available

This adds those macros to clang as well to ensure continued
compatibility with GCC.

llvm-svn: 294197
2017-02-06 17:04:22 +00:00
Diana Picus 37a2d6d699 Revert "[AVR] Allow specifying the CPU on the command line"
This reverts commit r294177. It seems to have broken some buildbots.

llvm-svn: 294180
2017-02-06 11:35:42 +00:00
Dylan McKay 8464c9b579 [AVR] Allow specifying the CPU on the command line
Summary:
This tells clang about all of the different AVR microcontrollers.

It also adds code to define the correct preprocessor macros for each
device.

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, cfe-commits

Differential Revision: https://reviews.llvm.org/D28346

llvm-svn: 294177
2017-02-06 09:07:56 +00:00
Dylan McKay d31534cd3a [AVR] Add support for the full set of inline asm constraints
Summary:
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.

This adds inline assembly constraint support for the AVR target.

This patch is derived from the code in
AVRISelLowering::getConstraintType.

More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, ahatanak, saaadhu, cfe-commits

Differential Revision: https://reviews.llvm.org/D28344

llvm-svn: 294176
2017-02-06 09:01:59 +00:00
Saleem Abdulrasool c5cddc9fa8 Basic: match GCC behaviour for SuS macro
GCC does not generate `__unix` nor `unix` macros.  The latter already
intrudes into the user's namespace and should be avoided.  Use the
canonical spelling of `__unix__` across all the targets.

llvm-svn: 294148
2017-02-05 22:18:15 +00:00
David Blaikie 9ffe5a3525 Prototype of modules codegen
First pass at generating weak definitions of inline functions from module files
(& skipping (-O0) or emitting available_externally (optimizations)
definitions where those modules are used).

External functions defined in modules are emitted into the modular
object file as well (this may turn an existing ODR violation (if that
module were imported into multiple translations) into valid/linkable
code).

Internal symbols (static functions, for example) are not correctly
supported yet. The symbol will be produced, internal, in the modular
object - unreferenceable from the users.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D28845

llvm-svn: 293456
2017-01-30 05:00:26 +00:00
Richard Smith d230de27f8 Remove and replace DiagStatePoint tracking and lookup data structure.
Rather than storing a single flat list of SourceLocations where the diagnostic
state changes (in source order), we now store a separate list for each FileID
in which there is a diagnostic state transition. (State for other files is
built and cached lazily, on demand.) This has two consequences:

1) We can now sensibly support modules, and properly track the diagnostic state
for modular headers (this matters when, for instance, triggering instantiation
of a template defined within a module triggers diagnostics).

2) It's much faster than the old approach, since we can now just do a binary
search on the offsets within the FileID rather than needing to call
isBeforeInTranslationUnit to determine source order (which is surprisingly
slow). For some pathological (but real world) files, this reduces total
compilation time by more than 10%.

For now, the diagnostic state points for modules are loaded eagerly. It seems
feasible to defer this until diagnostic state information for one of the
module's files is needed, but that's not part of this patch.

llvm-svn: 293123
2017-01-26 01:01:01 +00:00
Arpith Chacko Jacob 99a1e0eba5 [OpenMP] Codegen support for 'target teams' on the host.
This patch adds support for codegen of 'target teams' on the host.
This combined directive has two captured statements, one for the
'teams' region, and the other for the 'parallel'.

This target teams region is offloaded using the __tgt_target_teams()
call. The patch sets the number of teams as an argument to
this call.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D29084

llvm-svn: 293005
2017-01-25 02:18:43 +00:00
Arpith Chacko Jacob 86f9e46365 Reverting commit because an NVPTX patch sneaked in. Break up into two
patches.

llvm-svn: 293003
2017-01-25 01:45:59 +00:00