Commit Graph

74 Commits

Author SHA1 Message Date
Javed Absar 603a2bac05 [ARM][CMSE] Add commandline option and feature macro
Defines macro ARM_FEATURE_CMSE to 1 for v8-M targets and introduces
-mcmse option which for v8-M targets sets ARM_FEATURE_CMSE to 3.
A diagnostic is produced when the option is given on architectures
without support for Security Extensions.
Reviewed By: dmgreen, snidertm
Differential Revision: https://reviews.llvm.org/D59879

llvm-svn: 361261
2019-05-21 14:21:26 +00:00
Diogo N. Sampaio 543913c3b4 [ARM] Fix the extensions implied by a cpu name
Summary:
When using `clang -mcpu=CPUNAME+FEATURELIST`,
the implied features defined by CPUNAME are
not obtained, as the entire string is passed.
This fixes that by spiting the cpuname
string in the first `+`, if any.

For example, when using
```clang -### --target=arm-arm-none-eabi -march=armv7-a -mcpu=cortex-a8+nocrc```
the intrinsic
```"target-feature" "+dsp"```
implied by `cortex-a8` is missing.

Reviewers: keith.walker.arm, DavidSpickett, carwil

Reviewed By: DavidSpickett

Subscribers: javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61668

llvm-svn: 360324
2019-05-09 10:24:36 +00:00
Dan Albert 475042d5b1 [Driver] Fix float ABI default for Android ARMv8.
Summary: Android doesn't regress back to soft float after ARMv7 :)

Reviewers: srhines, pirama

Reviewed By: srhines, pirama

Subscribers: javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58477

llvm-svn: 354622
2019-02-21 21:13:03 +00:00
Dan Albert df89c6ffa3 [Driver] Default all Android ARM targets to NEON.
Summary:
There are an insignificant number of ARM Android devices that don't
support NEON. Default to using NEON since that will improve
performance on the majority of devices. Users that need to target
non-NEON devices can still explicitly disable NEON.

Reviewers: srhines, pirama, kristof.beyls

Reviewed By: pirama

Subscribers: efriedma, javed.absar, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58153

llvm-svn: 354166
2019-02-15 20:31:54 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Peter Smith e75b6d78e0 [ARM][AArch64] Pass through endian flags to assembler and linker.
The big-endian arm32 Linux builds are currently failing when the
-mbig-endian flag is used but the binutils default on the system is little
endian. This also holds when -mlittle-endian is used and the binutils
default is big endian.

The patch always passes through -EL or -BE to the assembler and linker,
taking into account the target and the -mbig-endian and -mlittle-endian
flag.

Fixes pr38770

Differential Revision: https://reviews.llvm.org/D52784

llvm-svn: 344597
2018-10-16 09:21:17 +00:00
Dan Albert d0fbef9c75 [Driver] Add defaults for Android ARM FPUs.
Summary:
Android mandates that devices have at least vfpv3-d16 until
Marshmallow and NEON after that. Still honor the user's decision, but
raise the defaults for Android targets.

Reviewers: srhines, pirama, javed.absar, kristof.beyls, peter.smith

Reviewed By: peter.smith

Subscribers: peter.smith, rengolin, kristof.beyls, chrib, cfe-commits

Differential Revision: https://reviews.llvm.org/D53121

llvm-svn: 344367
2018-10-12 17:06:31 +00:00
Sjoerd Meijer d60540a046 [AArch64][ARM] Context sensitive meaning of crypto
For AArch64, crypto means:
- sm4 + sha3 + sha2 + aes for Armv8.4-A and up, and
- sha2 + aes for Armv8.3-A and earlier.

For AArch32:
Crypto means sha2 + aes, because the Armv8.2-A crypto instructions
were added to AArch64 only.

Differential Revision: https://reviews.llvm.org/D50179

llvm-svn: 343758
2018-10-04 07:38:53 +00:00
Sjoerd Meijer c017656202 [ARM][AArch64] Add feature +fp16fml
Armv8.4-A adds a few FP16 instructions that can optionally be implemented
in CPUs of Armv8.2-A and above.

This patch adds a feature to clang to permit selection of these
instructions. This interacts with the +fp16 option as follows:

Prior to Armv8.4-A:
*) +fp16fml implies +fp16
*) +nofp16 implies +nofp16fml

From Armv8.4-A:
*) The above conditions apply, additionally: +fp16 implies +fp16fml

Patch by Bernard Ogden.

Differential Revision: https://reviews.llvm.org/D50229

llvm-svn: 342862
2018-09-24 07:55:20 +00:00
Brad Smith 1c6bb54c56 OpenBSD/arm has switched to float ABI SoftFP.
llvm-svn: 337660
2018-07-22 21:39:54 +00:00
Fangrui Song 99337e246c Change \t to spaces
llvm-svn: 337530
2018-07-20 08:19:20 +00:00
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Keith Walker 167961f6dc [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D42569

llvm-svn: 325492
2018-02-19 12:40:26 +00:00
Keith Walker c5bbd11406 Revert [ARM] disable FPU features when using soft floating point.
This reverts r319420
It is failing the test Driver/arm-mfpu.c so reverting while I investigate the failure.

llvm-svn: 319425
2017-11-30 12:05:18 +00:00
Keith Walker a4097075e2 [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D40256

llvm-svn: 319420
2017-11-30 11:38:56 +00:00
Strahinja Petrovic 3ac5ab7e1d [ARM] Option for reading thread pointer from coprocessor register
This patch enables option for reading thread pointer directly
from coprocessor register (-mtp=soft/cp15).

Differential Revision: https://reviews.llvm.org/D34878

llvm-svn: 313018
2017-09-12 10:40:58 +00:00
Sam Parker ffccda6303 [ARM][AArch64] Cortex-A75 and Cortex-A55 tests
Add frontend tests for Cortex-A75 and Cortex-A55, Arm's latest
big.LITTLE A-class cores. They implement the ARMv8.2-A architecture,
including the cryptography and RAS extensions, plus the optional dot
product extension. They also implement the RCpc AArch64 extension
from ARMv8.3-A.

Cortex-A75:
https://developer.arm.com/products/processors/cortex-a/cortex-a75

Cortex-A55:
https://developer.arm.com/products/processors/cortex-a/cortex-a55

Differential Revision: https://reviews.llvm.org/D36731

llvm-svn: 311319
2017-08-21 08:52:45 +00:00
Tim Northover b6a826bdc7 Revert r311137 (GlobalISel ABI commit).
It was committed by mistake since it was in the same monorepo as the
LLVM change I was working on.

llvm-svn: 311140
2017-08-18 00:33:24 +00:00
Tim Northover 48fff995d6 GlobalISel (AArch64): fix ABI at border between GPRs and SP.
If a struct would end up half in GPRs and half on SP the ABI says it should
actually go entirely on the stack. We were getting this wrong in GlobalISel
before, causing compatibility issues.

llvm-svn: 311137
2017-08-17 23:14:01 +00:00
Florian Hahn ef5bbd61da Update to use enum classes for various ARM *Kind enums
Summary: This updates the relevant Clang parts for the LLVM change D35882.

Reviewers: rengolin, chandlerc, javed.absar, rovka

Reviewed By: rovka

Subscribers: aemerson, cfe-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D35884

llvm-svn: 309289
2017-07-27 16:28:39 +00:00
Joerg Sonnenberger e385cfc24d NetBSD uses soft-float by default, unless the environment is EABIHF or
GNUEABIHF.

llvm-svn: 307665
2017-07-11 15:50:48 +00:00
Eric Christopher 6f357afee2 Update clang support for -mexecute-only/-mpure-code for backend change to use subtarget feature rather than command line option.
llvm-svn: 306928
2017-07-01 02:55:23 +00:00
Sanne Wouda 784004e5df [ARM] Add a driver option for +no-neg-immediates
Reviewers: olista01, rengolin, javed.absar, samparker

Reviewed By: samparker

Subscribers: samparker, llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D31197

llvm-svn: 298850
2017-03-27 15:34:52 +00:00
David L. Jones f561abab56 [Driver] Consolidate tools and toolchains by target platform. (NFC)
Summary:
(This is a move-only refactoring patch. There are no functionality changes.)

This patch splits apart the Clang driver's tool and toolchain implementation
files. Each target platform toolchain is moved to its own file, along with the
closest-related tools. Each target platform toolchain has separate headers and
implementation files, so the hierarchy of classes is unchanged.

There are some remaining shared free functions, mostly from Tools.cpp. Several
of these move to their own architecture-specific files, similar to r296056. Some
of them are only used by a single target platform; since the tools and
toolchains are now together, some helpers now live in a platform-specific file.
The balance are helpers related to manipulating argument lists, so they are now
in a new file pair, CommonArgs.h and .cpp.

I've tried to cluster the code logically, which is fairly straightforward for
most of the target platforms and shared architectures. I think I've made
reasonable choices for these, as well as the various shared helpers; but of
course, I'm happy to hear feedback in the review.

There are some particular things I don't like about this patch, but haven't been
able to find a better overall solution. The first is the proliferation of files:
there are several files that are tiny because the toolchain is not very
different from its base (usually the Gnu tools/toolchain). I think this is
mostly a reflection of the true complexity, though, so it may not be "fixable"
in any reasonable sense. The second thing I don't like are the includes like
"../Something.h". I've avoided this largely by clustering into the current file
structure. However, a few of these includes remain, and in those cases it
doesn't make sense to me to sink an existing file any deeper.

Reviewers: rsmith, mehdi_amini, compnerd, rnk, javed.absar

Subscribers: emaste, jfb, danalbert, srhines, dschuff, jyknight, nemanjai, nhaehnle, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D30372

llvm-svn: 297250
2017-03-08 01:02:16 +00:00