Commit Graph

740 Commits

Author SHA1 Message Date
David Spickett 6faa345da9 [LLDB] Pass const RegisterInfo& to RegisterValue::SetValueFromData
Familiar story, callers are either checking upfront that the pointer
wasn't null or not checking at all. SetValueFromData itself didn't
check either.

So make the parameter a ref and fixup the few places where a nullptr
check seems needed.

Depends on D135668

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D135670
2022-10-12 08:19:30 +00:00
Joe Loser 47b76631e7 [lldb] Use std::size instead of llvm::array_lengthof
LLVM contains a helpful function for getting the size of a C-style
array: `llvm::array_lengthof`. This is useful prior to C++17, but not as
helpful for C++17 or later: `std::size` already has support for C-style
arrays.

Change call sites to use `std::size` instead.

Differential Revision: https://reviews.llvm.org/D133501
2022-09-08 14:21:55 -06:00
Emmmer 65f6a8c23b [LLDB] Fix: make m_target_arch private
Using GetTargetArchitecture() instead of m_target_arch, and set m_target_arch to private.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D132353
2022-08-22 18:01:44 +08:00
Slava Gurevich 5a197772ee [LLDB][NFC] Suppress spurious static inspection warnings
Suppress coverity false positives.
This diff contains comments only, including the hints for Coverity static code inspection
to suppress the warning originating at the next line after the comment.

Differential Revision: https://reviews.llvm.org/D131998
2022-08-17 16:12:42 -07:00
Emmmer 4fc7e9cba2 [LLDB][RISCV] Make software single stepping work
Add:
- `EmulateInstructionRISCV`, which can be used for riscv32 and riscv64.
- Add unittests for EmulateInstructionRISCV.

Note: Compressed instructions set (RVC) was still not supported in this patch.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D131759
2022-08-16 23:44:50 +08:00
Emmmer 95e2949a53 [LLDB] Fix possible nullptr exception
Some architectures do not have a flag register (like riscv).
In this case, we should set it to `baton.m_register_values.end()` to avoid nullptr exception.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D131945
2022-08-16 23:41:00 +08:00
Med Ismail Bennani edc77353da [lldb/crashlog] Improve exception reporting for interactive mode
This patch improve exception reporting when loading a crash report in a
scripted process. Now, we parse the `exception` dictionary from the
crash report use it the create a higher fidelity `MachException` stop info.

This patch also updates the test to reflect that change.

rdar://97096486

Differential Revision: https://reviews.llvm.org/D131086

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2022-08-11 22:29:06 -07:00
Emmmer 7bece0f03b [LLDB][RISCV] Add riscv register definition and read/write
This patch is based on the minimal extract of D128250.

What is implemented:
- Use the same register layout as Linux kernel and mock read/write for `x0` register (the always zero register).
- Refactor some duplicate code, and delete unused register definitions.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D130342
2022-08-11 14:24:06 +08:00
David Spickett 552dccf311 [LLDB][AArch64][NFC] Fix some clang-format annotations
We don't want the DEFINE_ macros or the array registers
being clang formatted.

RegisterInfos_arm64.h was missing the off annotation and
RegisterInfos_arm64_sve.h needed the off moving to before
the macro definitions.
2022-08-10 10:22:21 +00:00
Slava Gurevich bcac7b3acb [LLDB] Missing break in a switch statement alters the execution flow.
Looks like a typo from the past code changes.

    Differential Revision: https://reviews.llvm.org/D131244
2022-08-05 18:33:18 -07:00
Jonas Devlieghere 9c81b743e3
[lldb] Improve EXC_RESOURCE exception reason
Jason noted that the stop message we print for a memory high water mark
notification (EXC_RESOURCE) could be clearer. Currently, the stop
reason looks like this:

  * thread #3, queue = 'com.apple.CFNetwork.LoaderQ', stop reason =
    EXC_RESOURCE RESOURCE_TYPE_MEMORY (limit=14 MB, unused=0x0)

It's hard to read the message because the exception and the type
(EXC_RESOURCE RESOURCE_TYPE_MEMORY) blend together. Additionally, the
"observed=0x0" should not be printed for memory limit exceptions.

I wanted to continue to include the resource type from
<kern/exc_resource.h> while also explaining what it actually is. I used
the wording from the comments in the header. With this path, the stop
reason now looks like this:

  * thread #5, stop reason = EXC_RESOURCE (RESOURCE_TYPE_MEMORY: high
    watermark memory limit exceeded) (limit=14 MB)

rdar://40466897

Differential revision: https://reviews.llvm.org/D131130
2022-08-05 11:19:46 -07:00
Pavel Labath b8985ba0ad [lldb] Fix arm breakages from D130985
The kernel was rejecting sizeof(struct GPR) as it was not a multiple of
8. Add a padding field to fix that.

One also wonders whether "cpsr" is right register name for aarch64.
2022-08-04 13:55:35 +02:00
Pavel Labath 69c39e2abc [lldb] Fix TestDeletedExecutable on linux
Currently, lldb-server was opening the executable file to determine the
process architecture (to differentiate between 32 and 64 bit
architecture flavours). This isn't a particularly trustworthy source of
information (the file could have been changed since the process was
started) and it is not always available (file could be deleted or
otherwise inaccessible).

Unfortunately, ptrace does not give us a direct API to access the
process architecture, but we can still infer it via some of its
responses -- given that the general purpose register set of 64-bit
applications is larger [citation needed] than the GPR set of 32-bit
ones, we can just ask for the application GPR set and check its size.

This is what this patch does.

Differential Revision: https://reviews.llvm.org/D130985
2022-08-03 15:44:19 +02:00
Emmmer 768e59d959 [LLDB][RISCV] Add riscv register enums
According to [RISC-V ISA Spec](https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf) and [riscv-v-spec](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#3-vector-extension-programmers-model)

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D130899
2022-08-02 11:55:33 +08:00
Slava Gurevich f7c961cc6b [LLDB][NFC][Reliability] Fixes for int overflow and uninitialized state
Fixing potential int overflow and uninitialized variables.
These were found by Coverity static code inspection.

Differential Revision: https://reviews.llvm.org/D130795
2022-07-29 13:31:17 -07:00
Slava Gurevich 4871dfc64e [LLDB][NFC][Reliability] Fix uninitialized variables from Coverity scan. Part 2
Improve LLDB reliability by fixing the following "uninitialized variables" static code inspection warnings from
scan.coverity.com:

1476275, 1274012, 1455035, 1364789, 1454282
1467483, 1406152, 1406255, 1454837, 1454416
1467446, 1462022, 1461909, 1420566, 1327228
1367767, 1431254, 1467299, 1312678, 1431780
1454731, 1490403

Differential Revision: https://reviews.llvm.org/D130528
2022-07-25 20:52:45 -07:00
Slava Gurevich 9877159dd6 Revert "[LLDB][NFC][Reliability] Fix uninitialized variables from Coverity scan. Part 2"
This reverts commit b9aedd94e6.
2022-07-25 18:23:19 -07:00
Slava Gurevich b9aedd94e6 [LLDB][NFC][Reliability] Fix uninitialized variables from Coverity scan. Part 2
Improve LLDB reliability by fixing the following "uninitialized variables" static code inspection warnings from
scan.coverity.com:

1476275, 1274012, 1455035, 1364789, 1454282
1467483, 1406152, 1406255, 1454837, 1454416
1467446, 1462022, 1461909, 1420566, 1327228
1367767, 1431254, 1467299, 1312678, 1431780
1454731, 1490403

Differential Revision: https://reviews.llvm.org/D130528
2022-07-25 16:40:57 -07:00
David Spickett 91098fec96 [lldb][AArch64] Use macro for unused var without asserts enabled
82d4f39f34 marked an unused
var of mine (thanks Dmitri Gribenko!). Which reminded me lldb has
a macro just for that purpose.
2022-07-25 15:14:49 +00:00
Dmitri Gribenko 82d4f39f34 [lldb][AArch64] Fix an unused variable warning in release builds. NFC 2022-07-25 16:58:03 +02:00
David Spickett 883b0d5b7f [lldb][AArch64] Add UnpackTagsFromCoreFileSegment to MemoryTagManager
This is the first part of support for reading MTE tags from Linux
core files. The format is documented here:
https://www.kernel.org/doc/html/latest/arm64/memory-tagging-extension.html#core-dump-support

This patch adds a method to unpack from the format the core
file uses, which is different to the one chosen for GDB packets.

MemoryTagManagerAArch64MTE is not tied one OS so another OS
might choose a different format in future. However, infrastructure
to handle that would go untested until then so I've chosen not to
attempt to handle that.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D129487
2022-07-25 15:51:36 +01:00
Slava Gurevich 459cfa5e94 [LLDB][NFC][Reliability] Fix uninitialized variables from Coverity scan
Improve LLDB reliability by fixing the following "uninitialized variables" static code inspection warnings from
scan.coverity.com:

1094796 1095721 1095728 1095737 1095741
1095756 1095779 1095789 1095805 1214552
1229457 1232475 1274006 1274010 1293427
1364800 1364802 1364804 1364812 1364816
1374902 1374909 1384975 1399312 1420451
1431704 1454230 1454554 1454615 1454579
1454594 1454832 1457759 1458696 1461909
1467658 1487814 1487830 1487845

Differential Revision: https://reviews.llvm.org/D130098
2022-07-20 14:50:48 -07:00
Kazu Hirata 360c1111e3 Use llvm::is_contained (NFC) 2022-07-20 09:09:19 -07:00
Emre Kultursay c0702ac07b [PATCH] [lldb-server] Skip shared regions for memory allocation
Differential Revision: https://reviews.llvm.org/D128832
2022-07-01 13:45:42 +08:00
Jonas Devlieghere 9916633997
[lldb] Fix modernize-use-override warnings (NFC)
Fix modernize-use-override warnings. Because this check is listed in
LLDB's top level .clang-tidy configuration, the check is enabled by
default and the resulting warnings show up in my editor.

I've audited the modified lines. This is not a blind change.
2022-06-17 15:08:02 -07:00
Martin Storsjö 373d08adb4 [lldb] Silence warnings about unused static variables in RegisterInfos_arm64.h
Move them to the only source file that included RegisterInfos_arm64.h
that actually used these variables.

This silences warnings like these:

    In file included from lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp:42:
    lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h:790:35: warning: ‘g_register_infos_mte’ defined but not used [-Wunused-variable]
      790 | static lldb_private::RegisterInfo g_register_infos_mte[] = {
          |                                   ^~~~~~~~~~~~~~~~~~~~
    lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h:787:35: warning: ‘g_register_infos_pauth’ defined but not used [-Wunused-variable]
      787 | static lldb_private::RegisterInfo g_register_infos_pauth[] = {
          |                                   ^~~~~~~~~~~~~~~~~~~~~~

Differential Revision: https://reviews.llvm.org/D123206
2022-04-11 19:50:48 +03:00
Jonas Devlieghere fc54427e76
[lldb] Refactor DataBuffer so we can map files as read-only
Currently, all data buffers are assumed to be writable. This is a
problem on macOS where it's not allowed to load unsigned binaries in
memory as writable. To be more precise, MAP_RESILIENT_CODESIGN and
MAP_RESILIENT_MEDIA need to be set for mapped (unsigned) binaries on our
platform.

Binaries are mapped through FileSystem::CreateDataBuffer which returns a
DataBufferLLVM. The latter is backed by a llvm::WritableMemoryBuffer
because every DataBuffer in LLDB is considered to be writable. In order
to use a read-only llvm::MemoryBuffer I had to split our abstraction
around it.

This patch distinguishes between a DataBuffer (read-only) and
WritableDataBuffer (read-write) and updates LLDB to use the appropriate
one.

rdar://74890607

Differential revision: https://reviews.llvm.org/D122856
2022-04-05 13:46:37 -07:00
Pavel Labath c34698a811 [lldb] Rename Logging.h to LLDBLog.h and clean up includes
Most of our code was including Log.h even though that is not where the
"lldb" log channel is defined (Log.h defines the generic logging
infrastructure). This worked because Log.h included Logging.h, even
though it should.

After the recent refactor, it became impossible the two files include
each other in this direction (the opposite inclusion is needed), so this
patch removes the workaround that was put in place and cleans up all
files to include the right thing. It also renames the file to LLDBLog to
better reflect its purpose.
2022-02-03 14:47:01 +01:00
Pavel Labath a007a6d844 [lldb] Convert "LLDB" log channel to the new API 2022-02-02 14:13:08 +01:00
Benjamin Kramer f15014ff54 Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
This reverts commit ef82063207.

- It conflicts with the existing llvm::size in STLExtras, which will now
  never be called.
- Calling it without llvm:: breaks C++17 compat
2022-01-26 16:55:53 +01:00
serge-sans-paille ef82063207 Rename llvm::array_lengthof into llvm::size to match std::size from C++17
As a conquence move llvm::array_lengthof from STLExtras.h to
STLForwardCompat.h (which is included by STLExtras.h so no build
breakage expected).
2022-01-26 16:17:45 +01:00
David Spickett ee0c3820f8 [lldb][AArch64] Add MakeTaggedRanges to MemoryTagManager
This is to be used when you want to know what subranges
of a larger range have memory tagging. Like MakeTaggedRange
but memory without tags is skipped and you get a list of ranges back.

Will be used later by DumpDataExtractor to show memory tags.

MakeTaggedRanges assumes that the memory regions it is
given are sorted in ascending order and do not overlap.
For the current use case where you get regions from
GetMemoryRegions and are on some Linux like OS, this is
reasonable to assume.

I've used asserts to check those conditions. In future
any API binding will check them up front to prevent a crash.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D112824
2022-01-26 11:30:10 +00:00
David Spickett 585abe3ba5 [lldb] Rename MemoryTagManager RemoveNonAddressBits to RemoveTagBits
This better describes the intent of the method. Which for AArch64
is removing the top byte which includes the memory tags.

It does not include pointer signatures, for those we need to use
the ABI plugin. The rename makes this a little more clear.

It's a bit awkward that the memory tag manager is removing the whole
top byte not just the memory tags but it's an improvement for now.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D117671
2022-01-20 10:47:05 +00:00
Kazu Hirata b8336280d8 [lldb] Use nullptr instead of 0 or NULL (NFC)
This is a re-submission of 24d2405588
without the hunks in HostNativeThreadBase.{h,cpp}, which break builds
on Windows.

Identified with modernize-use-nullptr.
2022-01-01 11:54:25 -08:00
Kazu Hirata 95f7112be8 Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"
This reverts commit 913457acf0.

It again broke builds on Windows:

  lldb/source/Host/common/HostNativeThreadBase.cpp(37,14): error:
  assigning to 'lldb::thread_result_t' (aka 'unsigned int') from
  incompatible type 'std::nullptr_t'
2022-01-01 11:15:14 -08:00
Kazu Hirata 913457acf0 [lldb] Use nullptr instead of 0 or NULL (NFC)
This is a re-submission of 24d2405588
without the hunk in HostNativeThreadBase.h, which breaks builds on
Windows.

Identified with modernize-use-nullptr.
2022-01-01 10:48:56 -08:00
Nico Weber 4f2eeb6a65 Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"
This reverts commit 24d2405588.
Breaks building on Windows:

    ../../lldb/include\lldb/Host/HostNativeThreadBase.h(49,36): error:
        cannot initialize a member subobject of type 'lldb::thread_result_t'
        (aka 'unsigned int') with an rvalue of type 'std::nullptr_t'
      lldb::thread_result_t m_result = nullptr;
                                       ^~~~~~~
    1 error generated.
2022-01-01 13:35:54 -05:00
Kazu Hirata 24d2405588 [lldb] Use nullptr instead of 0 or NULL (NFC)
Identified with modernize-use-nullptr.
2022-01-01 08:54:05 -08:00
Michał Górny 3f1372365a [lldb] Support gdbserver signals
GDB and LLDB use different signal models.  GDB uses a predefined set
of signal codes, and maps platform's signos to them.  On the other hand,
LLDB has historically simply passed native signos.

In order to improve compatibility between LLDB and gdbserver, the GDB
signal model should be used.  However, GDB does not provide a mapping
for all existing signals on Linux and unsupported signals are passed
as 'unknown'.  Limiting LLDB to this behavior could be considered
a regression.

To get the best of both worlds, use the LLDB signal model when talking
to lldb-server, and the GDB signal model otherwise.  For this purpose,
new versions of lldb-server indicate "native-signals+" via qSupported.
At the same time, we also detect older versions of lldb-server
via QThreadSuffixSupported for backwards compatibility.  If neither test
succeeds, we assume gdbserver or another implementation using GDB model.

Differential Revision: https://reviews.llvm.org/D108078
2021-11-10 09:38:55 +01:00
Michał Górny 99277a81f8 [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM
Fix incorrect values for value_regs, and incomplete values for
invalidate_regs in RegisterInfos_arm.  The value_regs entry needs
to list only one base (i.e. larger) register that needs to be read
to get the value for this register, while invalidate_regs needs to list
all other registers (including pseudo-register) whose values would
change when this register is written to.

7a8ba4ffbe fixed a similar problem
for ARM64.

Differential Revision: https://reviews.llvm.org/D112066
2021-10-20 15:06:45 +02:00
Michał Górny 6561c074c0 [lldb] [Process/Utility] Define qN regs on ARM via helper macro
Add a FPU_QREG macro to define qN registers.  This is a piece-wise
attempt of reconstructing D112066 with the goal of figuring out which
part of the larger change breaks the buildbot.

Differential Revision: https://reviews.llvm.org/D112066
2021-10-20 13:08:17 +02:00
Michał Górny b492b0be95 [lldb] [Process/Utility] Define dN regs on ARM via helper macro
Use FPU_REG macro to define dN registers, removing the wrong value_regs
while at it.  This is a piece-wise attempt of reconstructing D112066
with the goal of figuring out which part of the larger change breaks
the buildbot.

Differential Revision: https://reviews.llvm.org/D112066
2021-10-19 17:06:03 +02:00
Michał Górny 28e0c34216 [lldb] [Process/Utility] Define sN regs on ARM via helper macro
This is a piece-wise attempt of reconstructing D112066 with the goal
of figuring out which part of the larger change breaks the buildbot.

Differential Revision: https://reviews.llvm.org/D112066
2021-10-19 15:51:47 +02:00
Michał Górny 5cd28f71b1 [lldb] [Process/Utility] clang-format RegisterInfos_arm.h 2021-10-19 15:51:47 +02:00
Michał Górny 7df912c65d Revert "[lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM"
This reverts commit 1c2c67b46b.
Something's still wrong.
2021-10-19 15:33:39 +02:00
Michał Górny 1c2c67b46b [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM
Fix incorrect values for value_regs, and incomplete values for
invalidate_regs in RegisterInfos_arm.  The value_regs entry needs
to list only one base (i.e. larger) register that needs to be read
to get the value for this register, while invalidate_regs needs to list
all other registers (including pseudo-register) whose values would
change when this register is written to.

While at it, introduce helper macros for the definitions.

7a8ba4ffbe fixed a similar problem
for ARM64.

Differential Revision: https://reviews.llvm.org/D112066
2021-10-19 14:47:46 +02:00
Pavel Labath 202af507fd Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.

Original commit message was:

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914
2021-10-07 11:15:00 +02:00
Michael Forster b2c906da19 Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"
This reverts commit 00e704bf08.

This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.
2021-10-06 18:15:25 +02:00
Pavel Labath 00e704bf08 [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914
2021-10-06 13:22:38 +02:00
Michał Górny 214054f78a [lldb] Move DynamicRegisterInfo to public Target library
Move DynamicRegisterInfo from the internal lldbPluginProcessUtility
library to the public lldbTarget library.  This is a prerequisite
towards ABI plugin changes that are going to pass DynamicRegisterInfo
parameters.

Differential Revision: https://reviews.llvm.org/D110942
2021-10-05 12:40:55 +02:00