90b1a710ae
[PowerPC] Enable default support of quad precision operations
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Summary: Remove option guarding support of quad precision operations.
Reviewers: nemanjai, #powerpc, steven.zhang
Reviewed By: nemanjai, #powerpc, steven.zhang
Subscribers: qiucf, wuzish, nemanjai, hiraditya, kbarton, shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83437
2020-07-10 13:27:48 -05:00
46f840f286
[PowerPC] Make no-PIC default to match GCC - LLVM
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Change the default for PowerPC LE to -fno-PIC.
Differential Revision: https://reviews.llvm.org/D53383
llvm-svn: 348298
2018-12-04 20:14:57 +00:00
9004444d81
Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"
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This reverts commit r347069
llvm-svn: 347076
2018-11-16 19:24:23 +00:00
046eff502f
[PowerPC] Make no-PIC default to match GCC - LLVM
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Set -fno-PIC as the default option.
Differential Revision: https://reviews.llvm.org/D53383
llvm-svn: 347069
2018-11-16 18:36:21 +00:00
94259ba13a
[PowerPC] [NFC] Update __float128 tests
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Add the two options -ppc-vsr-nums-as-vr and -ppc-asm-full-reg-names to
the __float128 tests. Then modify the tests as required.
llvm-svn: 336940
2018-07-12 20:18:57 +00:00
651be44913
[Power9]Legalize and emit code for HW/Byte vector extract and convert to QP
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Implemente patterns to extract HWord and Byte vector elements and convert to
quad-precision.
Differential Revision: https://reviews.llvm.org/D46774
llvm-svn: 333377
2018-05-28 16:43:29 +00:00
8b0da65bfb
[Power9]Legalize and emit code for W vector extract and convert to QP
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Implemente patterns to extract [Un]signed Word vector element and convert to
quad-precision.
Differential Revision: https://reviews.llvm.org/D46536
llvm-svn: 333115
2018-05-23 19:31:54 +00:00
8990168a45
[Power9]Legalize and emit code for DW vector extract and convert to QP
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Implemente patterns to extract [Un]signed DWord vector element and convert to
quad-precision.
Differential Revision: https://reviews.llvm.org/D46333
llvm-svn: 333112
2018-05-23 18:36:51 +00:00
Lei Huang