3 Commits

Author	SHA1	Message	Date
Kazushi (Jam) Marukawa	f92e0d9384	[VE] Optimize trunc related instructions ... Change to not generate truncate instructions if all use of a truncate operation don't care about higher bits. For example, an i32 add instruction doesn't care about higher 32 bits in 64 bit registers. Updates regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D85418	2020-08-07 09:21:05 +09:00
Kazushi (Jam) Marukawa	605fd4d77c	[VE] Change calling convention to follow ABI ... Change to expand all arguments and return values to i64 to follow ABI. Update regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D84581	2020-08-01 10:08:54 +09:00
Kazushi (Jam) Marukawa	83b67526d5	[VE] select and selectcc patterns ... Summary: select and selectcc isel patterns and tests for i32/i64 and fp32/fp64. Includes optimized selectcc patterns for fmin/fmax/maxs/mins. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D73195	2020-01-22 16:30:38 +01:00