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Author SHA1 Message Date
Simon Pilgrim a015635629 [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 
This should handle the basic integer min/max handling - the HVX ops are still TODO.

This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.

Differential Revision: https://reviews.llvm.org/D92112
 2020-11-25 19:02:17 +00:00
Krzysztof Parzyszek ac83aab035 [Hexagon] Generate min/max instructions for 64-bit vectors 
llvm-svn: 369124
 2019-08-16 16:16:27 +00:00