llvm-project

Commit Graph

Author	SHA1	Message	Date
Jonas Paulsson	4aa5dc15f0	[SystemZ] Handle SystemZ specific inline assembly address operands. Handle ZQ, ZR, ZS and ZT inline assembly operand constraints. Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D110267	2022-04-19 16:55:45 +02:00
Jonas Paulsson	46f83caebc	[InlineAsm] Add support for address operands ("p"). This patch adds support for inline assembly address operands using the "p" constraint on X86 and SystemZ. This was in fact broken on X86 (see example at https://reviews.llvm.org/D110267, Nov 23). These operands should probably be treated the same as memory operands by CodeGenPrepare, which have been commented with "TODO" there. Review: Xiang Zhang and Ulrich Weigand Differential Revision: https://reviews.llvm.org/D122220	2022-04-13 12:50:21 +02:00

Author

SHA1

Message

Date

Jonas Paulsson

4aa5dc15f0

[SystemZ] Handle SystemZ specific inline assembly address operands.

Handle ZQ, ZR, ZS and ZT inline assembly operand constraints.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D110267

2022-04-19 16:55:45 +02:00

Jonas Paulsson

46f83caebc

[InlineAsm] Add support for address operands ("p").

This patch adds support for inline assembly address operands using the "p"
constraint on X86 and SystemZ.

This was in fact broken on X86 (see example at
https://reviews.llvm.org/D110267, Nov 23).

These operands should probably be treated the same as memory operands by
CodeGenPrepare, which have been commented with "TODO" there.

Review: Xiang Zhang and Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D122220

2022-04-13 12:50:21 +02:00

2 Commits