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Author SHA1 Message Date
Jack Carter 97158ca5c2 The Mips standalone assembler aliased instruction support. 
The assembler can alias one instruction into another based
on the operands. For example the jump instruction "J" takes
and immediate operand, but if the operand is a register the
assembler will change it into a jump register "JR" instruction.

These changes are in the instruction td file.

Test cases included

Contributer: Vladimir Medic
llvm-svn: 163368
 2012-09-07 01:42:38 +00:00
Jack Carter 71e6a7492e Mips specific llvm assembler support for branch and jump instructions. 
Test case included.

Contributer: Vladimir Medic
llvm-svn: 163277
 2012-09-06 00:43:26 +00:00