Commit Graph

3330 Commits

Author SHA1 Message Date
Amjad Aboud 2b9b8a5921 [X86] Add XSAVE intrinsic family
Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13014

llvm-svn: 250158
2015-10-13 12:29:35 +00:00
Craig Topper 334d46150d [X86] LLVM now prints XOP immediates as unsigned after r250147. Fix expected check string accordingly.
llvm-svn: 250149
2015-10-13 05:15:17 +00:00
NAKAMURA Takumi 38c2f6cb20 Tweak clang/test/CodeGen/debug-prefix-map.c to appease win32 hosts.
!1 = !DIFile(filename: "/var/empty\5C<stdin>", directory: "E:\5Cllvm\5Cbuild\5Ccmake-ninja\5Ctools\5Cclang\5Ctest\5CCodeGen")

llvm-svn: 250136
2015-10-13 00:38:06 +00:00
Saleem Abdulrasool 9e593499b9 test: change argument
This failed on AArch64 due to the type mismatch using int instead of
__builtin_va_list.

llvm-svn: 250112
2015-10-12 21:19:30 +00:00
Saleem Abdulrasool 83346258eb test: relax path matching for windows
The test failed on Windows due to use of \ as a path separator rather than /.

llvm-svn: 250111
2015-10-12 21:19:27 +00:00
Saleem Abdulrasool 436256a713 Support Debug Info path remapping
Add support for the `-fdebug-prefix-map=` option as in GCC.  The syntax is
`-fdebug-prefix-map=OLD=NEW`.  When compiling files from a path beginning with
OLD, change the debug info to indicate the path as start with NEW.  This is
particularly helpful if you are preprocessing in one path and compiling in
another (e.g. for a build cluster with distcc).

Note that the linearity of the implementation is not as terrible as it may seem.
This is normally done once per file with an expectation that the map will be
small (1-2) entries, making this roughly linear in the number of input paths.

Addresses PR24619.

llvm-svn: 250094
2015-10-12 20:21:08 +00:00
George Burgess IV 5f21c71800 [Sema] Make `&function_with_enable_if_attrs` an error
This fixes a bug where one can take the address of a conditionally
enabled function to drop its enable_if guards. For example:

  int foo(int a) __attribute__((enable_if(a > 0, "")));
  int (*p)(int) = &foo;
  int result = p(-1); // compilation succeeds; calls foo(-1)

Overloading logic has been updated to reflect this change, as well.

Functions with enable_if attributes that are always true are still
allowed to have their address taken.

Differential Revision: http://reviews.llvm.org/D13607

llvm-svn: 250090
2015-10-12 19:57:04 +00:00
Eric Christopher a7260af7e5 Handle sse turning on mmx, but no -mmx not turning off SSE.
Rationale :

// sse3
__m128d test_mm_addsub_pd(__m128d A, __m128d B) {
  return _mm_addsub_pd(A, B);
}

// mmx
void shift(__m64 a, __m64 b, int c) {
  _mm_slli_pi16(a, c);
  _mm_slli_pi32(a, c);
  _mm_slli_si64(a, c);
  _mm_srli_pi16(a, c);
  _mm_srli_pi32(a, c);
  _mm_srli_si64(a, c);
  _mm_srai_pi16(a, c);
  _mm_srai_pi32(a, c);
}

clang -msse3 -mno-mmx file.c -c

For this code we should be able to explicitly turn off MMX
without affecting the compilation of the SSE3 function and then
diagnose and error on compiling the MMX function.

This is a preparatory patch to the actual diagnosis code which is
coming in a future patch. This sets us up to have the correct information
where we need it and verifies that it's being emitted for the backend
to handle.

llvm-svn: 249733
2015-10-08 20:10:18 +00:00
Eric Christopher bbd746db9e Migrate most feature map inclusion to initFeatureMap for the x86 target so
that we can build up an accurate set of features rather than relying on
TargetInfo initialization via handleTargetFeatures to munge the list
of features.

llvm-svn: 249732
2015-10-08 20:10:14 +00:00
David Majnemer e4e3e6a5bf [Sema] Tweak incomplete enum types on MSVC ABI targets
Enums without an explicit, fixed, underlying type are implicitly given a
fixed 'int' type for ABI compatibility with MSVC.  However, we can
enforce the standard-mandated rules on these types as-if we didn't know
this fact if the tag is not part of a definition.

llvm-svn: 249667
2015-10-08 07:45:35 +00:00
David Majnemer c10b8381f7 Update tests touched by r249656
These test updates almost exclusively around the change in behavior
around enum: enums without a definition are considered incomplete except
when targeting MSVC ABIs.  Since these tests are interested in the
'incomplete-enum' behavior, restrict them to %itanium_abi_triple.

llvm-svn: 249660
2015-10-08 06:31:22 +00:00
David Majnemer 3f02150d31 [MSVC Compat] Enable ABI impacting non-conforming behavior independently of -fms-compatibility
No ABI for C++ currently makes it possible to implement the standard
100% perfectly.  We wrongly hid some of our compatible behavior behind
-fms-compatibility instead of tying it to the compiler ABI.

llvm-svn: 249656
2015-10-08 04:53:31 +00:00
Douglas Katzman 3459ce2e5e Stop messing with the 'g' group of options in CompilerInvocation.
With this change, most 'g' options are rejected by CompilerInvocation.
They remain only as Driver options. The new way to request debug info
from cc1 is with "-debug-info-kind={line-tables-only|limited|standalone}"
and "-dwarf-version={2|3|4}". In the absence of a command-line option
to specify Dwarf version, the Toolchain decides it, rather than placing
Toolchain-specific logic in CompilerInvocation.

Also fix a bug in the Windows compatibility argument parsing
in which the "rightmost argument wins" principle failed.

Differential Revision: http://reviews.llvm.org/D13221

llvm-svn: 249655
2015-10-08 04:24:12 +00:00
Reid Kleckner 129552b375 [WinEH] Remove NewMSEH and enable its behavior by default
Testing has shown that it is at least as reliable as the old landingpad
pattern matching code.

llvm-svn: 249647
2015-10-08 01:13:52 +00:00
NAKAMURA Takumi 5849728912 clang/test/CodeGen/exceptions-seh-leave-new.c: Use "opt -instnamer" for branch-sensitive checks.
llvm-svn: 249499
2015-10-07 01:29:26 +00:00
Reid Kleckner f8d115338d [SEH] Fix x64 __exception_code in __except blocks
Use llvm.eh.exceptioncode to get the code out of EAX for x64. For
32-bit, the filter is responsible for storing it to memory for us.

llvm-svn: 249497
2015-10-07 01:07:13 +00:00
Ahmed Bougacha 7dfaaf3891 [Headers][X86] Fix stream_load (movntdqa) to accept const*.
Per Intel intrinsics guide:
- _mm256_stream_load_si256 takes `__m256i const *'
- _mm_stream_load_si128 takes `__m128i *', for no good reason.

Let's accept const* for both.

llvm-svn: 249213
2015-10-02 23:29:26 +00:00
Dan Gohman 266b38ab56 [WebAssembly] Add a __builtin_wasm_resize_memory() intrinsic.
llvm-svn: 249179
2015-10-02 20:20:01 +00:00
Dan Gohman d4c5fb597d [WebAssembly] Add a __builtin_wasm_memory_size() intrinsic.
llvm-svn: 249176
2015-10-02 19:38:47 +00:00
Andrea Di Biagio f9989b04bf Make test more resilient to FastIsel changes. NFC.
Currently FastISel doesn't know how to select vector bitcasts.
During instruction selection, fast-isel always falls back to SelectionDAG 
every time it encounters a vector bitcast.
As a consequence of this, all the 'packed vector shift by immedate count'
test cases in avx2-builtins.c are optimized by the DAGCombiner.
In particular, the DAGCombiner would always fold trivial stack loads of
constant shift counts into the operands of packed shift builtins.

This behavior would start changing as soon as I reapply revision 249121.
That revision would teach x86 fast-isel how to select bitcasts between vector
types of the same size.

As a consequence of that change, fast-isel would less often fall back to
SelectionDAG. More importantly, DAGCombiner would no longer be able to 
simplify the code by folding the stack reload of a constant.

No functional change.

llvm-svn: 249142
2015-10-02 15:10:22 +00:00
Chandler Carruth cbe6411401 Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.

This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.

The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.

I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.

A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:

  % cat x.cc
  #include <smmintrin.h>
  #include <iostream>

  int main() {
    __v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    __v16qi b = _mm_set1_epi8(-1);
    std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
  }
  % clang++ -o x x.cc && ./x
  -1, 1
  % clang++ -funsigned-char -o x x.cc && ./x
  0, 1

However, while this may be surprising, both Clang and GCC agree.

Differential Revision: http://reviews.llvm.org/D13324

llvm-svn: 249097
2015-10-01 23:40:12 +00:00
Chandler Carruth 9143378db0 Patch over a really horrible bug in our vector builtins that showed up
recently when we started using direct conversion to model sign
extension. The __v16qi type we use for SSE v16i8 vectors is defined in
terms of 'char' which may or may not be signed! This causes us to
generate pmovsx and pmovzx depending on the setting of -funsigned-char.

This patch just forms an explicitly signed type and uses that to
formulate the sign extension. While this gets the correct behavior
(which we now verify with the enhanced test) this is just the tip of the
ice berg. Now that I know what to look for, I have found errors of this
sort *throughout* our vector code. Fortunately, this is the only
specific place where I know of users actively having their code
miscompiled by Clang due to this, so I'm keeping the fix for those users
minimal and targeted.

I'll be sending a proper email for discussion of how to fix these
systematically, what the implications are, and just how widely broken
this is... From what I can tell, we have never shipped a correct set of
builtin headers for x86 when users rely on -funsigned-char. Oops.

llvm-svn: 248980
2015-10-01 02:21:34 +00:00
Jingyue Wu f1eca25b16 [CUDA] fix codegen for __nvvm_atom_cas_*
Summary: __nvvm_atom_cas_* returns the old value instead of whether the swap succeeds.

Reviewers: eliben, tra

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D13306

llvm-svn: 248951
2015-09-30 21:49:32 +00:00
Jeroen Ketema 55a8e80de8 [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
This is the clang commit associated with llvm r248887.

This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234],
vst[234]lane ARM neon intrinsics and associates an address space with the
pointer that these intrinsics take. This changes, e.g.,

<2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32)

to

<2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32)

This change ensures that address spaces are fully taken into account in the ARM
target during lowering of interleaved loads and stores.

Differential Revision: http://reviews.llvm.org/D13127

llvm-svn: 248888
2015-09-30 10:56:56 +00:00
Nemanja Ivanovic 236904ea9e Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1
This patch corresponds to review:
http://reviews.llvm.org/D13190

Implemented the following interfaces to conform to ELF V2 ABI version 1.1.

vector signed __int128 vec_adde (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_adde (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed __int128 vec_addec (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_addec (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed int vec_addc(vector signed int __a, vector signed int __b);
vector bool char vec_cmpge (vector signed char __a, vector signed char __b);
vector bool char vec_cmpge (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmpge (vector signed short __a, vector signed short __b);
vector bool short vec_cmpge (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmpge (vector signed int __a, vector signed int __b);
vector bool int vec_cmpge (vector unsigned int __a, vector unsigned int __b);
vector bool char vec_cmple (vector signed char __a, vector signed char __b);
vector bool char vec_cmple (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmple (vector signed short __a, vector signed short __b);
vector bool short vec_cmple (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmple (vector signed int __a, vector signed int __b);
vector bool int vec_cmple (vector unsigned int __a, vector unsigned int __b);
vector double vec_double (vector signed long long __a);
vector double vec_double (vector unsigned long long __a);
vector bool char vec_eqv(vector bool char __a, vector bool char __b);
vector bool short vec_eqv(vector bool short __a, vector bool short __b);
vector bool int vec_eqv(vector bool int __a, vector bool int __b);
vector bool long long vec_eqv(vector bool long long __a, vector bool long long __b);
vector signed short vec_madd(vector signed short __a, vector signed short __b, vector signed short __c);
vector signed short vec_madd(vector signed short __a, vector unsigned short __b, vector unsigned short __c);
vector signed short vec_madd(vector unsigned short __a, vector signed short __b, vector signed short __c);
vector unsigned short vec_madd(vector unsigned short __a, vector unsigned short __b, vector unsigned short __c);
vector bool long long vec_mergeh(vector bool long long __a, vector bool long long __b);
vector bool long long vec_mergel(vector bool long long __a, vector bool long long __b);
vector bool char vec_nand(vector bool char __a, vector bool char __b);
vector bool short vec_nand(vector bool short __a, vector bool short __b);
vector bool int vec_nand(vector bool int __a, vector bool int __b);
vector bool long long vec_nand(vector bool long long __a, vector bool long long __b);
vector bool char vec_orc(vector bool char __a, vector bool char __b);
vector bool short vec_orc(vector bool short __a, vector bool short __b);
vector bool int vec_orc(vector bool int __a, vector bool int __b);
vector bool long long vec_orc(vector bool long long __a, vector bool long long __b);
vector signed long long vec_sub(vector signed long long __a, vector signed long long __b);
vector signed long long vec_sub(vector bool long long __a, vector signed long long __b);
vector signed long long vec_sub(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_sub(vector unsigned long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector unsigned long long __V2 ABI V1.1


http://ror float vec_sub(vector float __a, vector float __b);
unsigned char vec_extract(vector bool char __a, int __b);
signed short vec_extract(vector signed short __a, int __b);
unsigned short vec_extract(vector bool short __a, int __b);
signed int vec_extract(vector signed int __a, int __b);
unsigned int vec_extract(vector bool int __a, int __b);
signed long long vec_extract(vector signed long long __a, int __b);
unsigned long long vec_extract(vector unsigned long long __a, int __b);
unsigned long long vec_extract(vector bool long long __a, int __b);
double vec_extract(vector double __a, int __b);
vector bool char vec_insert(unsigned char __a, vector bool char __b, int __c);
vector signed short vec_insert(signed short __a, vector signed short __b, int __c);
vector bool short vec_insert(unsigned short __a, vector bool short __b, int __c);
vector signed int vec_insert(signed int __a, vector signed int __b, int __c);
vector bool int vec_insert(unsigned int __a, vector bool int __b, int __c);
vector signed long long vec_insert(signed long long __a, vector signed long long __b, int __c);
vector unsigned long long vec_insert(unsigned long long __a, vector unsigned long long __b, int __c);
vector bool long long vec_insert(unsigned long long __a, vector bool long long __b, int __c);
vector double vec_insert(double __a, vector double __b, int __c);
vector signed long long vec_splats(signed long long __a);
vector unsigned long long vec_splats(unsigned long long __a);
vector signed __int128 vec_splats(signed __int128 __a);
vector unsigned __int128 vec_splats(unsigned __int128 __a);
vector double vec_splats(double __a);
int vec_all_eq(vector double __a, vector double __b);
int vec_all_ge(vector double __a, vector double __b);
int vec_all_gt(vector double __a, vector double __b);
int vec_all_le(vector double __a, vector double __b);
int vec_all_lt(vector double __a, vector double __b);
int vec_all_nan(vector double __a);
int vec_all_ne(vector double __a, vector double __b);
int vec_all_nge(vector double __a, vector double __b);
int vec_all_ngt(vector double __a, vector double __b);
int vec_any_eq(vector double __a, vector double __b);
int vec_any_ge(vector double __a, vector double __b);
int vec_any_gt(vector double __a, vector double __b);
int vec_any_le(vector double __a, vector double __b);
int vec_any_lt(vector double __a, vector double __b);
int vec_any_ne(vector double __a, vector double __b);
vector unsigned char vec_sbox_be (vector unsigned char);
vector unsigned char vec_cipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_cipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_shasigma_be (vector unsigned int, const int, const int);
vector unsigned long long vec_shasigma_be (vector unsigned long long, const int, const int);
vector unsigned short vec_pmsum_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_pmsum_be (vector unsigned short, vector unsigned short);
vector unsigned long long vec_pmsum_be (vector unsigned int, vector unsigned int);
vector unsigned __int128 vec_pmsum_be (vector unsigned long long, vector unsigned long long);
vector unsigned char vec_gb (vector unsigned char);
vector unsigned long long vec_bperm (vector unsigned __int128 __a, vector unsigned char __b);

Removed the folowing interfaces either because their signatures have changed
in version 1.1 of the ABI or because they were implemented for ELF V2 ABI but
have actually been deprecated in version 1.1.

vector signed char vec_eqv(vector bool char __a, vector signed char __b);
vector signed char vec_eqv(vector signed char __a, vector bool char __b);
vector unsigned char vec_eqv(vector bool char __a, vector unsigned char __b);
vector unsigned char vec_eqv(vector unsigned char __a, vector bool char __b);
vector signed short vec_eqv(vector bool short __a, vector signed short __b);
vector signed short vec_eqv(vector signed short __a, vector bool short __b);
vector unsigned short vec_eqv(vector bool short __a, vector unsigned short __b);
vector unsigned short vec_eqv(vector unsigned short __a, vector bool short __b);
vector signed int vec_eqv(vector bool int __a, vector signed int __b);
vector signed int vec_eqv(vector signed int __a, vector bool int __b);
vector unsigned int vec_eqv(vector bool int __a, vector unsigned int __b);
vector unsigned int vec_eqv(vector unsigned int __a, vector bool int __b);
vector signed long long vec_eqv(vector bool long long __a, vector signed long long __b);
vector signed long long vec_eqv(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_eqv(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_eqv(vector unsigned long long __a, vector bool long long __b);
vector float vec_eqv(vector bool int __a, vector float __b);
vector float vec_eqv(vector float __a, vector bool int __b);
vector double vec_eqv(vector bool long long __a, vector double __b);
vector double vec_eqv(vector double __a, vector bool long long __b);
vector unsigned short vec_nand(vector bool short __a, vector unsigned short __b);

llvm-svn: 248813
2015-09-29 18:13:34 +00:00
John McCall 8460bcaa33 Honor the casted-to alignment of an explicit cast even when
Sema thinks the cast is a no-op, as it does when (e.g.) the
only thing that changes is an alignment attribute.

Fixed PR24944.

llvm-svn: 248775
2015-09-29 04:37:40 +00:00
Artem Belevich 236cfdc4be [CUDA] 32-bit NVPTX should have 32-bit long type.
Currently it's 64-bit which will lead to mismatch between host and
device code if we compile for i386.

Differential Revision: http://reviews.llvm.org/D13181

llvm-svn: 248753
2015-09-28 22:54:08 +00:00
Artyom Skrobov d3ae09bcc8 Recommit r248154: [ARM] Handle DSP feature as an ArchExtKind
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME:
attached.

http://reviews.llvm.org/D12937 moved the handling of the DSP feature over to
ARMTargetParser.def in LLVM, to be in line with other architecture extensions.

This is the corresponding patch to clang, to clear the FIXME: and update
the tests.

Differential Revision: http://reviews.llvm.org/D12938

llvm-svn: 248521
2015-09-24 17:34:05 +00:00
Daniel Sanders e0395a7f7f [mips] Relax -mnan=2008 acceptance to permit MIPS32R2 and MIPS64R2.
Summary:
Strictly speaking, the MIPS*R2 ISA's should not permit -mnan=2008 since this
feature was added in MIPS*R3. However, other toolchains permit this and we
should do the same.

Reviewers: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D13057

llvm-svn: 248481
2015-09-24 10:22:17 +00:00
Akira Hatanaka 510d7c71e2 Remove attributes minsize and optsize, which conflict with optnone.
This commit fixes an assert that is triggered when optnone is being
added to an IR function that is already marked with minsize and optsize.

rdar://problem/22723716

Differential Revision: http://reviews.llvm.org/D13004

llvm-svn: 248191
2015-09-21 18:52:24 +00:00
James Molloy 93bd4e9979 Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"
This was committed without the code review (http://reviews.llvm.org/D12938) being approved.

This reverts commit r248154.

llvm-svn: 248173
2015-09-21 16:34:58 +00:00
Artyom Skrobov 7428f1ef64 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME:
attached.

http://reviews.llvm.org/D12937 moved the handling of +t2dsp over to
ARMTargetParser.def in LLVM, to be in line with other architecture extensions.

This is the corresponding patch to clang, to clear the FIXME: and update
the tests.

Differential Revision: http://reviews.llvm.org/D12938

llvm-svn: 248154
2015-09-21 13:19:25 +00:00
Simon Pilgrim 12919f7e49 [X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
128-bit vector integer sign extensions correctly lower to the pmovsx instructions even for debug builds.

This patch removes the builtins and reimplements the _mm_cvtepi*_epi* intrinsics __using builtin_shufflevector (to extract the bottom most subvector) and __builtin_convertvector (to actually perform the sign extension).

Differential Revision: http://reviews.llvm.org/D12835

llvm-svn: 248092
2015-09-19 15:12:38 +00:00
Alexander Musman fbbc0b8cec Fix for assertion fail for pragma weak on typedef.
Example:
typedef int __td3;
#pragma weak td3 = __td3

Differential Revision: http://reviews.llvm.org/D12904

llvm-svn: 247975
2015-09-18 07:40:22 +00:00
Charles Davis c7d5c94f78 Support __builtin_ms_va_list.
Summary:
This change adds support for `__builtin_ms_va_list`, a GCC extension for
variadic `ms_abi` functions. The existing `__builtin_va_list` support is
inadequate for this because `va_list` is defined differently in the Win64
ABI vs. the System V/AMD64 ABI.

Depends on D1622.

Reviewers: rsmith, rnk, rjmccall

CC: cfe-commits

Differential Revision: http://reviews.llvm.org/D1623

llvm-svn: 247941
2015-09-17 20:55:33 +00:00
Reid Kleckner 01485654db Use the MSVC SEH personalities on Mingw
Mingw generally wraps an old copy of msvcrt.dll which has these
personalities, so things should work out, or so I hear. I haven't tested
it.

llvm-svn: 247902
2015-09-17 17:04:13 +00:00
Asaf Badouh 2718051dd7 re-apply r.247881
fixed the tests.

llvm-svn: 247892
2015-09-17 14:53:37 +00:00
Asaf Badouh 8a61250709 revert r.247881 due to tests failures
llvm-svn: 247883
2015-09-17 13:09:33 +00:00
NAKAMURA Takumi 007f75dab7 Appease clang/test/CodeGen/avx512dq-builtins.c for -Asserts, for now.
llvm-svn: 247882
2015-09-17 12:33:34 +00:00
Asaf Badouh a0e5e71ef1 [X86][AVX512DQ] add new intrinsics
convert i64 to FP and vice versa
reduceps & reducepd
rangeps & rangepd
all in their 512bit versions


Differential Revision: http://reviews.llvm.org/D11716

llvm-svn: 247881
2015-09-17 11:56:04 +00:00
NAKAMURA Takumi f9c52dc3e7 Make clang/test/CodeGen/catch-undef-behavior.c* capable of -Asserts with "opt -instnamer".
It reverts r231717.

llvm-svn: 247667
2015-09-15 09:50:24 +00:00
Piotr Padlewski d679d7e924 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479 and other bug caused in chrome.
After this patch got reverted because of ScalarEvolution bug (D12719)
Merged after John McCall big patch (Added Address).

http://reviews.llvm.org/D11859
http://reviews.llvm.org/D12865

llvm-svn: 247646
2015-09-15 00:37:06 +00:00
Evgeniy Stepanov 6b2a61d3a5 Revert "Always_inline codegen rewrite" and 2 follow-ups.
Revert "Update cxx-irgen.cpp test to allow signext in alwaysinline functions."
Revert "[CodeGen] Remove wrapper-free always_inline functions from COMDATs"
Revert "Always_inline codegen rewrite."

Reason for revert: PR24793.

llvm-svn: 247620
2015-09-14 21:35:16 +00:00
Rachel Craik 022bdc7d73 C11 _Bool bitfield diagnostic
Summary: Implement DR262 (for C). This patch will mainly affect bitfields of type _Bool

Reviewers: fraggamuffin, rsmith

Subscribers: hubert.reinterpretcast, cfe-commits

Differential Revision: http://reviews.llvm.org/D10018

llvm-svn: 247618
2015-09-14 21:27:36 +00:00
Simon Atanasyan 25be8761b9 [mips] Add test case to check ABI flag emissions in case of inline assembler
Follow up to r247546. The test case reproduces the problem fixed by this commit.

llvm-svn: 247548
2015-09-14 11:23:02 +00:00
Evgeniy Stepanov 93db40a147 Always_inline codegen rewrite.
Current implementation may end up emitting an undefined reference for
an "inline __attribute__((always_inline))" function by generating an
"available_externally alwaysinline" IR function for it and then failing to
inline all the calls. This happens when a call to such function is in dead
code. As the inliner is an SCC pass, it does not process dead code.

Libc++ relies on the compiler never emitting such undefined reference.

With this patch, we emit a pair of
1. internal alwaysinline definition (called F.alwaysinline)
2a. A stub F() { musttail call F.alwaysinline }
  -- or, depending on the linkage --
2b. A declaration of F.

The frontend ensures that F.inlinefunction is only used for direct
calls, and the stub is used for everything else (taking the address of
the function, really). Declaration (2b) is emitted in the case when
"inline" is meant for inlining only (like __gnu_inline__ and some
other cases).

This approach, among other nice properties, ensures that alwaysinline
functions are always internal, making it impossible for a direct call
to such function to produce an undefined symbol reference.

This patch is based on ideas by Chandler Carruth and Richard Smith.

llvm-svn: 247494
2015-09-12 01:07:37 +00:00
Evgeniy Stepanov 67037ee21e Revert "Specify target triple in alwaysinline tests."
Revert "Always_inline codegen rewrite."

Breaks gdb & lldb tests.
Breaks on Fedora 22 x86_64.

llvm-svn: 247491
2015-09-11 23:48:37 +00:00
Evgeniy Stepanov 6dbfdaa6ab Specify target triple in alwaysinline tests.
This should fix the tests on Windows (failing due to mangling differencies).

llvm-svn: 247473
2015-09-11 21:10:12 +00:00
Evgeniy Stepanov 072e83500e Always_inline codegen rewrite.
Current implementation may end up emitting an undefined reference for
an "inline __attribute__((always_inline))" function by generating an
"available_externally alwaysinline" IR function for it and then failing to
inline all the calls. This happens when a call to such function is in dead
code. As the inliner is an SCC pass, it does not process dead code.

Libc++ relies on the compiler never emitting such undefined reference.

With this patch, we emit a pair of
1. internal alwaysinline definition (called F.alwaysinline)
2a. A stub F() { musttail call F.alwaysinline }
  -- or, depending on the linkage --
2b. A declaration of F.

The frontend ensures that F.inlinefunction is only used for direct
calls, and the stub is used for everything else (taking the address of
the function, really). Declaration (2b) is emitted in the case when
"inline" is meant for inlining only (like __gnu_inline__ and some
other cases).

This approach, among other nice properties, ensures that alwaysinline
functions are always internal, making it impossible for a direct call
to such function to produce an undefined symbol reference.

This patch is based on ideas by Chandler Carruth and Richard Smith.

llvm-svn: 247465
2015-09-11 20:29:07 +00:00
Akira Hatanaka aecca041c9 Record function attribute "stackrealign" instead of using backend option
-force-align-stack.

Also, make changes to the driver so that -mno-stack-realign is no longer
an option exposed to the end-user that disallows stack realignment in
the backend.

Differential Revision: http://reviews.llvm.org/D11815

llvm-svn: 247451
2015-09-11 18:55:09 +00:00
Reid Kleckner 9e8f2b46b2 Update test expectations for LLVM asm printing change
llvm-svn: 247434
2015-09-11 17:27:53 +00:00
Reid Kleckner fb06c84be8 [SEH] Port __try / __leave test to new IR
It turns out that the IR we already generate for __leave is fine, so no
code changes were needed.

llvm-svn: 247424
2015-09-11 16:29:27 +00:00
David Blaikie fc473554a6 [opaque pointer type] update test cases for explicit pointee types on global aliases
llvm-svn: 247380
2015-09-11 03:22:18 +00:00
Reid Kleckner 2586aac908 [SEH] Use cleanupendpad so that WinEHPrepare gets the coloring right
Cleanupendpad is a lot like catchendpad, so we can reuse the same
EHScopeStack type.

llvm-svn: 247349
2015-09-10 22:11:13 +00:00
Piotr Padlewski 4bed31b9bf Revert "Generating assumption loads of vptr after ctor call (fixed)"
It seems that there is small bug, and we can't generate assume loads
when some virtual functions have internal visibiliy
This reverts commit 982bb7d966947812d216489b3c519c9825cacbf2.

llvm-svn: 247332
2015-09-10 20:18:30 +00:00
Reid Kleckner bb34b60359 [SEH] Use catchret in the new EH IR like we do for C++
Also add tests for SEH with the new IRGen.

llvm-svn: 247318
2015-09-10 18:39:41 +00:00
Peter Collingbourne 2c7f7e31c4 CFI: Introduce -fsanitize=cfi-icall flag.
This flag causes the compiler to emit bit set entries for functions as well
as runtime bitset checks at indirect call sites. Depends on the new function
bitset mechanism.

Differential Revision: http://reviews.llvm.org/D11857

llvm-svn: 247238
2015-09-10 02:17:40 +00:00
John McCall 9a2c1c9603 Don't crash when emitting a block under returns_nonnull.
rdar://22071955

llvm-svn: 247228
2015-09-10 00:57:46 +00:00
Sanjay Patel daf34e9d85 convert builtin_unpredictable on a switch into metadata for LLVM
llvm-svn: 247203
2015-09-09 22:39:06 +00:00
Piotr Padlewski 255652e828 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.
After this patch got reverted because of ScalarEvolution bug (D12719)
Merged after John McCall big patch (Added Address).

http://reviews.llvm.org/D11859

llvm-svn: 247199
2015-09-09 22:20:28 +00:00
Alexandros Lamprineas 3834d2ca08 [ARM] "cortex-r5f" and "cortex-m4f" are unknown names for clang.
The tests in test/CodeGen/arm-target-features.c are currently
passing but warning messages are suppressed. These tests are now
synchronized with the corresponding changes in Target Parser.

This patch will fix the regressions in clang caused by r247136

Differential Revision: http://reviews.llvm.org/D12722

llvm-svn: 247138
2015-09-09 11:29:06 +00:00
Michael Zolotukhin 84df12375c Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.
Summary:
Currently clang provides no general way to generate nontemporal loads/stores.
There are some architecture specific builtins for doing so (e.g. in x86), but
there is no way to generate non-temporal store on, e.g. AArch64. This patch adds
generic builtins which are expanded to a simple store with '!nontemporal'
attribute in IR.

Differential Revision: http://reviews.llvm.org/D12313

llvm-svn: 247104
2015-09-08 23:52:33 +00:00
John McCall 0a49015629 Collect SEH captures in a set instead of a vector to avoid
doing redundant work if a variable is used multiple times.

Fixes PR24751.

llvm-svn: 247075
2015-09-08 21:15:22 +00:00
NAKAMURA Takumi 64319286d0 clang/test/CodeGen/complex-convert.c: Appease for targeting powerpc64-*.
llvm-svn: 247015
2015-09-08 14:19:13 +00:00
Jakub Kuderski f50ab0ffce findDominatingStoreToReturn in CGCall.cpp didn't check if a candidate store
instruction used the ReturnValue as pointer operand or value operand. This
led to wrong code gen - in later stages (load-store elision code) the found
store and its operand would be erased, causing ReturnValue to become a <badref>.

The patch adds a check that makes sure that ReturnValue is a pointer operand of
store instruction. Regression test is also added.

This fixes PR24386.
Differential Revision: http://reviews.llvm.org/D12400

llvm-svn: 247003
2015-09-08 10:36:42 +00:00
NAKAMURA Takumi f7bee71c26 Fix clang/test/CodeGen/mips-varargs.c for -Asserts, possibly typo.
llvm-svn: 246994
2015-09-08 09:37:09 +00:00
John McCall 7f416cc426 Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment.  Introduce APIs on CGBuilderTy to work with Address
values.  Change core APIs on CGF/CGM to traffic in Address where
appropriate.  Require alignments to be non-zero.  Update a ton
of code to compute and propagate alignment information.

As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.

The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned.  Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay.  I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.

Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.

We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment.  In particular,
field access now uses alignmentAtOffset instead of min.

Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs.  For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint.  That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.

ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments.  In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments.  That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.

I partially punted on applying this work to CGBuiltin.  Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.

llvm-svn: 246985
2015-09-08 08:05:57 +00:00
Simon Pilgrim 437cc973fb [X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
llvm-svn: 246974
2015-09-07 20:10:11 +00:00
Simon Pilgrim 0d9d748bf1 [X86][SSSE3] Added SSSE3 IR + assembly codegen builtin tests
Transferred SSSE3 instructions from sse-builtins.c

llvm-svn: 246948
2015-09-06 17:06:22 +00:00
Simon Pilgrim ff88a0da31 [X86]][SSE3] Added SSE41 IR + assembly codegen builtin tests
Transferred SSE41 instructions from sse-builtins.c

llvm-svn: 246947
2015-09-06 16:38:17 +00:00
Alexandros Lamprineas 94d75dba14 Refactoring of how ARMTargetInfo handles default target features.
Differential Revision: http://reviews.llvm.org/D11299

llvm-svn: 246946
2015-09-06 16:15:45 +00:00
Simon Pilgrim 8391ac7001 [X86]][SSE3] Added SSE3 IR + assembly codegen builtin tests
llvm-svn: 246945
2015-09-06 14:45:13 +00:00
Simon Pilgrim de06f31885 [X86]][SSE42] Added SSE42 IR + assembly codegen builtin tests
llvm-svn: 246944
2015-09-06 14:05:33 +00:00
George Burgess IV b40cd567c3 Fix a bug in __builtin_object_size cast removal
Apparently there are many cast kinds that may cause implicit pointer
arithmetic to happen. In light of this, the cast ignoring logic
introduced in r246877 has been changed to only ignore a small set of
cast kinds, and a test for this behavior has been added.

Thanks to Richard for catching this before it became a bug report. :)

llvm-svn: 246890
2015-09-04 22:36:18 +00:00
George Burgess IV 3a03fabdd0 Increase accuracy of __builtin_object_size.
Improvements:

- For all types, we would give up in a case such as:
    __builtin_object_size((char*)&foo, N);
  even if we could provide an answer to
    __builtin_object_size(&foo, N);
  We now provide the same answer for both of the above examples in all
  cases.

- For type=1|3, we now support subobjects with unknown bases, as long
  as the designator is valid.

Thanks to Richard Smith for the review + design planning.

Review: http://reviews.llvm.org/D12169
llvm-svn: 246877
2015-09-04 21:28:13 +00:00
Alexey Bataev a7ab1b4206 [X86-64] Allow additional register names in inline assembler.
Patch allows to recognize additional registers x8d, x8b, x8w - x15d, x15b, x15w in inline assembler, already recognized by backend
Differential Revision: http://reviews.llvm.org/D12594

llvm-svn: 246835
2015-09-04 03:42:23 +00:00
Dan Gohman c285307e14 [WebAssembly] Initial WebAssembly support in clang
This implements basic support for compiling (though not yet assembling
or linking) for a WebAssembly target. Note that ABI details are not yet
finalized, and may change.

Differential Revision: http://reviews.llvm.org/D12002

llvm-svn: 246814
2015-09-03 22:51:53 +00:00
Oliver Stannard dc2854c2f1 [ARM] Allow passing/returning of __fp16 arguments
The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246764
2015-09-03 12:40:58 +00:00
Oliver Stannard 9253f00d13 Revert 246755 as it breaks buildbots
Original commit message:
[ARM] Allow passing/returning of __fp16 arguments

The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246760
2015-09-03 11:46:24 +00:00
Oliver Stannard ee0286201c [ARM] Allow passing/returning of __fp16 arguments
The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246755
2015-09-03 09:34:53 +00:00
Sanjay Patel a24296b459 add __builtin_unpredictable and convert to metadata
This patch depends on r246688 (D12341).

The goal is to make LLVM generate different code for these functions for a target that
has cheap branches (see PR23827 for more details):

int foo();

int normal(int x, int y, int z) {
   if (x != 0 && y != 0) return foo();
   return 1;
}

int crazy(int x, int y) {
   if (__builtin_unpredictable(x != 0 && y != 0)) return foo();
   return 1;
}

Differential Revision: http://reviews.llvm.org/D12458

llvm-svn: 246699
2015-09-02 20:01:30 +00:00
Hal Finkel 65e1e4dbe0 [PowerPC] Support __builtin_ppc_get_timebase
GCC 4.8+ has a PowerPC-specific intrinsic, __builtin_ppc_get_timebase, to do
what Clang's __builtin_readcyclecounter does. For compatibility with code that
uses GCC's spelling (including glibc), support it as well.

Partially fixes PR23681.

llvm-svn: 246510
2015-08-31 23:55:19 +00:00
Hans Wennborg 2151d12ec0 Fix CHECK directives that weren't checking.
llvm-svn: 246492
2015-08-31 21:48:52 +00:00
Jingyue Wu 2d69f9608e [CUDA] fix codegen for __nvvm_atom_min/max_gen_u*
Summary: Clang should emit "atomicrmw umin/umax" instead of "atomicrmw min/max".

Reviewers: eliben, tra

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12487

llvm-svn: 246455
2015-08-31 17:25:51 +00:00
Yaron Keren 2dbe3440d5 Fix test for Release builds, the label form is <label>:14, not <label>14.
llvm-svn: 246391
2015-08-30 17:46:43 +00:00
Yaron Keren 43e184ee0c Make test resistant to false matches of numbered (unnamed) labels inside other numbers.
In release builds labels are numbers. Matching just the number may result
in false matches where the label is contained in other numbers, such as
14 inside [114 x i8]. A stricter match requiring start of line or > character
before the label avoids these false matches.

llvm-svn: 246385
2015-08-30 15:24:46 +00:00
Simon Pilgrim e7708a84b9 [X86] Reapplied r246204, r246206, r246211, r246223
(Re)added debug codegen test for F16C, FMA4, XOP + 3DNow! intrinsics

Part of PR24590

llvm-svn: 246363
2015-08-29 17:13:40 +00:00
Eric Christopher a15a35e552 Add a check for a function we're not testing.
llvm-svn: 246355
2015-08-29 02:59:37 +00:00
Renato Golin b9365ae36a Revert "[X86][3DNow] Added debug codegen test for 3DNow! intrinsics"
This reverts commit r246223, as it broke all ARM/AArch64 bots.

llvm-svn: 246323
2015-08-28 19:39:29 +00:00
Renato Golin 0b4112341b Revert "[X86][XOP] Added debug codegen test for XOP intrinsics"
This reverts commit r246211, as it broke all ARM/AArch64 bots.

llvm-svn: 246321
2015-08-28 19:38:05 +00:00
Renato Golin a3265f5be7 Revert "[X86][FMA4] Added debug codegen test for FMA4 intrinsics"
This reverts commit r246206, as it broke all ARM/AArch64 bots.

llvm-svn: 246320
2015-08-28 19:36:27 +00:00
Renato Golin b44e54170e Revert "[X86][F16C] Added debug codegen test for F16C intrinsics"
This reverts commit r246204, as it was breaking all ARM/AArch64 bots.

llvm-svn: 246319
2015-08-28 19:34:53 +00:00
Steven Wu 5528da76ef Revert r246214 and r246213
These two commits causes llvm LTO bootstrap to hang in ScalarEvolution.

llvm-svn: 246282
2015-08-28 07:14:10 +00:00
Ahmed Bougacha 02b7b56af8 [X86] Bump Darwin MaxVectorAlign to 64 when AVX512 is enabled.
Without this, 64-byte vector types (__m512), specified to be 64-byte
aligned in the AVX512 draft SysV ABI, will only be 32-byte aligned.

This is analoguous to AVX, for which we accept 32-byte max alignment.

Differential Revision: http://reviews.llvm.org/D10724

llvm-svn: 246230
2015-08-27 22:42:12 +00:00
Ahmed Bougacha 82b619ea68 [X86] Conditionalize Darwin MaxVectorAlign on the presence of AVX.
There's no point in using a larger alignment if we have no instructions
that would benefit from it.

Differential Revision: http://reviews.llvm.org/D12389

llvm-svn: 246229
2015-08-27 22:30:38 +00:00
Simon Pilgrim c7eaa17fe1 [X86][3DNow] Added debug codegen test for 3DNow! intrinsics
Part of PR24590

llvm-svn: 246223
2015-08-27 22:18:09 +00:00
Piotr Padlewski 525f746710 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.

http://reviews.llvm.org/D11859

llvm-svn: 246213
2015-08-27 21:35:37 +00:00
Simon Pilgrim 7033a9ce33 [X86][XOP] Added debug codegen test for XOP intrinsics
Part of PR24590

llvm-svn: 246211
2015-08-27 21:32:03 +00:00
Simon Pilgrim 75dffb8df3 [X86][FMA4] Added debug codegen test for FMA4 intrinsics
Part of PR24590

llvm-svn: 246206
2015-08-27 20:41:45 +00:00
Simon Pilgrim 9362270f78 [X86][F16C] Added debug codegen test for F16C intrinsics
Part of PR24590

llvm-svn: 246204
2015-08-27 20:34:02 +00:00