cc707657f9
If the CPSR is changed due to switching between ARM and Thumb ISETSTATE,
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we want to record it and issue a WriteRegister callback so the clients
can track the mode changes accordingly.
llvm-svn: 125209
2011-02-09 19:11:32 +00:00
000aeb89ae
Patch from Kirk Beitz to make things compile on MinGW minus the putenv part.
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llvm-svn: 125199
2011-02-09 17:41:27 +00:00
7eaacc517b
Add some helper methods to the EmulateInstructionARM class as a first step in the
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refactorings of EmulateInstructionARM.cpp file, which will be modified later to
take advantage of these helper methods.
llvm-svn: 125148
2011-02-09 01:00:31 +00:00
123b89b67f
Add code to emulate the LDMIB Arm instruction.
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Modify code for LDM and LDMDB instructions to only
create one context and to reuse it, rather than
creating multiple contexts.
llvm-svn: 125139
2011-02-08 23:56:10 +00:00
108a363318
Fix typos.
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llvm-svn: 125138
2011-02-08 23:49:37 +00:00
03feace9d0
Add EmulateCB() entry to the g_thumb_opcodes table to represent "Compare and Branch
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on NonZero and Compare and Branch on Zero" operations.
llvm-svn: 125134
2011-02-08 23:21:57 +00:00
cdb58e1236
Add code to emulate LDMDB Arm instruction.
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llvm-svn: 125133
2011-02-08 23:16:02 +00:00
7aa01cfd64
Add code to emulate the LDM ARM instruction.
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llvm-svn: 125118
2011-02-08 22:24:38 +00:00
181376f29f
Add missing implementation for "BL, BLX (immediate)" Encoding T1 and an entry for "bl <label>"
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into g_thumb_opcodes table.
llvm-svn: 125112
2011-02-08 20:36:34 +00:00
86e48b6940
Add missing implementation for "BL, BLX (immediate)" Encoding A1.
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llvm-svn: 125103
2011-02-08 18:58:31 +00:00
a3990398a3
Add implementation for EmulateInstructionARM::EmulateB() and fixed two typos in g_thumb_opcodes
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as pointed out By Caroline. Refactored a little bit by adding two new helper methods to the
EmulateInstructionARM class:
o BranchWritePC()
o BXWritePC()
llvm-svn: 125059
2011-02-08 00:06:35 +00:00
05a975d777
Add EmulateInstructionARM::EmulateB entries to the g_arm_opcodes and g_thumb_opcodes
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tables. EmulateB() has empty impl. and needs to be filled in later.
llvm-svn: 125048
2011-02-07 20:11:47 +00:00
56902044a7
Handle the thumb branch instructions which have their cond bits embedded in the instruction stream.
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llvm-svn: 124925
2011-02-05 01:39:52 +00:00
6e2acff0be
Add EmulateInstructionARM::EmulateIT() to the g_thumb_opcodes table,
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to represent the the 'If Then' instruction which makes up to four following
instructions (the IT block)conditional.
Hook up ITSession utility class as a member variable of EmulateInstructionARM.
llvm-svn: 124915
2011-02-05 00:46:10 +00:00
ea745e86c8
Add a utility class ITSession to maintain the ITState for the Thumb ISA.
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llvm-svn: 124906
2011-02-04 23:02:47 +00:00
b52193787d
Add EmulateInstructionARM::EmulateSVC() to the g_arm_opcodes and g_thumb_opcodes tables,
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to represent the supervisor call instruction (previosuly software interrupt).
llvm-svn: 124840
2011-02-04 00:40:18 +00:00
d07a57f222
Add EmulateBLXImmediate() and EmulateBLXRm() to the g_arm_opcodes and g_thumb_opcodes tables,
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which represent "bl <label>", "blx <label>", and "blx <Rm>" instructions.
llvm-svn: 124710
2011-02-02 01:13:56 +00:00
2684ccccda
Remove the 'lldb_private::' namespace resolution operator.
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llvm-svn: 124671
2011-02-01 18:51:48 +00:00
3d9011d6dd
Add EmulateVPOP() to the g_arm_opcodes and g_thumb_opcodes tables, which represents
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an operation to load multiple extension registers from the stack.
llvm-svn: 124670
2011-02-01 18:35:28 +00:00
c46f94d490
Cleaned up the EmulateInstructionARM to have the evaluate instruction
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callbacks use member functions.
llvm-svn: 124636
2011-02-01 00:49:32 +00:00
c1dfd93e1e
Made the EmulateInstruction class into a plug-in interface and moved the
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source files around into the places they need to go.
llvm-svn: 124631
2011-02-01 00:04:43 +00:00
Johnny Chen