Anton Korobeynikov
|
3894c8b6c2
|
Loads are not two-address in any way
llvm-svn: 76033
|
2009-07-16 14:24:01 +00:00 |
|
Anton Korobeynikov
|
c8f76f47dd
|
Add LOAD NEGATIVE instruction
llvm-svn: 76032
|
2009-07-16 14:23:44 +00:00 |
|
Anton Korobeynikov
|
ae2d8abf2c
|
LOAD COMPLEMENT instruction is not really two-addr
llvm-svn: 76031
|
2009-07-16 14:23:30 +00:00 |
|
Anton Korobeynikov
|
82af42d361
|
Add multiple add/sub instructions
llvm-svn: 76030
|
2009-07-16 14:23:16 +00:00 |
|
Anton Korobeynikov
|
b106b60456
|
Handle FP callee-saved regs
llvm-svn: 76029
|
2009-07-16 14:23:01 +00:00 |
|
Anton Korobeynikov
|
871784ba88
|
Proper FP extloads
llvm-svn: 76028
|
2009-07-16 14:22:46 +00:00 |
|
Anton Korobeynikov
|
12400008a7
|
Add proper PWS impdef's
llvm-svn: 76027
|
2009-07-16 14:22:30 +00:00 |
|
Anton Korobeynikov
|
3c44a39156
|
Propagate FP select_cc to dag inserters
llvm-svn: 76026
|
2009-07-16 14:22:15 +00:00 |
|
Anton Korobeynikov
|
430ab4f382
|
Implement fp_to_sint
llvm-svn: 76025
|
2009-07-16 14:21:57 +00:00 |
|
Anton Korobeynikov
|
345e08d24c
|
Implement FP regs spills / restores
llvm-svn: 76024
|
2009-07-16 14:21:41 +00:00 |
|
Anton Korobeynikov
|
0fcdd8d424
|
Add fabs
llvm-svn: 76023
|
2009-07-16 14:21:27 +00:00 |
|
Anton Korobeynikov
|
50485d65d4
|
Add fneg
llvm-svn: 76022
|
2009-07-16 14:21:12 +00:00 |
|
Anton Korobeynikov
|
d7416e7c0b
|
We don't have native sine / cosine instructions
llvm-svn: 76021
|
2009-07-16 14:20:56 +00:00 |
|
Anton Korobeynikov
|
77928399b0
|
More sint_to_fp stuff
llvm-svn: 76020
|
2009-07-16 14:20:39 +00:00 |
|
Anton Korobeynikov
|
8195797de2
|
Add bunch of FP instructions
llvm-svn: 76019
|
2009-07-16 14:20:24 +00:00 |
|
Anton Korobeynikov
|
45a56de726
|
We don't have any FP extloads
llvm-svn: 76018
|
2009-07-16 14:20:08 +00:00 |
|
Anton Korobeynikov
|
ead9b9fb31
|
Implement all comparisons
llvm-svn: 76017
|
2009-07-16 14:19:54 +00:00 |
|
Anton Korobeynikov
|
7cb00653c1
|
Add constpool lowering / printing
llvm-svn: 76016
|
2009-07-16 14:19:35 +00:00 |
|
Anton Korobeynikov
|
c806cea4cb
|
Allow FP arguments pass / return
llvm-svn: 76015
|
2009-07-16 14:19:16 +00:00 |
|
Anton Korobeynikov
|
923b47e89d
|
Register FP regclasses
llvm-svn: 76014
|
2009-07-16 14:19:02 +00:00 |
|
Anton Korobeynikov
|
5509b58cd7
|
Add FP regs
llvm-svn: 76013
|
2009-07-16 14:18:48 +00:00 |
|
Anton Korobeynikov
|
570d0c36ee
|
Fix fallout from prev. patch
llvm-svn: 76012
|
2009-07-16 14:18:31 +00:00 |
|
Anton Korobeynikov
|
b25949b0f5
|
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
llvm-svn: 76011
|
2009-07-16 14:18:17 +00:00 |
|
Anton Korobeynikov
|
e5b04d7102
|
Use divide single for 32 bit signed divides
llvm-svn: 76010
|
2009-07-16 14:17:52 +00:00 |
|
Anton Korobeynikov
|
2799032a45
|
Add missed operands types
llvm-svn: 76009
|
2009-07-16 14:17:07 +00:00 |
|
Anton Korobeynikov
|
5fd5c3efb6
|
Missed part of prev. patch
llvm-svn: 76008
|
2009-07-16 14:16:45 +00:00 |
|
Anton Korobeynikov
|
b950f1961b
|
Another attempt to fix prologue emission
llvm-svn: 76007
|
2009-07-16 14:16:26 +00:00 |
|
Anton Korobeynikov
|
091872cb37
|
Implement 'large' PIC model
llvm-svn: 76006
|
2009-07-16 14:16:05 +00:00 |
|
Anton Korobeynikov
|
569a94c4d0
|
Implement shifts properly (hopefilly - finally!)
llvm-svn: 76005
|
2009-07-16 14:15:24 +00:00 |
|
Anton Korobeynikov
|
e0ad108f04
|
Remove redundand register move
llvm-svn: 76004
|
2009-07-16 14:14:54 +00:00 |
|
Anton Korobeynikov
|
fe8df8ff61
|
Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
|
2009-07-16 14:14:33 +00:00 |
|
Anton Korobeynikov
|
68b101a0e1
|
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
llvm-svn: 76002
|
2009-07-16 14:14:01 +00:00 |
|
Anton Korobeynikov
|
1de4295372
|
32 bit rotate is not twoaddr instruction
llvm-svn: 76001
|
2009-07-16 14:13:43 +00:00 |
|
Anton Korobeynikov
|
34ad780d0d
|
32 bit shifts have only 12 bit displacements
llvm-svn: 76000
|
2009-07-16 14:13:24 +00:00 |
|
Anton Korobeynikov
|
6759661c3f
|
Add proper register aliases
llvm-svn: 75999
|
2009-07-16 14:12:54 +00:00 |
|
Anton Korobeynikov
|
a3157b1c9c
|
Properly generate stack frame
llvm-svn: 75998
|
2009-07-16 14:12:36 +00:00 |
|
Anton Korobeynikov
|
6f3d11cf0b
|
Unbreak indirect branches
llvm-svn: 75997
|
2009-07-16 14:12:18 +00:00 |
|
Anton Korobeynikov
|
2300eaa828
|
Unbreak
llvm-svn: 75996
|
2009-07-16 14:12:00 +00:00 |
|
Anton Korobeynikov
|
20237e5071
|
Do not forget to save R15 when we allocate stack frame
llvm-svn: 75995
|
2009-07-16 14:11:40 +00:00 |
|
Anton Korobeynikov
|
427dce8678
|
All calls clobbers R14
llvm-svn: 75994
|
2009-07-16 14:11:22 +00:00 |
|
Anton Korobeynikov
|
2e574c156e
|
Unbreak calls to vararg functions
llvm-svn: 75993
|
2009-07-16 14:11:03 +00:00 |
|
Anton Korobeynikov
|
466f2e4b00
|
Stupid typo
llvm-svn: 75992
|
2009-07-16 14:10:49 +00:00 |
|
Anton Korobeynikov
|
d8458e6c09
|
Typos
llvm-svn: 75991
|
2009-07-16 14:10:35 +00:00 |
|
Anton Korobeynikov
|
1eb6262b4b
|
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
|
2009-07-16 14:10:17 +00:00 |
|
Anton Korobeynikov
|
3db6283188
|
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.
llvm-svn: 75989
|
2009-07-16 14:09:56 +00:00 |
|
Anton Korobeynikov
|
62f8515b1c
|
Add support for 12 bit displacements
llvm-svn: 75988
|
2009-07-16 14:09:35 +00:00 |
|
Anton Korobeynikov
|
432d4cd915
|
We already have reserved call frame regardless whether variable sized frame objects were present or not
llvm-svn: 75987
|
2009-07-16 14:09:04 +00:00 |
|
Anton Korobeynikov
|
43d33bd6d2
|
Emit proper lowering of load from arg stack slot
llvm-svn: 75986
|
2009-07-16 14:08:42 +00:00 |
|
Anton Korobeynikov
|
a8197bb651
|
Implement dynamic allocas
llvm-svn: 75985
|
2009-07-16 14:08:15 +00:00 |
|
Anton Korobeynikov
|
7193e2670e
|
Add jump tables
llvm-svn: 75984
|
2009-07-16 14:07:50 +00:00 |
|
Anton Korobeynikov
|
5dfac244a0
|
Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
llvm-svn: 75983
|
2009-07-16 14:07:24 +00:00 |
|
Anton Korobeynikov
|
d52a95f170
|
Implement 64 bit immediates
llvm-svn: 75982
|
2009-07-16 14:07:06 +00:00 |
|
Anton Korobeynikov
|
2ff298fad0
|
Add rotates
llvm-svn: 75981
|
2009-07-16 14:06:49 +00:00 |
|
Anton Korobeynikov
|
9362d9aa76
|
Add patterns for integer negate
llvm-svn: 75980
|
2009-07-16 14:06:27 +00:00 |
|
Anton Korobeynikov
|
f07c7941f0
|
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
llvm-svn: 75979
|
2009-07-16 14:06:00 +00:00 |
|
Anton Korobeynikov
|
59049d9176
|
Add 32 bit and reg-imm and disable invalid patterns for now
llvm-svn: 75978
|
2009-07-16 14:05:32 +00:00 |
|
Anton Korobeynikov
|
2d218394c6
|
Add z9 and z10 target processors. Mark z10-only instructions as such.
llvm-svn: 75977
|
2009-07-16 14:05:00 +00:00 |
|
Anton Korobeynikov
|
68b8486fde
|
Fix MUL64rm instruction asmprinting
llvm-svn: 75976
|
2009-07-16 14:04:38 +00:00 |
|
Anton Korobeynikov
|
edba6f3af7
|
Preliminary asmprinting of globals
llvm-svn: 75975
|
2009-07-16 14:04:22 +00:00 |
|
Anton Korobeynikov
|
a2afc692f6
|
Implement asmprinting for odd-even regpairs
llvm-svn: 75974
|
2009-07-16 14:04:01 +00:00 |
|
Anton Korobeynikov
|
ec66c122e0
|
32-bit ri addressing mode has only 12-bit displacement
llvm-svn: 75973
|
2009-07-16 14:03:41 +00:00 |
|
Anton Korobeynikov
|
7b2353595d
|
Forgot to add
llvm-svn: 75972
|
2009-07-16 14:03:24 +00:00 |
|
Anton Korobeynikov
|
59ef95bfc1
|
Print signed imms properly
llvm-svn: 75970
|
2009-07-16 14:02:45 +00:00 |
|
Anton Korobeynikov
|
5af8f0ebf1
|
Provide hooks for spilling / restoring stuff
llvm-svn: 75969
|
2009-07-16 14:01:27 +00:00 |
|
Anton Korobeynikov
|
b284c9d876
|
Revert thinko
llvm-svn: 75968
|
2009-07-16 14:01:10 +00:00 |
|
Anton Korobeynikov
|
abbae3bc5e
|
Temporary workaround problem with signed 32-bit imm's
llvm-svn: 75967
|
2009-07-16 14:00:42 +00:00 |
|
Anton Korobeynikov
|
ace2a02a84
|
Implement InsertBranch() hook
llvm-svn: 75966
|
2009-07-16 14:00:10 +00:00 |
|
Anton Korobeynikov
|
73bf01f236
|
Pipehole pattern for i32 imm's
llvm-svn: 75965
|
2009-07-16 13:59:49 +00:00 |
|
Anton Korobeynikov
|
ff1edc23ac
|
Bunch of sext_inreg patterns
llvm-svn: 75964
|
2009-07-16 13:59:18 +00:00 |
|
Anton Korobeynikov
|
c3170f5236
|
Provide normal 32 bit load and store
llvm-svn: 75963
|
2009-07-16 13:58:43 +00:00 |
|
Anton Korobeynikov
|
d568f6dce2
|
Proper lower 'small' results
llvm-svn: 75962
|
2009-07-16 13:58:24 +00:00 |
|
Anton Korobeynikov
|
f1bf3176c6
|
Completel forgot about unconditional branches
llvm-svn: 75961
|
2009-07-16 13:57:52 +00:00 |
|
Anton Korobeynikov
|
15d6e8785b
|
Lower addresses of globals
llvm-svn: 75960
|
2009-07-16 13:57:27 +00:00 |
|
Anton Korobeynikov
|
f0d7d6ce65
|
Provide "wide" muls and divs/rems
llvm-svn: 75958
|
2009-07-16 13:56:42 +00:00 |
|
Anton Korobeynikov
|
d919010b6a
|
Fix thinko
llvm-svn: 75957
|
2009-07-16 13:56:11 +00:00 |
|
Anton Korobeynikov
|
4ee0acd326
|
Fix epic bug with invalid regclass for R0D
llvm-svn: 75956
|
2009-07-16 13:55:51 +00:00 |
|
Anton Korobeynikov
|
590f99b18b
|
More register pairs (now 32 bit ones)
llvm-svn: 75954
|
2009-07-16 13:55:04 +00:00 |
|
Anton Korobeynikov
|
ccde90b83c
|
Add even-odd register pairs
llvm-svn: 75953
|
2009-07-16 13:54:45 +00:00 |
|
Anton Korobeynikov
|
31e9a53d17
|
Unbreak due to mainline api change
llvm-svn: 75952
|
2009-07-16 13:54:20 +00:00 |
|
Anton Korobeynikov
|
071178ea15
|
Preliminary mul lowering
llvm-svn: 75951
|
2009-07-16 13:53:55 +00:00 |
|
Anton Korobeynikov
|
23e3c6657c
|
More extloads
llvm-svn: 75950
|
2009-07-16 13:53:35 +00:00 |
|
Anton Korobeynikov
|
0f59e1e874
|
SELECT_CC lowering
llvm-svn: 75948
|
2009-07-16 13:52:51 +00:00 |
|
Anton Korobeynikov
|
ac4fb7f977
|
Conditional branches and comparisons
llvm-svn: 75947
|
2009-07-16 13:52:31 +00:00 |
|
Anton Korobeynikov
|
11665a64b0
|
Emit correct offset for PseudoSourceValue
llvm-svn: 75946
|
2009-07-16 13:52:10 +00:00 |
|
Anton Korobeynikov
|
29329a0695
|
Provide proper stack offsets for outgoing arguments
llvm-svn: 75945
|
2009-07-16 13:51:53 +00:00 |
|
Anton Korobeynikov
|
44483f9eb3
|
Change register allocation order to reduce amount of callee-saved regs to be spilled.
llvm-svn: 75944
|
2009-07-16 13:51:34 +00:00 |
|
Anton Korobeynikov
|
8695a30066
|
Emit callee-saved regs spills / restores
llvm-svn: 75943
|
2009-07-16 13:51:12 +00:00 |
|
Anton Korobeynikov
|
d694b9ff8b
|
Some preliminary call lowering
llvm-svn: 75941
|
2009-07-16 13:50:21 +00:00 |
|
Anton Korobeynikov
|
018599fc0b
|
Prologue / epilogue emission
llvm-svn: 75940
|
2009-07-16 13:49:49 +00:00 |
|
Anton Korobeynikov
|
09890bd434
|
Add simple frame index elimination
llvm-svn: 75939
|
2009-07-16 13:49:25 +00:00 |
|
Anton Korobeynikov
|
8a095bf56d
|
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
llvm-svn: 75937
|
2009-07-16 13:48:42 +00:00 |
|
Anton Korobeynikov
|
19911b338a
|
Do not truncate sign bits for negative imms
llvm-svn: 75936
|
2009-07-16 13:48:23 +00:00 |
|
Anton Korobeynikov
|
405833dfb6
|
Add address computation stuff
llvm-svn: 75935
|
2009-07-16 13:47:59 +00:00 |
|
Anton Korobeynikov
|
b1e35b311c
|
Cleanup
llvm-svn: 75934
|
2009-07-16 13:47:36 +00:00 |
|
Anton Korobeynikov
|
df99232d27
|
Add mem-imm stores
llvm-svn: 75933
|
2009-07-16 13:47:14 +00:00 |
|
Anton Korobeynikov
|
98dfc8c2c4
|
[PATCH 023/155] Typo
llvm-svn: 75932
|
2009-07-16 13:45:22 +00:00 |
|
Anton Korobeynikov
|
44f8bbfb3f
|
Add stores and truncstores
llvm-svn: 75931
|
2009-07-16 13:45:00 +00:00 |
|
Anton Korobeynikov
|
11b91b4e2e
|
Add patterns for various extloads
llvm-svn: 75930
|
2009-07-16 13:44:30 +00:00 |
|
Anton Korobeynikov
|
0179364392
|
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
llvm-svn: 75929
|
2009-07-16 13:44:00 +00:00 |
|
Anton Korobeynikov
|
3709f49ee9
|
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
llvm-svn: 75928
|
2009-07-16 13:43:40 +00:00 |
|
Anton Korobeynikov
|
04be818918
|
Add shifts and reg-imm address matching
llvm-svn: 75927
|
2009-07-16 13:43:18 +00:00 |
|
Anton Korobeynikov
|
cf7ea6a94f
|
Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
|
2009-07-16 13:42:31 +00:00 |
|
Anton Korobeynikov
|
293324104b
|
Add 32 bit subregs
llvm-svn: 75923
|
2009-07-16 13:35:30 +00:00 |
|
Anton Korobeynikov
|
de517f1e32
|
Add another bunch of reg-imm patterns for add/or/and/xor
llvm-svn: 75922
|
2009-07-16 13:35:08 +00:00 |
|
Anton Korobeynikov
|
ebe2de0e14
|
Add bunch of reg-imm movs
llvm-svn: 75921
|
2009-07-16 13:34:50 +00:00 |
|
Anton Korobeynikov
|
168614f54f
|
Proper match halfword-imm operands for mov and add
llvm-svn: 75920
|
2009-07-16 13:34:24 +00:00 |
|
Anton Korobeynikov
|
28234bcde2
|
Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
|
2009-07-16 13:33:57 +00:00 |
|
Anton Korobeynikov
|
0d76b17a78
|
Add reg-reg and pattern
llvm-svn: 75917
|
2009-07-16 13:32:49 +00:00 |
|
Anton Korobeynikov
|
f9fe4036f2
|
Add sub reg-reg pattern
llvm-svn: 75916
|
2009-07-16 13:32:16 +00:00 |
|
Anton Korobeynikov
|
a083d7af53
|
Add xor reg-reg pattern
llvm-svn: 75915
|
2009-07-16 13:31:28 +00:00 |
|
Anton Korobeynikov
|
65096d6a60
|
Add or reg-reg pattern.
llvm-svn: 75914
|
2009-07-16 13:30:53 +00:00 |
|
Anton Korobeynikov
|
18172d786f
|
Add add reg-reg and reg-imm patterns
llvm-svn: 75913
|
2009-07-16 13:30:15 +00:00 |
|
Anton Korobeynikov
|
09082fa01a
|
Add simple reg-reg and reg-imm moves
llvm-svn: 75912
|
2009-07-16 13:29:38 +00:00 |
|
Anton Korobeynikov
|
cf4ba97dba
|
Minimal lowering for formal_arguments / ret
llvm-svn: 75911
|
2009-07-16 13:28:59 +00:00 |
|
Anton Korobeynikov
|
c334c28b3b
|
Let's start another backend :)
llvm-svn: 75909
|
2009-07-16 13:27:25 +00:00 |