623e6fd466
AMDGPU: Hack for VS_32 register pressure
...
For some reason VS_32 ends up factoring into the pressure heuristics
even though we should never see a virtual register with this class.
When SGPRs are reserved for register spilling, this for some reason
triggers reg-crit scheduling.
Setting isAllocatable = 0 may help with this since that seems to remove
it from the default implementation's generated table.
llvm-svn: 252321
2015-11-06 17:54:43 +00:00
73aa8f687a
AMDGPU: Fix splitting x16 SMRD loads
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When used recursively, this would set the kill flag
on the intermediate step from first splitting
x16 to x8.
llvm-svn: 248741
2015-09-28 20:54:52 +00:00
e5d042cd56
AMDGPU: Fix moving SMRD loads with literal offsets on CI
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llvm-svn: 248740
2015-09-28 20:54:46 +00:00
b378f075a2
AMDGPU: Add testcases
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Make sure we are testing moving users
of the moved and split SMRD loads.
llvm-svn: 248738
2015-09-28 20:54:38 +00:00
f3c91f573f
AMDGPU: Cleanup test
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Run instnamer on it, and rename check prefix.
This is in preparation for adding new testcases to cover
bugs on other subtargets.
llvm-svn: 248737
2015-09-28 20:54:32 +00:00
711b390a7c
AMDGPU: Assume SMRD access for constant address space
...
Since r243294 these are selected to SMRD and
moved later if required.
llvm-svn: 244354
2015-08-07 20:18:34 +00:00
45bb48ea19
R600 -> AMDGPU rename
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llvm-svn: 239657
2015-06-13 03:28:10 +00:00
Matt Arsenault