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4 Commits

Author SHA1 Message Date
Matt Arsenault eb522e68bc AMDGPU: Support v2i16/v2f16 packed operations 
llvm-svn: 296396
 2017-02-27 22:15:25 +00:00
Wei Ding 205bfdb3e9 AMDGPU : Add trap handler support. 
Differential Revision: http://reviews.llvm.org/D26010

llvm-svn: 294692
 2017-02-10 02:15:29 +00:00
Matt Arsenault 9dba9bd4cf AMDGPU: Use source modifiers with f16->f32 conversions 
The operand types were defined to fit the fp16_to_fp node, which
has the half as an integer type. v_cvt_f32_f16 does support
source modifiers, so change this to have an FP type and modifiers.

For targets without legal f16, this requires recognizing the
bit operations and trying to produce them.

llvm-svn: 293857
 2017-02-02 02:27:04 +00:00
Matt Arsenault c79dc70d50 AMDGPU: Fix f16 fabs/fneg 
llvm-svn: 286931
 2016-11-15 02:25:28 +00:00