696e27e1ec
[X86][SSE] Regenerate scalar integer conversions to float tests
...
llvm-svn: 294499
2017-02-08 19:01:27 +00:00
d7518896ff
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
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Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions.
Differential Revision: https://reviews.llvm.org/D27684
llvm-svn: 289825
2016-12-15 16:05:29 +00:00
8893bd95f0
[X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
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We are being inconsistent with these instructions (and all their variants.....) with a random mix of them using the default float domain.
Differential Revision: https://reviews.llvm.org/D27419
llvm-svn: 288902
2016-12-07 12:10:49 +00:00
f4151bea72
[AVX512] Add initial support for the Execution Domain fixing pass to change some EVEX instructions.
...
llvm-svn: 276393
2016-07-22 05:00:52 +00:00
542dfcf44c
Optimized instruction sequence for sitofp operation on X86-32
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Optimized sitofp i64 %x to double. The current sequence
movl %ecx, 8(%esp)
movl %edx, 12(%esp)
fildll 8(%esp)
is replaced with:
movd %ecx, %xmm0
movd %edx, %xmm1
punpckldq %xmm1, %xmm0
movq %xmm0, 8(%esp)
Differential Revision: http://reviews.llvm.org/D15946
llvm-svn: 257285
2016-01-10 09:41:22 +00:00
58e86bc893
[X86] Fix sitofp and uitofp instruction matching failures with long double and avx512
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The operation action for i32 and i64 cannot be set to legal, as long double
needs custom lowering.
Patch by: mitch.l.bodart@intel.com
Differential Revision: http://reviews.llvm.org/D12372
llvm-svn: 248114
2015-09-20 08:12:17 +00:00
Simon Pilgrim