Commit Graph

1572 Commits

Author SHA1 Message Date
Gheorghe-Teodor Bercea 1e28a668bc [OpenMP][Clang] Support for target math functions
Summary:
In this patch we propose a temporary solution to resolving math functions for the NVPTX toolchain, temporary until OpenMP variant is supported by Clang.

We intercept the inclusion of math.h and cmath headers and if we are in the OpenMP-NVPTX case, we re-use CUDA's math function resolution mechanism.

Authors:
@gtbercea
@jdoerfert

Reviewers: hfinkel, caomhin, ABataev, tra

Reviewed By: hfinkel, ABataev, tra

Subscribers: mgorny, guansong, cfe-commits, jdoerfert

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61399

llvm-svn: 360063
2019-05-06 18:19:15 +00:00
Fangrui Song 041c377a59 [X86] Move files to correct directories after D60552
llvm-svn: 360022
2019-05-06 09:24:36 +00:00
Luo, Yuanke 844f662932 Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper Lake
Summary:
1. Enable infrastructure of AVX512_BF16, which is supported for BFLOAT16 in Cooper Lake;
2. Enable intrinsics for VCVTNE2PS2BF16, VCVTNEPS2BF16 and DPBF16PS instructions, which are Vector Neural Network Instructions supporting BFLOAT16 inputs and conversion instructions from IEEE single precision.
For more details about BF16 intrinsic, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Patch by LiuTianle

Reviewers: craig.topper, smaslov, LuoYuanke, wxiao3, annita.zhang, spatel, RKSimon

Reviewed By: craig.topper

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60552

llvm-svn: 360018
2019-05-06 08:25:11 +00:00
Tom Stellard dbe1c4aa6f lib/Header: Fix Visual Studio builds try #2
Summary:
This is a follow up to r355253 and a better fix than the first attempt
which was r359257.

We can't install anything from ${CMAKE_CFG_INTDIR}, because this value
is only defined at build time, but we still must make sure to copy the
headers into ${CMAKE_CFG_INTDIR}/lib/clang/$VERSION/include, because the lit
tests look for headers there.  So for this fix we revert to the
old behavior of copying the headers to ${CMAKE_CFG_INTDIR}/lib/clang/$VERSION/include
during the build and then installing them from the source tree.

Reviewers: smeenai, vzakhari, phosek

Reviewed By: smeenai, vzakhari

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61220

llvm-svn: 359654
2019-05-01 06:18:03 +00:00
Javed Absar 18b0c40bc5 [AArch64] Add support for MTE intrinsics
This provides intrinsics support for Memory Tagging Extension (MTE),
which was introduced with the Armv8.5-a architecture.
These intrinsics are available when __ARM_FEATURE_MEMORY_TAGGING is defined.
Each intrinsic is described in detail in the ACLE Q1 2019 documentation:
https://developer.arm.com/docs/101028/latest
Reviewed By: Tim Nortover, David Spickett
Differential Revision: https://reviews.llvm.org/D60485

llvm-svn: 359348
2019-04-26 21:08:11 +00:00
Tom Stellard 0184819e81 Revert lib/Header: Fix Visual Studio builds
This reverts r359257 (git commit 00d9789509)

This broke check-clang.

llvm-svn: 359258
2019-04-26 01:43:59 +00:00
Tom Stellard 00d9789509 lib/Header: Fix Visual Studio builds
Summary:
This is a follow up to r355253, which inadvertently broke Visual
Studio builds by trying to copy files from CMAKE_CFG_INTDIR.

See https://reviews.llvm.org/D58537#inline-532492

Reviewers: smeenai, vzakhari, phosek

Reviewed By: smeenai

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61054

llvm-svn: 359257
2019-04-26 01:18:59 +00:00
Jinsong Ji 12450d51a2 [PowerPC][NFC]Update licence to Apache 2
llvm-svn: 359164
2019-04-25 02:40:06 +00:00
Qiu Chaofan 19828e399b [PowerPC] [Clang] Port MMX intrinsics and basic test cases to Power
Port mmintrin.h which include x86 MMX intrinsics implementation to PowerPC platform (using Altivec).

To make the include process correct, PowerPC's toolchain class is overrided to insert new headers directory (named ppc_wrappers) into the path. Basic test cases for several intrinsic functions are added.

The header is mainly developed by Steven Munroe, with contributions from Paul Clarke, Bill Schmidt, Jinsong Ji and Zixuan Wu.

Reviewed By: Jinsong Ji

Differential Revision: https://reviews.llvm.org/D59924

llvm-svn: 358949
2019-04-23 05:50:24 +00:00
Evgeny Mankov 88aa3d7237 [CUDA][Windows] Restrict long double device functions declarations to Windows
As agreed in D60220, make long double declarations unobservable on non-windows platforms.

[Testing]
{Windows 10, Ubuntu 16.04.5}/{Visual C++ 2017 15.9.11 & 2019 16.0.1, gcc+ 5.4.0}/CUDA {8.0, 9.0, 9.1, 9.2, 10.0, 10.1}

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D60818

llvm-svn: 358654
2019-04-18 10:08:55 +00:00
Craig Topper 8e364c680f [X86] Restore the pavg intrinsics.
The pattern we replaced these with may be too hard to match as demonstrated by
PR41496 and PR41316.

This patch restores the intrinsics and then we can start focusing
on the optimizing the intrinsics.

I've mostly reverted the original patch that removed them. Though I modified
the avx512 intrinsics to not have masking built in.

Differential Revision: https://reviews.llvm.org/D60674

llvm-svn: 358427
2019-04-15 17:17:35 +00:00
Chandler Carruth 4cf5743b77 Move the builtin headers to use the new license file header.
Summary:
These all had somewhat custom file headers with different text from the
ones I searched for previously, and so I missed them. Thanks to Hal and
Kristina and others who prompted me to fix this, and sorry it took so
long.

Reviewers: hfinkel

Subscribers: mcrosier, javed.absar, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60406

llvm-svn: 357941
2019-04-08 20:51:30 +00:00
Evgeny Mankov 66a8b07cd9 [CUDA][Windows] Last fix for the clang Bug 38811 "Clang fails to compile with CUDA-9.x on Windows" (https://bugs.llvm.org/show_bug.cgi?id=38811).
[IMPORTANT]
With that last fix, CUDA has just started being compiling by clang on Windows after nearly a year and two clang’s major releases (7 and 8).
As long as the last LLVM release, in which clang was compiling CUDA on Windows successfully, was 6.0.1, this fix and two previous have to be included into upcoming 7.1.0 and 8.0.1 releases.

[How to repro]
clang++.exe -x cuda "c:\ProgramData\NVIDIA Corporation\CUDA Samples\v9.0\0_Simple\simplePrintf\simplePrintf.cu" -I"c:\ProgramData\NVIDIA Corporation\CUDA Samples\v9.0\common\inc" --cuda-gpu-arch=sm_50 --cuda-path="C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0" -L"c:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0\lib\x64" -lcudart.lib  -v

[Output]
In file included from C:\GIT\LLVM\trunk-for-submits\llvm-64-release-vs2017-15.9.9\dist\lib\clang\9.0.0\include\__clang_cuda_runtime_wrapper.h:327:
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:390:11: error: no matching function for call to '__isinfl'
  return (__isinfl(a) != 0);
          ^~~~~~~~
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:2662:14: note: candidate function not viable: call to __host__ function from __device__ function
__func__(int __isinfl(long double a))
             ^
In file included from <built-in>:1:
In file included from C:\GIT\LLVM\trunk-for-submits\llvm-64-release-vs2017-15.9.9\dist\lib\clang\9.0.0\include\__clang_cuda_runtime_wrapper.h:327:
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:438:11: error: no matching function for call to '__isnanl'
  return (__isnanl(a) != 0);
          ^~~~~~~~
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:2672:14: note: candidate function not viable: call to __host__ function from __device__ function
__func__(int __isnanl(long double a))
             ^
In file included from <built-in>:1:
In file included from C:\GIT\LLVM\trunk-for-submits\llvm-64-release-vs2017-15.9.9\dist\lib\clang\9.0.0\include\__clang_cuda_runtime_wrapper.h:327:
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:486:11: error: no matching function for call to '__finitel'
  return (__finitel(a) != 0);
          ^~~~~~~~~
C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v9.0/include\crt/math_functions.hpp:2652:14: note: candidate function not viable: call to __host__ function from __device__ function
__func__(int __finitel(long double a))
             ^
3 errors generated when compiling for sm_50.

[Solution]
Add missing long double device functions' declarations. Provide only declarations to prevent any use of long double on the device side, because CUDA does not support long double on the device side.

[Testing]
{Windows 10, Ubuntu 16.04.5}/{Visual C++ 2017 15.9.9, gcc+ 5.4.0}/CUDA {8.0, 9.0, 9.1, 9.2, 10.0, 10.1}

Reviewed by: Artem Belevich

Differential Revision: http://reviews.llvm.org/D60220

llvm-svn: 357779
2019-04-05 16:51:10 +00:00
Craig Topper 6af0363857 [X86] Make _bswap intrinsic a function instead of a macro to hopefully fix the chromium build.
This intrinsic was added in r356848 but was implemented as a macro to match gcc.

llvm-svn: 356862
2019-03-24 18:00:20 +00:00
Craig Topper 88f4054f48 [X86] Add BSR/BSF/BSWAP intrinsics to ia32intrin.h to match gcc.
Summary:
These are all implemented by icc as well.

I made bit_scan_forward/reverse forward to the __bsfd/__bsrq since we also have
__bsfq/__bsrq.

Note, when lzcnt is enabled the bsr intrinsics generates lzcnt+xor instead of bsr.

Reviewers: RKSimon, spatel

Subscribers: cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D59682

llvm-svn: 356848
2019-03-24 00:56:52 +00:00
Craig Topper 1383340422 [X86] Add __popcntd and __popcntq to ia32intrin.h to match gcc and icc. Remove popcnt feature flag from _popcnt32/_popcnt64 and move to ia32intrin.h to match gcc
gcc and icc both implement popcntd and popcntq which we did not. gcc doesn't seem to require a feature flag for the _popcnt32/_popcnt64 spelling and will use a libcall if its not supported.

Differential Revision: https://reviews.llvm.org/D59567

llvm-svn: 356689
2019-03-21 17:43:53 +00:00
Craig Topper e0941cb326 [X86] Add __crc32b/__crc32w/__crc32d/__crc32q intrinsics to match gcc and icc.
gcc has these intrinsics in ia32intrin.h as well. And icc implements them
though they aren't documented in the Intel Intrinsics Guide.

Differential Revision: https://reviews.llvm.org/D59533

llvm-svn: 356609
2019-03-20 20:25:28 +00:00
Craig Topper 8b653d0308 [X86] Add gcc rotate intrinsics to ia32intrin.h
This is another attempt at what Erich Keane tried to do in r355322.

This adds rolb, rolw, rold, rolq and their ror equivalent as always_inline wrappers around __builtin_rotate* which will lower to funnel shift intrinsics in IR.

Additionally, when _MSC_VER is not defined we will define _rotl, _lrotl, _rotr, _lrotr as macros to one of the always_inline intrinsics mentioned above. Making sure that _lrotl/_lrotr use either 32 or 64 bit based on the size of long. These need to be macros because we have builtins with the same name for MS compatibility, but _MSC_VER isn't always defined when those builtins are enabled.

We also define _rotwl and _rotwr as macros aliasing to rolw/rorw just like gcc to complete the set. These don't need to be gated with _MSC_VER because these aren't MS builtins.

I've added tests both for non-MS and -ms-extensions with and without _MSC_VER being defined.

Differential Revision: https://reviews.llvm.org/D59346

llvm-svn: 356423
2019-03-18 22:25:57 +00:00
Evgeny Mankov 177301f048 [CUDA][Windows] Partial fix for bug 38811 (Step 2 of 3)
Partial fix for the clang Bug 38811 "Clang fails to compile with CUDA-9.x on Windows".

[Synopsis]
__sptr is a new Microsoft specific modifier (https://docs.microsoft.com/en-us/cpp/cpp/sptr-uptr?view=vs-2017).

[Solution]
Replace all `__sptr` occurrences with `__s` (and all `__cptr` with `__c` as well) to eliminate the below clang compilation error on Windows.

In file included from C:\GIT\LLVM\trunk\llvm-64-release-vs2017-15.9.5\dist\lib\clang\9.0.0\include\__clang_cuda_runtime_wrapper.h:162:
C:\GIT\LLVM\trunk\llvm-64-release-vs2017-15.9.5\dist\lib\clang\9.0.0\include\__clang_cuda_device_functions.h:524:33: error: expected expression
  return __nv_fast_sincosf(__a, __sptr, __cptr);
                                ^
Reviewed by: Artem Belevich

Differential Revision: http://reviews.llvm.org/D59423

llvm-svn: 356291
2019-03-15 19:04:46 +00:00
Evgeny Mankov 04188fc0c6 [CUDA][Windows] Partial fix for bug #38811 (Step 1 of 3)
Partial fix for the clang Bug https://bugs.llvm.org/show_bug.cgi?id=38811 "Clang fails to compile with CUDA-9.x on Windows".

Adding defined(_WIN64) check along with existing #if defined(__LP64__) eliminates the below clang (64-bit) compilation error on Windows.

C:/GIT/LLVM/trunk/llvm-64-release-vs2017/dist/lib/clang/9.0.0\include\__clang_cuda_device_functions.h(1609,45): error GEF7559A7: no matching function for call to 'roundf'
 __DEVICE__ long lroundf(float __a) { return roundf(__a); }

Reviewed by: Artem Belevich

Differential Revision: http://reviews.llvm.org/D59361

llvm-svn: 356255
2019-03-15 12:05:36 +00:00
Shoaib Meenai 5be71faf4b [build] Rename clang-headers to clang-resource-headers
Summary:
The current install-clang-headers target installs clang's resource
directory headers. This is different from the install-llvm-headers
target, which installs LLVM's API headers. We want to introduce the
corresponding target to clang, and the natural name for that new target
would be install-clang-headers. Rename the existing target to
install-clang-resource-headers to free up the install-clang-headers name
for the new target, following the discussion on cfe-dev [1].

I didn't find any bots on zorg referencing install-clang-headers. I'll
send out another PSA to cfe-dev to accompany this rename.

[1] http://lists.llvm.org/pipermail/cfe-dev/2019-February/061365.html

Reviewers: beanz, phosek, tstellar, rnk, dim, serge-sans-paille

Subscribers: mgorny, javed.absar, jdoerfert, #sanitizers, openmp-commits, lldb-commits, cfe-commits, llvm-commits

Tags: #clang, #sanitizers, #lldb, #openmp, #llvm

Differential Revision: https://reviews.llvm.org/D58791

llvm-svn: 355340
2019-03-04 21:19:53 +00:00
Tom Stellard 4f076000c6 lib/Header: Simplify CMakeLists.txt
Summary:
Replace cut and pasted code with cmake macros and reduce the number of
install commands.  This fixes an issue where the headers were being
installed twice.

This clean up should also make future modifications easier, like
adding a cmake option to install header files into a custom resource
directory.

Reviewers: chandlerc, smeenai, mgorny, beanz, phosek

Reviewed By: smeenai

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58537

llvm-svn: 355253
2019-03-02 00:50:13 +00:00
Louis Dionne c2d95792d6 [clang] Only provide C11 features in <float.h> starting with C++17
Summary:
In r353970, I enabled those features in C++11 and above. To be strictly
conforming, those features should only be enabled in C++17 and above.

Reviewers: jfb, eli.friedman

Subscribers: jkorous, dexonsmith, libcxx-commits

Differential Revision: https://reviews.llvm.org/D58289

llvm-svn: 354691
2019-02-22 20:48:54 +00:00
Shoaib Meenai defb5a383b [clang] Switch to LLVM_ENABLE_IDE
r344555 switched LLVM to guarding install targets with LLVM_ENABLE_IDE
instead of CMAKE_CONFIGURATION_TYPES, which expresses the intent more
directly and can be overridden by a user. Make the corresponding change
in clang. LLVM_ENABLE_IDE is computed by HandleLLVMOptions, so it should
be available for both standalone and integrated builds.

Differential Revision: https://reviews.llvm.org/D58284

llvm-svn: 354525
2019-02-20 23:08:43 +00:00
Louis Dionne defa9f8f85 [clang] Make sure C99/C11 features in <float.h> are provided in C++11
Summary:
Previously, those #defines were only provided in C or when GNU extensions were
enabled. We need those #defines in C++11 and above, too.

Reviewers: jfb, eli.friedman

Subscribers: jkorous, dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58149

llvm-svn: 353970
2019-02-13 19:08:01 +00:00
Simon Atanasyan 4c22a57414 [Headers][mips] Add `__attribute__((__mode__(__unwind_word__)))` to the _Unwind_Word / _Unwind_SWord definitions
The rationale of this change is to fix _Unwind_Word / _Unwind_SWord
definitions for MIPS N32 ABI. This ABI uses 32-bit pointers,
but _Unwind_Word and _Unwind_SWord types are eight bytes long.

 # The __attribute__((__mode__(__unwind_word__))) is added to the type
   definitions. It makes them equal to the corresponding definitions used
   by GCC and allows to override types using `getUnwindWordWidth` function.
 # The `getUnwindWordWidth` virtual function override in the `MipsTargetInfo`
   class and provides correct type size values.

Differential revision: https://reviews.llvm.org/D58165

llvm-svn: 353965
2019-02-13 18:27:09 +00:00
Reid Kleckner 79d7f4114d [X86] Use __m128_u for _mm_loadu_ps after r353555
Add secondary triple to existing SSE test for it.  I audited other uses
of __attribute__((__packed__)) in the intrinsic headers, and this seemed
to be the only missing one.

llvm-svn: 353878
2019-02-12 21:04:21 +00:00
Craig Topper 4390c721cb [X86] Use the new unaligned vector typedefs for the loadu/storeu intrinsics pointer arguments.
This matches what gcc does and what was suggested by rnk in PR20670.

llvm-svn: 353802
2019-02-12 07:44:40 +00:00
Tom Tan 42b2424e4f [COFF, ARM64] Remove definitions for _byteswap library functions
_byteswap_* functions are are implemented in below file as normal function
from libucrt.lib and declared in stdlib.h. Define them in intrin.h triggers
lld error "conflicting comdat type" and "duplicate symbols" which was just
added to LLD (https://reviews.llvm.org/D57324).

C:\Program Files (x86)\Windows Kits\10\Source\10.0.17763.0\ucrt\stdlib\byteswap.cpp

Differential Revision: https://reviews.llvm.org/D57915

llvm-svn: 353740
2019-02-11 20:04:02 +00:00
Craig Topper be4cbe8726 [X86] Add explicit alignment to __m128/__m128i/__m128d/etc. to allow matching of MSVC behavior with #pragma pack.
Summary:
With MSVC, #pragma pack is ignored when there is explicit alignment. This differs from gcc. Clang emulates this difference when compiling for Windows.

It appears that MSVC and its headers consider the __m128/__m128i/__m128d/etc. types to be explicitly aligned and ignores #pragma pack for them. Since we don't have explicit alignment on them in our headers, we don't match the MSVC behavior here.

This patch adds explicit alignment to match this behavior. I'm hoping this won't cause any problems when we're not emulating MSVC. But if someone knows of something that would be different we can swith to conditionally adding the alignment based on _MSC_VER.

I had to add explicitly unaligned types as well so we could use them in the loadu/storeu intrinsics which use __attribute__(__packed__). Using the now explicitly aligned types wouldn't produce align 1 accesses when targeting Windows.

Reviewers: rnk, erichkeane, spatel, RKSimon

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57961

llvm-svn: 353555
2019-02-08 19:45:08 +00:00
Eli Friedman 3189d5f48c [COFF, ARM64] Fix types for _ReadStatusReg, _WriteStatusReg
r344765 added those intrinsics, but used the wrong types.

Patch by Mike Hommey

Differential Revision: https://reviews.llvm.org/D57636

llvm-svn: 353493
2019-02-08 01:17:49 +00:00
Artem Belevich 4071763bb8 Basic CUDA-10 support.
Differential Revision: https://reviews.llvm.org/D57771

llvm-svn: 353232
2019-02-05 22:38:58 +00:00
Artem Belevich c62214da3d [CUDA] add support for the new kernel launch API in CUDA-9.2+.
Instead of calling CUDA runtime to arrange function arguments,
the new API constructs arguments in a local array and the kernels
are launched with __cudaLaunchKernel().

The old API has been deprecated and is expected to go away
in the next CUDA release.

Differential Revision: https://reviews.llvm.org/D57488

llvm-svn: 352799
2019-01-31 21:34:03 +00:00
Matt Arsenault 58fc8082a8 OpenCL: Use length modifier for warning on vector printf arguments
Re-enable format string warnings on printf.

The warnings are still incomplete. Apparently it is undefined to use a
vector specifier without a length modifier, which is not currently
warned on. Additionally, type warnings appear to not be working with
the hh modifier, and aren't warning on all of the special restrictions
from c99 printf.

llvm-svn: 352540
2019-01-29 20:49:54 +00:00
Matt Arsenault 297afb14ec Revert "OpenCL: Extend argument promotion rules to vector types"
This reverts r348083. This was based on a misreading of the spec
for printf specifiers.

Also revert r343653, as without a subsequent patch, a correctly
specified format for a vector will incorrectly warn.

Fixes bug 40491.

llvm-svn: 352539
2019-01-29 20:49:47 +00:00
Craig Topper 8de5abc4c8 [X86] Remove mask and passthru arguments from vpconflict builtins. Use select in IR instead.
llvm-svn: 352173
2019-01-25 07:08:22 +00:00
Craig Topper 9fddc3fd00 [X86] Remove the cvtuqq2ps256/cvtqq2ps256 mask builtins. Replace with uitofp/sitofp and select.
Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D56965

llvm-svn: 351694
2019-01-20 19:04:56 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Craig Topper d08d90ce51 [X86] Only define _XCR_XFEATURE_ENABLED_MASK in xsaveintrin.h when _MSC_VER is defined. Remove from intrin.h.
I think this was my intention when I added it xsaveintrin.h

llvm-svn: 351568
2019-01-18 17:51:51 +00:00
Craig Topper 931779761e Recommit r351160 "[X86] Make _xgetbv/_xsetbv on non-windows platforms"
V8 has been fixed now.

llvm-svn: 351391
2019-01-16 22:56:25 +00:00
Benjamin Kramer 9c53890833 Revert "[X86] Make _xgetbv/_xsetbv on non-windows platforms"
This reverts commit r351160. Breaks building v8.

llvm-svn: 351210
2019-01-15 17:23:36 +00:00
Roman Lebedev cce1c2eb0e [OpenCL] opencl-c.h: read_image*(): sampler-less, and image{1,2}d_array_t variants are OpenCL-1.2+, mark them as such
Summary:
Refer to [[ https://www.khronos.org/registry/OpenCL/specs/opencl-1.1.pdf#page=242 | `6.11.13.2 Built-in Image Functions` ]],
and [[ https://www.khronos.org/registry/OpenCL/specs/opencl-1.1.pdf#page=306 | `9.6.8 Image Read and Write Functions` ]] of the OpenCL 1.1 spec.

* There is no mention of `image1d_array_t` and `image2d_array_t` anywhere in the OpenCL 1.1 spec.
* All the `read_image{f,i,ui,h}()` functions, as of OpenCL 1.1 spec, have a second required parameter `sampler_t sampler`

Should have prevented the following regression:
https://redmine.darktable.org/issues/12493

Reviewers: yaxunl, Anastasia, echuraev, asavonic

Reviewed By: Anastasia

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D56646

llvm-svn: 351188
2019-01-15 11:20:02 +00:00
Craig Topper 69aed7c364 [X86] Make _xgetbv/_xsetbv on non-windows platforms
Summary:
This patch attempts to redo what was tried in r278783, but was reverted.

These intrinsics should be available on non-windows platforms with "xsave" feature check. But on Windows platforms they shouldn't have feature check since that's how MSVC behaves.

To accomplish this I've added a MS builtin with no feature check. And a normal gcc builtin with a feature check. When _MSC_VER is not defined _xgetbv/_xsetbv will be macros pointing to the gcc builtin name.

I've moved the forward declarations from intrin.h to immintrin.h to match the MSDN documentation and used that as the header file for the MS builtin.

I'm not super happy with this implementation, and I'm open to suggestions for better ways to do it.

Reviewers: rnk, RKSimon, spatel

Reviewed By: rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D56686

llvm-svn: 351160
2019-01-15 05:03:18 +00:00
Mandeep Singh Grang 1b9337f16b [COFF, ARM64] Add __byteswap intrinsics
Reviewers: rnk, efriedma, ssijaric, TomTan, haripul

Reviewed By: efriedma

Subscribers: javed.absar, cfe-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D56685

llvm-svn: 351147
2019-01-15 01:26:26 +00:00
Mandeep Singh Grang 0055f80b3f [COFF, ARM64] Add __nop intrinsic
Reviewers: rnk, efriedma, TomTan, haripul, ssijaric

Reviewed By: rnk, efriedma

Subscribers: javed.absar, kristof.beyls, cfe-commits

Differential Revision: https://reviews.llvm.org/D56671

llvm-svn: 351135
2019-01-14 23:26:01 +00:00
Craig Topper 49488407aa [X86] Remove mask parameter from avx512 pmultishiftqb intrinsics. Use select in IR instead.
Fixes PR40259

llvm-svn: 351036
2019-01-14 08:46:51 +00:00
Craig Topper bdbe5c7dc7 [X86] Make the pointer arguments to avx512 gather/scatter intrinsics 'void*' to match gcc and Intel's documentation.
The avx2 gather intrinsics are documented to use 'int', 'long long', 'float', or 'double' *. So I'm leaving those. This matches gcc.

llvm-svn: 350696
2019-01-09 07:36:01 +00:00
Craig Topper cd9e232a4d Recommit r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins."
The MSVC limit hit in AutoUpgrade.cpp has been worked around for now.

llvm-svn: 350568
2019-01-07 21:00:41 +00:00
Craig Topper 33c9088783 Revert r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins."
Had to revert the LLVM patch this depends on to fix a MSVC compiler limit in AutoUpgrade.cpp

llvm-svn: 350563
2019-01-07 19:39:25 +00:00
Craig Topper e34f2bb807 [X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins.
Differential Revision: https://reviews.llvm.org/D56365

llvm-svn: 350555
2019-01-07 19:10:22 +00:00
Ulrich Weigand 22ca9c628a [SystemZ] Fix wrong codegen caused by typos in vecintrin.h
The following two bugs in SystemZ high-level vector intrinsics are
fixes by this patch:

- The float case of vec_insert_and_zero should generate a VLLEZF
  pattern, but currently erroneously generates VLLEZLF.

- The float and double versions of vec_orc erroneously generate
  and-with-complement instead of or-with-complement.

The patch also fixes a couple of typos in the associated test.

llvm-svn: 349751
2018-12-20 13:09:09 +00:00
Craig Topper 1f2b181689 [Builltins][X86] Provide implementations of __lzcnt16, __lzcnt, __lzcnt64 for MS compatibility. Remove declarations from intrin.h and implementations from lzcntintrin.h
intrin.h had forward declarations for these and lzcntintrin.h had implementations that were only available with -mlzcnt or a -march that supported the lzcnt feature.

For MS compatibility we should always have these builtins available regardless of X86 being the target or the CPU support the lzcnt instruction. The backends should be able to gracefully fallback to something support even if its just shifts and bit ops.

Unfortunately, gcc also implements 2 of the 3 function names here on X86 when lzcnt feature is enabled.

This patch adds builtins for these for MSVC compatibility and drops the forward declarations from intrin.h. To keep the gcc compatibility the two intrinsics that collided have been turned into macros that use the X86 specific builtins with the lzcnt feature check. These macros are only defined when _MSC_VER is not defined. Without them being macros we can get a redefinition error because -ms-extensions doesn't seem to set _MSC_VER but does make the MS builtins available.

Should fix PR40014

Differential Revision: https://reviews.llvm.org/D55677

llvm-svn: 349098
2018-12-14 00:21:02 +00:00
Craig Topper 6d7a7ef9eb [X86] Remove the addcarry builtins. Leaving only the addcarryx builtins since that matches gcc.
The addcarry and addcarryx builtins do the same thing. The only difference is that addcarryx previously required adx feature.

This commit removes the adx feature check from addcarryx and removes the addcarry builtin. This matches the builtins that gcc has. We don't guarantee compatibility in builtins, but we generally try to be consistent if its not a burden.

llvm-svn: 348738
2018-12-10 06:07:59 +00:00
Artem Belevich 43cfce88b4 [CUDA] Added missing 'inline' for functions defined in a header.
llvm-svn: 348662
2018-12-07 22:20:53 +00:00
Stefan Granitz 5c1ec2e9cb [CMake] Store path to vendor-specific headers in clang-headers target property
Summary:
LLDB.framework wants a copy these headers. With this change LLDB can easily glob for the list of files:
```
get_target_property(clang_include_dir clang-headers RUNTIME_OUTPUT_DIRECTORY)
file(GLOB_RECURSE clang_vendor_headers RELATIVE ${clang_include_dir} "${clang_include_dir}/*")
```

By default `RUNTIME_OUTPUT_DIRECTORY` is unset for custom targets like `clang-headers`.

Reviewers: aprantl, JDevlieghere, davide, friss, dexonsmith

Reviewed By: JDevlieghere

Subscribers: mgorny, #lldb, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D55128

llvm-svn: 348116
2018-12-03 10:34:25 +00:00
Nemanja Ivanovic 2447baff84 [PowerPC] Vector load/store builtins overstate alignment of pointers
A number of builtins in altivec.h load/store vectors from pointers to scalar
types. Currently they just cast the pointer to a vector pointer, but expressions
like that have the alignment of the target type. Of course, the input pointer
did not have that alignment so this triggers UBSan (and rightly so).

This resolves https://bugs.llvm.org/show_bug.cgi?id=39704

Differential revision: https://reviews.llvm.org/D54787

llvm-svn: 347556
2018-11-26 14:35:38 +00:00
Zi Xuan Wu 71c35e13c3 [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element
The second parameter of vec_sr function is representing shift bits and it should be modulo the number of bits in the element like what vec_sl does now. 
This is actually required by the ABI:

Each element of the result vector is the result of logically right shifting the corresponding
element of ARG1 by the number of bits specified by the value of the corresponding
element of ARG2, modulo the number of bits in the element. The bits that are shifted out
are replaced by zeros.

Differential Revision: https://reviews.llvm.org/D54087

llvm-svn: 346471
2018-11-09 03:35:32 +00:00
Andrew Savonichev 3fee351867 [OpenCL] Add support of cl_intel_device_side_avc_motion_estimation extension
Summary:
Documentation can be found at https://www.khronos.org/registry/OpenCL/extensions/intel/cl_intel_device_side_avc_motion_estimation.txt

Patch by Kristina Bessonova


Reviewers: Anastasia, yaxunl, shafik

Reviewed By: Anastasia

Subscribers: arphaman, sidorovd, AlexeySotkin, krisb, bader, asavonic, cfe-commits

Differential Revision: https://reviews.llvm.org/D51484

llvm-svn: 346392
2018-11-08 11:25:41 +00:00
Andrew Savonichev 3b12b7e702 Revert r346326 [OpenCL] Add support of cl_intel_device_side_avc_motion_estimation
This patch breaks Index/opencl-types.cl LIT test:

Script:
--
: 'RUN: at line 1';   stage1/bin/c-index-test -test-print-type llvm/tools/clang/test/Index/opencl-types.cl -cl-std=CL2.0 | stage1/bin/FileCheck llvm/tools/clang/test/Index/opencl-types.cl
--
Command Output (stderr):
--
llvm/tools/clang/test/Index/opencl-types.cl:3:26: warning: unsupported OpenCL extension 'cl_khr_fp16' - ignoring [-Wignored-pragmas]
llvm/tools/clang/test/Index/opencl-types.cl:4:26: warning: unsupported OpenCL extension 'cl_khr_fp64' - ignoring [-Wignored-pragmas]
llvm/tools/clang/test/Index/opencl-types.cl:8:9: error: use of type 'double' requires cl_khr_fp64 extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:11:8: error: declaring variable of type 'half' is not allowed
llvm/tools/clang/test/Index/opencl-types.cl:15:3: error: use of type 'double' requires cl_khr_fp64 extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:16:3: error: use of type 'double4' (vector of 4 'double' values) requires cl_khr_fp64 extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:26:26: warning: unsupported OpenCL extension 'cl_khr_gl_msaa_sharing' - ignoring [-Wignored-pragmas]
llvm/tools/clang/test/Index/opencl-types.cl:35:44: error: use of type '__read_only image2d_msaa_t' requires cl_khr_gl_msaa_sharing extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:36:49: error: use of type '__read_only image2d_array_msaa_t' requires cl_khr_gl_msaa_sharing extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:37:49: error: use of type '__read_only image2d_msaa_depth_t' requires cl_khr_gl_msaa_sharing extension to be enabled
llvm/tools/clang/test/Index/opencl-types.cl:38:54: error: use of type '__read_only image2d_array_msaa_depth_t' requires cl_khr_gl_msaa_sharing extension to be enabled

llvm-svn: 346338
2018-11-07 18:34:19 +00:00
Andrew Savonichev 35dfce723c [OpenCL] Add support of cl_intel_device_side_avc_motion_estimation extension
Summary:
Documentation can be found at https://www.khronos.org/registry/OpenCL/extensions/intel/cl_intel_device_side_avc_motion_estimation.txt

Patch by Kristina Bessonova


Reviewers: Anastasia, yaxunl, shafik

Reviewed By: Anastasia

Subscribers: arphaman, sidorovd, AlexeySotkin, krisb, bader, asavonic, cfe-commits

Differential Revision: https://reviews.llvm.org/D51484

llvm-svn: 346326
2018-11-07 15:44:01 +00:00
Reid Kleckner 902fa41188 [MS] Zero out ECX in __cpuid in intrin.h
Summary:
Some CPUID leafs depend on the value of ECX as well as EAX, but we left
it uninitialized.

Originally reported as https://crbug.com/901547

Reviewers: craig.topper, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D54171

llvm-svn: 346265
2018-11-06 20:45:26 +00:00
Mandeep Singh Grang 574caddc0d [COFF, ARM64] Implement InterlockedDecrement*_* builtins
This is eight in a series of patches to move intrinsic definitions out of intrin.h.

Differential: https://reviews.llvm.org/D54068
llvm-svn: 346208
2018-11-06 05:07:43 +00:00
Mandeep Singh Grang fdf74d9751 [COFF, ARM64] Implement InterlockedIncrement*_* builtins
This is seventh in a series of patches to move intrinsic definitions out of intrin.h.

Differential: https://reviews.llvm.org/D54067
llvm-svn: 346207
2018-11-06 05:05:32 +00:00
Mandeep Singh Grang c89157b5c1 [COFF, ARM64] Implement InterlockedAnd*_* builtins
This is sixth in a series of patches to move intrinsic definitions out of intrin.h.

Differential: https://reviews.llvm.org/D54066
llvm-svn: 346206
2018-11-06 05:03:13 +00:00
Mandeep Singh Grang 806f10701b [COFF, ARM64] Implement InterlockedXor*_* builtins
This is fifth in a series of patches to move intrinsic definitions out of intrin.h.

Note: This was reviewed and approved in D54065 but somehow that diff was messed
up. Committing this again with the proper diff.

llvm-svn: 346205
2018-11-06 04:55:20 +00:00
Mandeep Singh Grang d9f70b1495 Revert "[COFF, ARM64] Implement InterlockedXor*_* builtins"
This reverts commit cc3d3cd0fbeb88412d332354c261ff139c4ede6b.

llvm-svn: 346192
2018-11-06 01:14:24 +00:00
Mandeep Singh Grang d8a4455d97 [COFF, ARM64] Implement InterlockedXor*_* builtins
Summary: This is fifth in a series of patches to move intrinsic definitions out of intrin.h.

Reviewers: rnk, efriedma, mstorsjo, TomTan

Reviewed By: efriedma

Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D54065

llvm-svn: 346191
2018-11-06 01:12:29 +00:00
Mandeep Singh Grang ec62b31e2c [COFF, ARM64] Implement InterlockedOr*_* builtins
This is fourth in a series of patches to move intrinsic definitions out of intrin.h.

llvm-svn: 346190
2018-11-06 01:11:25 +00:00
Mandeep Singh Grang 6b880689f0 [COFF, ARM64] Implement InterlockedCompareExchange*_* builtins
Summary: This is third in a series of patches to move intrinsic definitions out of intrin.h.

Reviewers: rnk, efriedma, mstorsjo, TomTan

Reviewed By: efriedma

Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D54062

llvm-svn: 346189
2018-11-06 00:36:48 +00:00
Mandeep Singh Grang 7fa07e554d [COFF, ARM64] Implement InterlockedExchange*_* builtins
Summary: Windows SDK needs these intrinsics to be proper builtins.  This is second in a series of patches to move intrinsic defintions out of intrin.h.

Reviewers: rnk, mstorsjo, efriedma, TomTan

Reviewed By: rnk, efriedma

Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D54046

llvm-svn: 346044
2018-11-02 21:18:23 +00:00
Eli Friedman b262d1631e [ARM64] [Windows] Implement _InterlockedExchangeAdd*_* builtins.
These apparently need to be proper builtins to handle the Windows
SDK.

Differential Revision: https://reviews.llvm.org/D53916

llvm-svn: 345779
2018-10-31 21:31:09 +00:00
Andrew Savonichev 70b6bbe2bb [OpenCL] Remove PIPE_RESERVE_ID_VALID_BIT from opencl-c.h
Summary:
PIPE_RESERVE_ID_VALID_BIT is implementation defined, so lets not keep it in the header. 

Previously the topic was discussed here: https://reviews.llvm.org/D32896 

Reviewers: Anastasia, yaxunl

Reviewed By: Anastasia

Subscribers: cfe-commits, asavonic, bader

Differential Revision: https://reviews.llvm.org/D52658

llvm-svn: 345051
2018-10-23 17:05:29 +00:00
Andrew Savonichev 700c3bea9e [OpenCL] Add cl_intel_planar_yuv extension
Just adding a preprocessor #define for the extension.

Patch by Alexey Sotkin and Dmitry Sidorov

Phabricator review: https://reviews.llvm.org/D51402

llvm-svn: 345044
2018-10-23 16:13:16 +00:00
Craig Topper eae26bf737 [X86] Add more intrinsics to match icc.
This adds
_mm_loadu_epi8, _mm256_loadu_epi8, _mm512_loadu_epi8
_mm_loadu_epi16, _mm256_loadu_epi16, _mm512_loadu_epi16
_mm_storeu_epi8, _mm256_storeu_epi8, _mm512_storeu_epi8
_mm_storeu_epi16, _mm256_storeu_epi16, _mm512_storeu_epi16

llvm-svn: 344862
2018-10-20 19:28:52 +00:00
Craig Topper 58508be3c0 [X86] Add missing intrinsics to match icc.
This adds
_mm_and_epi32, _mm_and_epi64
_mm_andnot_epi32, _mm_andnot_epi64
_mm_or_epi32, _mm_or_epi64
_mm_xor_epi32, _mm_xor_epi64
_mm256_and_epi32, _mm256_and_epi64
_mm256_andnot_epi32, _mm256_andnot_epi64
_mm256_or_epi32, _mm256_or_epi64
_mm256_xor_epi32, _mm256_xor_epi64
_mm_loadu_epi32, _mm_loadu_epi64
_mm_load_epi32, _mm_load_epi64
_mm256_loadu_epi32, _mm256_loadu_epi64
_mm256_load_epi32, _mm256_load_epi64
_mm512_loadu_epi32, _mm512_loadu_epi64
_mm512_load_epi32, _mm512_load_epi64
_mm_storeu_epi32, _mm_storeu_epi64
_mm_store_epi32, _mm_load_epi64
_mm256_storeu_epi32, _mm256_storeu_epi64
_mm256_store_epi32, _mm256_load_epi64
_mm512_storeu_epi32, _mm512_storeu_epi64
_mm512_store_epi32,V _mm512_load_epi64

llvm-svn: 344861
2018-10-20 19:28:50 +00:00
Mandeep Singh Grang 2147b1af95 [COFF, ARM64] Add _ReadStatusReg and_WriteStatusReg intrinsics
Reviewers: rnk, compnerd, mstorsjo, efriedma, TomTan, haripul, javed.absar

Reviewed By: efriedma

Subscribers: dmajor, kristof.beyls, chrib, cfe-commits

Differential Revision: https://reviews.llvm.org/D53115

llvm-svn: 344765
2018-10-18 23:35:35 +00:00
Mandeep Singh Grang df7929676d [COFF, ARM64] Add _InterlockedAdd intrinsic
Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar, efriedma

Reviewed By: efriedma

Subscribers: efriedma, kristof.beyls, chrib, jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D52811

llvm-svn: 343894
2018-10-05 21:57:41 +00:00
Mandeep Singh Grang ecc82ef0c2 [COFF, ARM64] Add __getReg intrinsic
Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar, efriedma

Reviewed By: efriedma

Subscribers: peter.smith, efriedma, kristof.beyls, chrib, cfe-commits

Differential Revision: https://reviews.llvm.org/D52838

llvm-svn: 343824
2018-10-04 22:32:42 +00:00
Matt Arsenault a01151294a OpenCL: Mark printf format string argument
Fixes not warning on format string errors.

llvm-svn: 343653
2018-10-03 02:01:19 +00:00
Craig Topper 716e8e6858 [X86] Add more of the icc unaligned load/store to/from 128 bit vector intrinsics
Summary:
This patch adds
_mm_loadu_si32
_mm_loadu_si16
_mm_storeu_si64
_mm_storeu_si32
_mm_storeu_si16

We already had _mm_load_si64.

Reviewers: spatel, RKSimon

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D52665

llvm-svn: 343388
2018-09-29 17:49:42 +00:00
Craig Topper 6ad9220067 [X86] Add the movbe instruction intrinsics from icc.
These intrinsics exist in icc. They can be found on the Intel Intrinsics Guide website.

All the backend support is in place to pattern match a load+bswap or a bswap+store pattern to the MOVBE instructions. So we just need to get the frontend to emit the correct IR. The pointer arguments in icc are declared as void so I had to jump through a packed struct to forcing a specific alignment on the load/store. Same trick we use in the unaligned vector load/store intrinsics

Differential Revision: https://reviews.llvm.org/D52586

llvm-svn: 343343
2018-09-28 17:09:51 +00:00
Craig Topper fb5d9f2849 [X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false.
Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction.

By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction.

Differential Revision: https://reviews.llvm.org/D52392

llvm-svn: 343126
2018-09-26 17:01:44 +00:00
Artem Belevich 44ecb0e3c2 [CUDA] Added basic support for compiling with CUDA-10.0
llvm-svn: 342924
2018-09-24 23:10:44 +00:00
Craig Topper d88f76a891 [X86] Add ktest intrinsics to match gcc and icc.
These aren't documented in the Intel Intrinsics Guide, but are supported by gcc and icc.

Includes these intrinsics:
_ktestc_mask8_u8, _ktestz_mask8_u8, _ktest_mask8_u8
_ktestc_mask16_u8, _ktestz_mask16_u8, _ktest_mask16_u8
_ktestc_mask32_u8, _ktestz_mask32_u8, _ktest_mask32_u8
_ktestc_mask64_u8, _ktestz_mask64_u8, _ktest_mask64_u8

llvm-svn: 341265
2018-08-31 22:29:56 +00:00
Craig Topper 42a4d0822e [X86] Add k-mask conversion and load/store instrinsics to match gcc and icc.
This adds:
_cvtmask8_u32, _cvtmask16_u32, _cvtmask32_u32, _cvtmask64_u64
_cvtu32_mask8, _cvtu32_mask16, _cvtu32_mask32, _cvtu64_mask64
_load_mask8, _load_mask16, _load_mask32, _load_mask64
_store_mask8, _store_mask16, _store_mask32, _store_mask64

These are currently missing from the Intel Intrinsics Guide webpage.

llvm-svn: 341251
2018-08-31 20:41:06 +00:00
Craig Topper 2aa8efc820 [X86] Add kshift intrinsics to match gcc and icc.
This adds the following intrinsics:
_kshiftli_mask8
_kshiftli_mask16
_kshiftli_mask32
_kshiftli_mask64
_kshiftri_mask8
_kshiftri_mask16
_kshiftri_mask32
_kshiftri_mask64

llvm-svn: 341234
2018-08-31 18:22:52 +00:00
Craig Topper a65bf65e0b [X86] Add kadd intrinsics to match gcc and icc.
This adds the following intrinsics:
_kadd_mask64
_kadd_mask32
_kadd_mask16
_kadd_mask8

These are missing from the Intel Intrinsics Guide, but are implemented by both gcc and icc.

llvm-svn: 340879
2018-08-28 22:32:14 +00:00
Craig Topper cb5fd56c7f [X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic names for 16 bit masks.
This matches gcc and icc despite not being documented in the Intel Intrinsics Guide.

llvm-svn: 340798
2018-08-28 06:28:25 +00:00
Craig Topper c330ca8611 [X86] Add intrinsics for kand/kandn/knot/kor/kxnor/kxor with 8, 32, and 64-bit mask registers.
This also adds a second intrinsic name for the 16-bit mask versions.

These intrinsics match gcc and icc. They just aren't published in the Intel Intrinsics Guide so I only recently found they existed.

llvm-svn: 340719
2018-08-27 06:20:22 +00:00
Craig Topper 9a022280b5 [X86] Remove min_vector_width 512 from some intrinsics that operate only on k-registers.
llvm-svn: 340718
2018-08-27 06:20:20 +00:00
Craig Topper e0b5d4cd9d [X86] Rename __DEFAULT_FN_ATTRS to a__DEFAULT_FN_ATTRS512 in avx512dqintrin.h and avx512bwintrin.h.
This is preparation for adding removing min_vector_width 512 from some intrinsics.

llvm-svn: 340717
2018-08-27 06:20:19 +00:00
Craig Topper 266b858705 [X86] Undef __DEFAULT_FN_ATTRS in avx512fintrin.h.
Fixes test failure after r340713

llvm-svn: 340714
2018-08-27 05:44:45 +00:00
Craig Topper f821f5314e [X86] Don't set min_vector_width to 512 on intrinsics that only operate on k registers.
llvm-svn: 340713
2018-08-27 05:27:15 +00:00
Nico Weber b2c53d3393 Make __shiftleft128 / __shiftright128 real compiler built-ins.
r337619 added __shiftleft128 / __shiftright128 as functions in intrin.h.
Microsoft's STL plans on using these functions, and they're using intrin0.h
which just has declarations of built-ins to not pull in the huge intrin.h
header in the standard library headers. That requires that these functions are
real built-ins.

https://reviews.llvm.org/D50907

llvm-svn: 340048
2018-08-17 17:19:06 +00:00
Craig Topper 72a7606433 [X86] Remove masking from the 512-bit paddus/psubus builtins. Use a select builtin instead.
llvm-svn: 339845
2018-08-16 07:28:06 +00:00
Craig Topper 0609d1e211 [X86] Remove masking from the 512-bit padds and psubs builtins. Use select builtin instead.
llvm-svn: 339843
2018-08-16 06:20:29 +00:00
Pirama Arumuga Nainar 3c1a7bc290 [Headers] Define *_HAS_SUBNORM for FLT, DBL, LDBL
Summary:
These macros are defined in the C11 standard and can be defined based on
the __*_HAS_DENORM__ default macros.

Reviewers: bruno, rsmith, doug.gregor

Subscribers: llvm-commits, enh, srhines

Differential Revision: https://reviews.llvm.org/D37302

llvm-svn: 339284
2018-08-08 20:38:38 +00:00
Martin Storsjo 1662647995 [Headers] Expand _Unwind_Exception for SEH on MinGW/x86_64
This matches how GCC defines this struct.

Differential Revision: https://reviews.llvm.org/D50380

llvm-svn: 339170
2018-08-07 20:02:40 +00:00
Louis Dionne 58529c3f57 [clang] Fix broken include_next in float.h
Summary:
The code defines __FLOAT_H and then includes the next <float.h>, which is
guarded on __FLOAT_H so it gets skipped entirely. This commit uses the header
guard __CLANG_FLOAT_H, like other headers (such as limits.h) do.

Reviewers: jfb

Subscribers: dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D50276

llvm-svn: 339016
2018-08-06 14:29:47 +00:00
Fangrui Song 6907ce2f8f Remove trailing space
sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h}

llvm-svn: 338291
2018-07-30 19:24:48 +00:00