Commit Graph

580 Commits

Author SHA1 Message Date
Pavel Labath d821c997aa Move RegisterValue,Scalar,State from Core to Utility
These three classes have no external dependencies, but they are used
from various low-level APIs. Moving them down to Utility improves
overall code layering (although it still does not break any particular
dependency completely).

The XCode project will need to be updated after this change.

Differential Revision: https://reviews.llvm.org/D49740

llvm-svn: 339127
2018-08-07 11:07:21 +00:00
Stella Stamenova 45d8134c3b [windows] LLDB shows the wrong values when register read is executed at a frame other than zero
Summary:
This is a clean version of the change suggested here: https://bugs.llvm.org/show_bug.cgi?id=37495

The main change is to follow the same pattern as non-windows targets and use an unwinder object to retrieve the register context. I also changed a couple of the comments to actually log, so that issues with unsupported scenarios can be tracked down more easily. Lastly, ClearStackFrames is implemented in the base class, so individual thread implementations don't have to override it.

Reviewers: asmith, zturner, aleksandr.urakov

Reviewed By: aleksandr.urakov

Subscribers: emaste, stella.stamenova, tatyana-krasnukha, llvm-commits

Differential Revision: https://reviews.llvm.org/D49111

llvm-svn: 336732
2018-07-10 22:05:33 +00:00
Tatyana Krasnukha 74fd1a6587 Fix DynamicRegisterInfo copying/moving issue.
Summary:
Default copy/move constructors and assignment operators leave wrong m_sets[i].registers pointers.

Made the class movable and non-copyable (it's difficult to imagine when it needs to be copied).

Reviewers: clayborg

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D47728

llvm-svn: 334282
2018-06-08 11:28:15 +00:00
Raphael Isemann 02d4ff4498 Add missing includes to some LLDB headers.
Summary: When compiling with modules, these missing includes cause the build to fail (as the header can't be compiled into a module).

Subscribers: ki.stfu, lldb-commits

Differential Revision: https://reviews.llvm.org/D47412

llvm-svn: 333345
2018-05-26 14:59:14 +00:00
James Y Knight 1a05affa80 Remove spurious dependency on Process/elf-core from Process/Utility.
These checks do absolutely nothing other than cause a library layering
violation in the code.

llvm-svn: 333134
2018-05-23 22:04:20 +00:00
James Y Knight 2ad4821223 Normalize some lldb #include statements.
Most non-local includes of header files living under lldb/sources/
were specified with the full path starting after sources/. However, in
a few instances, other sub-directories were added to include paths, or

Normalize those few instances to follow the style used by the rest of
the codebase, to make it easier to understand.

llvm-svn: 333035
2018-05-22 22:53:50 +00:00
Eric Liu ff9c4ff117 [lldb] Fix compile warnings in r332702
Summary:
- Fix #include path
- Fix warning:
````
error: format specifies type 'unsigned long long' but the argument has type 'uint64_t'
(aka 'unsigned long') [-Werror,-Wformat]
 ```

Reviewers: labath, javed.absar

Differential Revision: https://reviews.llvm.org/D47072

llvm-svn: 332733
2018-05-18 16:19:52 +00:00
Pavel Labath 90da3ce3a9 Add back #ifdef __APPLE__ to RegisterContextDarwin_xxx::NumSupportedHardwareWatchpoints
It turns out these class still contained some os-specific functionality,
but I did not notice that originally, as it was #ifdef arm(64). This
adds back the __APPLE__ condition to these particular functions,
unbreaking arm builds on other OSs.

llvm-svn: 332710
2018-05-18 12:54:21 +00:00
Pavel Labath 981a34c428 Make ObjectFileMachO work on non-darwin platforms
Summary:
Before this patch we were unable to write cross-platform MachO tests
because the parsing code did not compile on other platforms. The reason
for that was that ObjectFileMachO depended on
RegisterContextDarwin_arm(64)? (presumably for core file parsing) and
the two Register Context classes uses constants from the system headers
(KERN_SUCCESS, KERN_INVALID_ARGUMENT).

As far as I can tell, these two files don't actually interact with the
darwin kernel -- they are used only in ObjectFileMachO and MacOSX-Kernel
process plugin (even though it has "kernel" in the name, this one
communicates with it via network packets and not syscalls). For the time
being I have created OS-independent definitions of these constants and
made the register context classes use those. Long term, the error
handling in these classes should be probably changed to use more
standard mechanisms such as Status or Error classes.

This is the only change necessary (apart from build system glue) to make
ObjectFileMachO work on other platforms. To demonstrate that, I remove
REQUIRES:darwin from our (only) cross-platform mach-o test.

Reviewers: jasonmolenda, aprantl, clayborg, javed.absar

Subscribers: mgorny, lldb-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D46934

llvm-svn: 332702
2018-05-18 11:35:46 +00:00
Adrian Prantl d8f460e864 Enable AUTOBRIEF in doxygen configuration.
This brings the LLDB configuration closer to LLVM's and removes visual
clutter in the source code by removing the @brief commands from
comments.

This patch also reflows the paragraphs in all doxygen comments.

See also https://reviews.llvm.org/D46290.

Differential Revision: https://reviews.llvm.org/D46321

llvm-svn: 331373
2018-05-02 16:55:16 +00:00
Adrian Prantl 05097246f3 Reflow paragraphs in comments.
This is intended as a clean up after the big clang-format commit
(r280751), which unfortunately resulted in many of the comment
paragraphs in LLDB being very hard to read.

FYI, the script I used was:

import textwrap
import commands
import os
import sys
import re
tmp = "%s.tmp"%sys.argv[1]
out = open(tmp, "w+")
with open(sys.argv[1], "r") as f:
  header = ""
  text = ""
  comment = re.compile(r'^( *//) ([^ ].*)$')
  special = re.compile(r'^((([A-Z]+[: ])|([0-9]+ )).*)|(.*;)$')
  for line in f:
      match = comment.match(line)
      if match and not special.match(match.group(2)):
          # skip intentionally short comments.
          if not text and len(match.group(2)) < 40:
              out.write(line)
              continue

          if text:
              text += " " + match.group(2)
          else:
              header = match.group(1)
              text = match.group(2)

          continue

      if text:
          filled = textwrap.wrap(text, width=(78-len(header)),
                                 break_long_words=False)
          for l in filled:
              out.write(header+" "+l+'\n')
              text = ""

      out.write(line)

os.rename(tmp, sys.argv[1])

Differential Revision: https://reviews.llvm.org/D46144

llvm-svn: 331197
2018-04-30 16:49:04 +00:00
Pavel Labath 47cbf4a07b Move Args::StringTo*** functions to a new OptionArgParser class
Summary:
The idea behind this is to move the functionality which depend on other lldb
classes into a separate class. This way, the Args class can be turned
into a lightweight arc+argv wrapper and moved into the lower lldb
layers.

Reviewers: jingham, zturner

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D44306

llvm-svn: 329677
2018-04-10 09:03:59 +00:00
Pavel Labath 9af71b3875 Move StringExtractorGDBRemote.h to the include folder
While trying to use this header I noticed that it is not in the include
folder. Move it to there and update all #includes to reference that file
correctly.

llvm-svn: 327996
2018-03-20 16:14:00 +00:00
Tatyana Krasnukha 706a8095b3 Use GetItemAtIndexAsString overload for ConstString and move set rather than copy.
llvm-svn: 327549
2018-03-14 18:29:41 +00:00
Tatyana Krasnukha 0a6b8b6630 Make Finalize tolerant of empty register sets.
llvm-svn: 326437
2018-03-01 14:36:42 +00:00
Pavel Labath 6a92e99b64 Add SysV Abi for PPC64le
Summary:
This patch implements the ABI Plugin for PPC64le. It was based on the
ABI for PPC64. It also enables LLDB to evaluate expressions using JIT.

Reviewers: labath, clayborg, jhibbits, davide

Reviewed By: labath, clayborg, jhibbits, davide

Subscribers: davide, JDevlieghere, chmeee, emaste, jhibbits, hfinkel, lldb-commits, nemanjai, luporl, lbianc, mgorny, anajuliapc, kbarton

Differential Revision: https://reviews.llvm.org/D41702
Patch by Alexandre Yukio Yamashita <alexandre.yamashita@eldorado.org.br>

llvm-svn: 323100
2018-01-22 11:27:43 +00:00
Pavel Labath a0e3c6f6f5 Reduce x86 register context boilerplate.
Summary:
The x86 FPR struct was defined as a struct containing a union between
two members: XSAVE and FXSAVE. This patch makes FPR a union directly to
remove one layer of indirection when trying to access the members.

The initial layout of these two structs is identical, which is
recognised by the fact that XSAVE has FXSAVE as its first member, so we
also considered removing one more layer and leave FPR identical to XSAVE
struct, but stopped short of doing that, as the FPR may be used to store
different layouts in the future (e.g., ones generated by the FSAVE
instruction).

Reviewers: clayborg, krytarowski

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D41245

llvm-svn: 320966
2017-12-18 10:50:59 +00:00
Vedant Kumar 08ff404308 Avoid module import in a textual header, NFC
This unbreaks the lldb modules build (-DLLVM_ENABLE_MODULES=On).

llvm-svn: 320456
2017-12-12 03:27:13 +00:00
Vedant Kumar 94d788fa78 Fix const-correctness in RegisterContext methods, NFC
A few methods in RegisterContext classes accept const objects which are
cast to a non-const thread_state_t. Drop const-ness more explicitly
where we mean to do so. This fixes a slew of warnings.

Differential Revision: https://reviews.llvm.org/D40821

llvm-svn: 319939
2017-12-06 19:21:12 +00:00
Pavel Labath 11edb4eeef Kill struct IOVEC
struct iovec is used as an interface to system (posix) api's. As such,
we shouldn't be using it in os-independent code, and we shouldn't be
defining our own iovec replacements.

Fortunately, its usage was not very widespread, so the removal was very
easy -- I simply moved a couple declarations into os-specific code.

llvm-svn: 319536
2017-12-01 12:05:00 +00:00
Pavel Labath d2cfe0e597 Fix floating point register write on new x86 linux kernels
Summary:
New linux kernels (on systems that support the XSAVES instruction) will
not update the inferior registers unless the corresponding flag in the
XSAVE header is set. Normally this flag will be set in our image of the
XSAVE area (since we obtained it from the kernel), but if the inferior
has never used the corresponding register set, the respective flag can
be clear.

This fixes the issue by making sure we explicitly set the flags
corresponding to the registers we modify. I don't try to precisely match
the flags to set on each write, as the rules could get quite complicated
-- I use a simpler over-approximation instead.

This was already caught by test_fp_register_write, but that was only
because the code that ran before main() did not use some of the register
sets. Since nothing in this test relies on being stopped in main(), I
modify the test to stop at the entry point instead, so we can be sure
the inferior did not have a chance to access these registers.

Reviewers: clayborg, valentinagiusti

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D40434

llvm-svn: 319161
2017-11-28 10:56:54 +00:00
Pavel Labath fd2c8d6572 Implement core dump debugging for PPC64le
Summary: Implement core dump debugging for PPC64le.

Reviewers: labath

Reviewed By: labath

Subscribers: JDevlieghere, krytarowski, clayborg, labath, lbianc, nemanjai, gut, anajuliapc, mgorny, kbarton, lldb-commits

Differential Revision: https://reviews.llvm.org/D39681
Patch by Alexandre Yukio Yamashita <alexandre.yamashita@eldorado.org.br>

llvm-svn: 318399
2017-11-16 13:38:57 +00:00
Jason Molenda 4f34614beb Fix alignment of arm64 fpu register context structure
so it has the same padding as the kernel's definition
which is written in terms of uint128_t.  Original patch
by Ryan Mansfield.

<rdar://problem/35468499> 

llvm-svn: 318357
2017-11-16 00:50:29 +00:00
Jason Molenda fd6647ecb6 Roll back r318260 because it is causing the windows bot to
break.  The alignas(__uint128_t) is not recognized with MSVC
it looks like.  Zachary, is there a similar type on windows?
I suppose I can go with alignas(16) here but I'd prefer to
specify the type alignment that I want & let the ABI dictate
how much padding is required.

llvm-svn: 318262
2017-11-15 03:41:47 +00:00
Jason Molenda 1f88f4c3bc Two small fixes to handle arm64 fpu register contexts in
a Mach-O file load command correctly, patch by Ryan
Mansfield.

<rdar://problem/35468499> 

llvm-svn: 318260
2017-11-15 03:18:24 +00:00
Pavel Labath 5f19b90783 Move ArchSpec to the Utility module
The rationale here is that ArchSpec is used throughout the codebase,
including in places which should not depend on the rest of the code in
the Core module.

This commit touches many files, but most of it is just renaming of
 #include lines. In a couple of cases, I removed the #include ArchSpec
line altogether, as the file was not using it. In one or two places,
this necessitated adding other #includes like lldb-private-defines.h.

llvm-svn: 318048
2017-11-13 16:16:33 +00:00
Pavel Labath d37349f380 Clean up NativeRegisterContext
Summary:
This commit removes the concrete_frame_idx member from
NativeRegisterContext and related functions, which was always set to
zero and never used.

I also change the native thread class to store a NativeRegisterContext
as a unique_ptr (documenting the ownership) and make sure it is always
initialized (most of the code was already blindly dereferencing the
register context pointer, assuming it would always be present -- this
makes its treatment consistent).

Reviewers: eugene, clayborg, krytarowski

Subscribers: aemerson, sdardis, nemanjai, javed.absar, arichardson, kristof.beyls, kbarton, uweigand, alexandreyy, lldb-commits

Differential Revision: https://reviews.llvm.org/D39837

llvm-svn: 317881
2017-11-10 11:05:49 +00:00
Pavel Labath e6a661053d Add float/vector registers for ppc64le
Summary: Add read and write functions for VSX, VMX and float registers and fix watchpoint size

Reviewers: clayborg

Reviewed By: clayborg

Subscribers: eugene, labath, clayborg, nemanjai, kbarton, JDevlieghere, anajuliapc, gut, lbianc, lldb-commits

Differential Revision: https://reviews.llvm.org/D39487
Patch by: Alexandre Yukio Yamashita <alexandre.yamashita@eldorado.org.br>

llvm-svn: 317329
2017-11-03 15:22:36 +00:00
Pavel Labath eac00c3be6 Fix some warnings found by ToT clang
These fall into two categories:
- unused variables
- (uint8_t *)NULL + X -- changed to reinterpret_cast(X)

llvm-svn: 317270
2017-11-02 21:35:26 +00:00
Eugene Zemtsov aae0a752c5 Enable breakpoints and read/write GPRs for ppc64le
Add support for ppc64le to create breakpoints and read/write
general purpose registers.
Other features for ppc64le and functions to read/write
other registers are being implemented.

Patch by Alexandre Yukio Yamashita (alexandreyy)
Differential Revision: https://reviews.llvm.org/D38323

llvm-svn: 315008
2017-10-05 19:44:05 +00:00
Saleem Abdulrasool bf2a8a2878 Process: fix FXSAVE on x86
The FXSAVE member `ftw` (FPU Tag Word) was given the wrong size (8-bit)
instead of the correct width (16-bit) as per the x87 Programmer's
Manual.  Adjust this to ensure that we print out the complete value for
the register.

llvm-svn: 311579
2017-08-23 17:23:12 +00:00
Ed Maste 37c40af712 Make i386-*-freebsd expression work on JIT path
* Enable i386 ABI creation for freebsd
* Added an extra argument in ABISysV_i386::PrepareTrivialCall for mmap
  syscall
* Unlike linux, the last argument of mmap is actually 64-bit(off_t).
  This requires us to push an additional word for the higher order bits.
* Prior to this change, ktrace dump will show mmap failures due to
  invalid argument coming from the 6th mmap argument.

Patch by Karnajit Wangkhem

Differential Revision:	https://reviews.llvm.org/D34776

llvm-svn: 311002
2017-08-16 12:55:02 +00:00
Tamas Berghammer bba2c83493 Remove the DWARFExpression -> Clang ExpressionParser dependency
It was completly unused and broke the part of the encapsulation that
common code shouldn't depend on specific plugins or language specific
features.

llvm-svn: 311000
2017-08-16 11:45:10 +00:00
Jason Molenda 7f5bd34b18 Fix two places in RegisterContextLLDB::InitializeNonZerothFrame where
I'm not running the saved pc through FixCodeAddress as soon as I should.

<rdar://problem/30686307> 

llvm-svn: 306634
2017-06-29 03:02:24 +00:00
Pavel Labath f2a8bccf85 Move StructuredData from Core to Utility
Summary:
It had a dependency on StringConvert and file reading code, which is not
in Utility. I've replaced that code by equivalent llvm operations.

I've added a unit test to demonstrate that parsing a file still works.

Reviewers: zturner, jingham

Subscribers: kubamracek, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D34625

llvm-svn: 306394
2017-06-27 10:45:31 +00:00
Pavel Labath c3c721222d Fix backtrace of noreturn functions situated at the end of a module
Summary:
When a call instruction is the last instruction in a function, the
backtrace PC will point past the end of the function. We already had
special code to handle that, but we did not handle the case where the PC
ends up outside of the bounds of the module containing the function,
which is a situation that occured in TestNoreturnUnwind on android for
some arch/compiler combinations.

I fix this by adding an argument to Address resolution code which states
that we are ok with addresses pointing to the end of a module/section to
resolve to that module/section.

I create a reproducible test case for this situation by hand-crafting an
executable which has a noreturn function at the end of a module.

Reviewers: jasonmolenda, jingham

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D32022

llvm-svn: 304976
2017-06-08 13:26:35 +00:00
Zachary Turner 2833321f09 Update StructuredData::String to return StringRefs.
It was returning const std::string& which was leading to
unnecessary copies all over the place, and preventing people
from doing things like Dict->GetValueForKeyAsString("foo", ref);

llvm-svn: 302875
2017-05-12 05:49:54 +00:00
Zachary Turner 97206d5727 Rename Error -> Status.
This renames the LLDB error class to Status, as discussed
on the lldb-dev mailing list.

A change of this magnitude cannot easily be done without
find and replace, but that has potential to catch unwanted
occurrences of common strings such as "Error".  Every effort
was made to find all the obvious things such as the word "Error"
appearing in a string, etc, but it's possible there are still
some lingering occurences left around.  Hopefully nothing too
serious.

llvm-svn: 302872
2017-05-12 04:51:55 +00:00
Davide Italiano 04e7c08d9e [Utility] Placate another GCC warning.
Differential Revision:  https://reviews.llvm.org/D32137

llvm-svn: 300845
2017-04-20 14:45:33 +00:00
Kamil Rytarowski 36e23ecad0 Introduce FPR and Debug Registers/NetBSD/amd64 support
Summary:
This code offers Debug Registers (80386) model in LLDB/amd64.

This is initial support and has one issue that will be addressed later,
Debug Register trap (TRAP_DBREG) is registered as (TRAP_TRACE)
for unknown reason.  On the other hand this works good enough to
move on and leave this bug to be squashed later.

Improve the NativeProcessNetBSD::ReinitializeThreads() function,
stop setting inside it SetStoppedByExec(). This fixes incorrect
stop reason on attaching (SetStoppedBySignal(SIGSTOP)).

This commits also has no functional style improvements from
clang-format.

This code also ships with FXSAVE support on NetBSD.

Demo:

```
$ lldb ./watch                                                                                                                                      
(lldb) target create "./watch"
Current executable set to './watch' (x86_64).
(lldb) b main
Breakpoint 1: where = watch`main + 15 at watch.c:8, address = 0x000000000040087f
(lldb) r
Process 1573 launched: './watch' (x86_64)
Process 1573 stopped
* thread #1, stop reason = breakpoint 1.1
    frame #0: 0x000000000040087f watch`main(argc=1, argv=0x00007f7fffa12b88) at watch.c:8
   5    {
   6            int i, j, k;
   7    
-> 8            for (i = 0; i < 3; i++)
   9                    for (j = 0; j < 3; j++)
   10                           for (k = 0; k < 3; k++)
   11                                   printf("Hello world! i=%d j=%d k=%d\n", i, j, k);
(lldb) watch set var i
Watchpoint created: Watchpoint 1: addr = 0x7f7fffa12b4c size = 4 state = enabled type = w
    declare @ '/public/lldb_devel/watch.c:6'
    watchpoint spec = 'i'
    new value: 0
(lldb) c
Process 1573 resuming
Hello world! i=0 j=0 k=0
Hello world! i=0 j=0 k=1
Hello world! i=0 j=0 k=2
Hello world! i=0 j=1 k=0
Hello world! i=0 j=1 k=1
Hello world! i=0 j=1 k=2
Hello world! i=0 j=2 k=0
Hello world! i=0 j=2 k=1
Hello world! i=0 j=2 k=2
Process 1573 stopped
* thread #1, stop reason = trace
    frame #0: 0x00000000004008cc watch`main(argc=1, argv=0x00007f7fffa12b88) at watch.c:8
   5    {
   6            int i, j, k;
   7    
-> 8            for (i = 0; i < 3; i++)
   9                    for (j = 0; j < 3; j++)
   10                           for (k = 0; k < 3; k++)
   11                                   printf("Hello world! i=%d j=%d k=%d\n", i, j, k)
```

FPR (in another program using libm)

```
(lldb) register read --all
General Purpose Registers:
       rax = 0x000000000000001c
       rbx = 0x00007f7fff1d4fe0
       rcx = 0x000000000000000c
       rdx = 0x0000000000000002
       rdi = 0x0000746711d5b018  __sF + 152
       rsi = 0x0000000000000001
       rbp = 0x00007f7fff1d3d80
       rsp = 0x00007f7fff1d3d60
        r8 = 0x00007f7fff1d3470
        r9 = 0x0000000000000000
       r10 = 0x0000000000000001
       r11 = 0x0000000000000202
       r12 = 0x00007f7fff1d3da0
       r13 = 0x00007d8ad2d88500
       r14 = 0x0000000000000002
       r15 = 0x00007f7fffa627e0
       rip = 0x00000000004009e9  fpr`main + 217 at fpr.c:15
    rflags = 0x0000000000000202
        cs = 0x0000000000000047
        fs = 0x0000000000000000
        gs = 0x0000000000000000
        ss = 0x000000000000003f
        ds = 0x000000000000003f
        es = 0x000000000000003f
       eax = 0x0000001c
       ebx = 0xff1d4fe0
       ecx = 0x0000000c
       edx = 0x00000002
       edi = 0x11d5b018
       esi = 0x00000001
       ebp = 0xff1d3d80
       esp = 0xff1d3d60
       r8d = 0xff1d3470
       r9d = 0x00000000
      r10d = 0x00000001
      r11d = 0x00000202
      r12d = 0xff1d3da0
      r13d = 0xd2d88500
      r14d = 0x00000002
      r15d = 0xffa627e0
        ax = 0x001c
        bx = 0x4fe0
        cx = 0x000c
        dx = 0x0002
        di = 0xb018
        si = 0x0001
        bp = 0x3d80
        sp = 0x3d60
       r8w = 0x3470
       r9w = 0x0000
      r10w = 0x0001
      r11w = 0x0202
      r12w = 0x3da0
      r13w = 0x8500
      r14w = 0x0002
      r15w = 0x27e0
        ah = 0x00
        bh = 0x4f
        ch = 0x00
        dh = 0x00
        al = 0x1c
        bl = 0xe0
        cl = 0x0c
        dl = 0x02
       dil = 0x18
       sil = 0x01
       bpl = 0x80
       spl = 0x60
       r8l = 0x70
       r9l = 0x00
      r10l = 0x01
      r11l = 0x02
      r12l = 0xa0
      r13l = 0x00
      r14l = 0x02
      r15l = 0xe0

unknown:
     fctrl = 0x037f
     fstat = 0x0220
      ftag = 0x00
       fop = 0x0000
     fiseg = 0x11e1a52c
     fioff = 0x11e1a52c
     foseg = 0xff1d3d54
     fooff = 0xff1d3d54
     mxcsr = 0x00001fa0
  mxcsrmask = 0x0000ffff
       st0 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st1 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st2 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st3 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st4 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st5 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st6 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       st7 = {0xa5 0xdb 0x2d 0xbd 0x93 0xae 0xb9 0xfe 0xfe 0x3f}
       mm0 = 0x3fe9d13800000000
       mm1 = 0x3e0485fcce89c000
       mm2 = 0x3fefd735e0000000
       mm3 = 0x0000000000000000
       mm4 = 0x3fe0000000000000
       mm5 = 0x3fe00000005217f3
       mm6 = 0x0000000000000000
       mm7 = 0x3fefd735e0000000
      xmm0 = {0x00 0x00 0x00 0x00 0x38 0xd1 0xe9 0x3f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm1 = {0x00 0xc0 0x89 0xce 0xfc 0x85 0x04 0x3e 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm2 = {0x00 0x00 0x00 0xe0 0x35 0xd7 0xef 0x3f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm3 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm4 = {0x00 0x00 0x00 0x00 0x00 0x00 0xe0 0x3f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm5 = {0xf3 0x17 0x52 0x00 0x00 0x00 0xe0 0x3f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm6 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm7 = {0x00 0x00 0x00 0xe0 0x35 0xd7 0xef 0x3f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm8 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
      xmm9 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm10 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm11 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm12 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm13 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm14 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
     xmm15 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
       dr0 = 0x0000000000000000
       dr1 = 0x0000000000000000
       dr2 = 0x0000000000000000
       dr3 = 0x0000000000000000
       dr4 = 0x0000000000000000
       dr5 = 0x0000000000000000
       dr6 = 0x00000000ffff0ff0
       dr7 = 0x0000000000000400
22 registers were unavailable.
```

Sponsored by <The NetBSD Foundation>

Reviewers: labath, emaste, joerg, kettenis

Reviewed By: labath

Subscribers: #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D32080

llvm-svn: 300548
2017-04-18 12:53:35 +00:00
Davide Italiano 6462def06d [Process/Utility] Remove dead code. NFCI.
llvm-svn: 300373
2017-04-14 22:04:05 +00:00
Zachary Turner 4479ac15c9 iwyu fixes on lldbUtility.
This patch makes adjustments to header file includes in
lldbUtility based on recommendations by the iwyu tool
(include-what-you-use).  The goal here is to make sure that
all files include the exact set of headers which are needed
for that file only, to eliminate cases of dead includes (e.g.
someone deleted some code but forgot to delete the header
includes that that code necessitated), and to eliminate the
case where header includes are picked up transitively.

llvm-svn: 299676
2017-04-06 18:12:24 +00:00
Nitesh Jain b8dbd32375 [LLDB][MIPS] Core Dump Support.
Reviewers: labath, emaste

Subscribers: jaydeep, bhushan, lldb-commits, slthakur

Differential Revision: https://reviews.llvm.org/D30457

llvm-svn: 299200
2017-03-31 11:14:02 +00:00
Kamil Rytarowski 12801f1e0f [LLDB] OpenBSD support
Summary:
Add basic OpenBSD support. This is enough to be able to analyze core dumps for OpenBSD/amd64, OpenBSD/arm, OpenBSD/arm64 and OpenBSD/i386.

Note that part of the changes to source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp fix a bug that probably affects other platforms as well.  The GetProgramHeaderByIndex() interface use 1-based indices, but in some case when looping over the headers the, the loop starts at 0 and misses the last header.  This caused problems on OpenBSD since OpenBSD core dumps have the PT_NOTE segment as the last program header.


Reviewers: joerg, labath, krytarowski

Reviewed By: krytarowski

Subscribers: aemerson, emaste, rengolin, srhines, krytarowski, mgorny, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D31131

llvm-svn: 298810
2017-03-26 15:34:57 +00:00
Bruce Mitchener ef4536c389 Fix warnings from clang build on macOS.
Reviewers: lldb-commits

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D31279

llvm-svn: 298585
2017-03-23 09:52:26 +00:00
Zachary Turner 90bf36f949 Break the cycle between Host and PluginProcessUtility.
There are only two users of NativeRegisterContextRegisterInfo,
and both are in process plugins.  Moving this code from Host
to Plugins/Process/Utility thus makes sense, and as it is the
only dependency from Host -> PluginProcessUtility, it also
breaks this cycle, reducing LLDB's overall cycle count from
45 to 44.

llvm-svn: 298466
2017-03-22 00:27:54 +00:00
Zachary Turner fb1a0a0d2f Move many other files from Core -> Utility.
llvm-svn: 297043
2017-03-06 18:34:25 +00:00
Zachary Turner 666cc0b291 Move DataBuffer / DataExtractor and friends from Core -> Utility.
llvm-svn: 296943
2017-03-04 01:30:05 +00:00
Zachary Turner 6f9e690199 Move Log from Core -> Utility.
All references to Host and Core have been removed, so this
class can now safely be lowered into Utility.

Differential Revision: https://reviews.llvm.org/D30559

llvm-svn: 296909
2017-03-03 20:56:28 +00:00
Pavel Labath 4b2b6bfb97 Merge Linux and FreeBSD arm register contexts
Summary:
These two register contexts were identical, so this shouldn't cause any
regressions, but I'd appreciate it if you can check that this at least compiles.

Reviewers: emaste, sas

Subscribers: aemerson, rengolin, lldb-commits, mgorny

Differential Revision: https://reviews.llvm.org/D27126

llvm-svn: 296335
2017-02-27 13:00:50 +00:00
Kamil Rytarowski 7a8ac3a639 Introduce support for Debug Registers in RegisterContextNetBSD_x86_64
Summary:
NetBSD 7.99.62 introduced Debug Registers interface similar to the FreeBSD one.
This interface will land NetBSD-8.0.

Introduce support for this interface in Register Context NetBSD x86_64 unconditionally as older versions of NetBSD will not be supported.

This change allows to reduce diff with other ports and remove local copy of the RegisterInfos_x86_64.h content.

NetBSD Register Context for 32-bit x86 support will be added later.

Sponsored by <The NetBSD Foundation>

Reviewers: labath, joerg, emaste, clayborg

Reviewed By: labath, clayborg

Subscribers: #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D30287

llvm-svn: 296071
2017-02-24 01:53:45 +00:00
Zachary Turner 01c3243fc1 Remove dependencies from Utility to Core and Target.
With this patch, the only dependency left is from Utility
to Host.  After this is broken, Utility will finally be
standalone.

Differential Revision: https://reviews.llvm.org/D29909

llvm-svn: 295088
2017-02-14 19:06:07 +00:00
Jason Molenda be227955e2 Before returning a pc value for a stack frame,
run it through the ABI's FixCodeAddress method.
<rdar://problem/29711506> 

llvm-svn: 295025
2017-02-14 04:55:03 +00:00
Zachary Turner bf9a77305f Move classes from Core -> Utility.
This moves the following classes from Core -> Utility.

ConstString
Error
RegularExpression
Stream
StreamString

The goal here is to get lldbUtility into a state where it has
no dependendencies except on itself and LLVM, so it can be the
starting point at which to start untangling LLDB's dependencies.
These are all low level and very widely used classes, and
previously lldbUtility had dependencies up to lldbCore in order
to use these classes.  So moving then down to lldbUtility makes
sense from both the short term and long term perspective in
solving this problem.

Differential Revision: https://reviews.llvm.org/D29427

llvm-svn: 293941
2017-02-02 21:39:50 +00:00
Chris Bieneman 81b8f12b42 [CMake] [3/4] Update a batch of plugins
This is extending the updates from r293696 to more LLDB plugins.

llvm-svn: 293700
2017-01-31 22:29:11 +00:00
Kamil Rytarowski a89218d603 Recognize Real-Time Signals on NetBSD
Summary:
Real-Time Signals are available in NetBSD-current and will land NetBSD 8.0.
Older stable versions of NetBSD will not be supported.

Sponsored by <The NetBSD Foundation>

Reviewers: labath, joerg, clayborg, emaste

Reviewed By: labath, clayborg, emaste

Subscribers: #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D29091

llvm-svn: 293391
2017-01-28 20:01:53 +00:00
David Blaikie a322f36cfd Make lldb -Werror clean for -Wstring-conversion
Also found/fixed one bug identified by this warning in
RenderScriptx86ABIFixups.cpp where a string literal was being used in an
effort to provide a name for an instruction/register, but was instead
being passed as the bool 'isVolatile' parameter.

llvm-svn: 291198
2017-01-06 00:38:06 +00:00
Pavel Labath 43d354182f Use Timeout<> in EvaluateExpressionOptions class
llvm-svn: 288797
2016-12-06 11:24:51 +00:00
Pavel Labath e705c8b5e6 Replace __ANDROID_NDK__ with __ANDROID__
Summary:
This replaces all the uses of the __ANDROID_NDK__ define with __ANDROID__. This
is a preparatory step to remove our custom android toolchain file and rely on
the standard android NDK one instead, which does not provide this define.
Instead I rely, on __ANDROID__, which is set by the compiler.

I haven't yet removed the cmake variable with the same name, as we will need to
do something completely different there -- NDK toolchain defines
CMAKE_SYSTEM_NAME to Android, while our current one pretends it's linux.

Reviewers: tberghammer, zturner

Subscribers: danalbert, srhines, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D27305

llvm-svn: 288494
2016-12-02 11:15:15 +00:00
Pavel Labath 6d2497d48f Remove a spurious reference to ProcessElfCore
We were referencing a the process class from a register context, which seems
intuitively wrong. Also, the comment above that code is now definitely incorrect,
as ProcessElfCore now does support floating point registers. Also, the code
wasn't really doing anything, as it was just skipping a zero-initialization of a
field that was most likely zero-initialized anyway. Linux elf core FPR test still
passes after this.

llvm-svn: 288237
2016-11-30 10:25:02 +00:00
Pavel Labath 27469faaa7 Remove an x86-ism from RegisterInfoInterface
Summary:
While adding FPR support to x86 elf core files (D26300), we ended up adding a
very x86-specific function to the general RegisterInfoInterface class, which I
didn't catch in review. This removes that function. The only reason we needed
it was to find the offset of the FXSAVE area. This is the same as the offset of
the first register within that area, so we might as well use that.

Reviewers: clayborg, dvlahovski

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D27222

llvm-svn: 288236
2016-11-30 10:17:58 +00:00
Alexander Shaposhnikov 696bd63550 [lldb] Fix typos in file headers
This diff fixes typos in file headers (incorrect file names).

Test plan:

Under llvm/tools/lldb/source:
find ./* -type f | grep -e '\(cpp\|h\)$' | while read F; do B=$(basename $F); echo $F head -n 1 $F | grep -v $B | wc -l ; done

Differential revision: https://reviews.llvm.org/D27115

llvm-svn: 287966
2016-11-26 05:23:44 +00:00
Pavel Labath 3f8c78168e Merge Linux and FreeBSD arm64 register contexts
Summary:
This is a test-the-water change about possibilities of reducing duplication in
the register context definitions.

I've named the new class RegisterInfoPOSIX, as RegisterContextPOSIX was already
taken :(.  The two files were identical except for a fix by Tamas in D12636,
which was applied to the Linux version only, which fixed a discrepancy between
the definitions of fpsr and fpcr on one hand, and all other floating point
register definitions on the other.

Linux test suite still passes after this change. For freebsd, make the floating
point register behavior consistent, but I don't know whether it will be
consistently fixed, or consistently broken. By eyeballing the code, I have a
feeling that a similar fix to D12636 will be required in
RegisterContextPOSIXProcessMonitor_arm64::ReadRegister, but I can't be sure as I
have no way to test it (the assert in that function should fire upon accessing
the registers if it is wrong though).

Reviewers: emaste, clayborg

Subscribers: aemerson, rengolin, beanz, mgorny, modocache, dmikulin, lldb-commits

Differential Revision: https://reviews.llvm.org/D25947

llvm-svn: 287916
2016-11-25 10:28:09 +00:00
Dimitar Vlahovski a228c46c2a ELF core: Adding parsing of the floating-point and SSE registers on x86 32/64 bit elf core files
Summary:
The floating-point and SSE registers could be present in the elf-core
file in the note NT_FPREGSET for 64 bit ones, and in the note
NT_PRXFPREG for 32 bit ones.

The entire note is a binary blob matching the layout of the x87 save
area that gets generated by the FXSAVE instruction (see Intel developers
manual for more information).

This CL mainly modifies the RegisterRead function in
RegisterContextPOSIXCore_x86_64 for it to return the correct data both
for GPR and FPR/SSE registers, and return false (meaning "this register
is not available") for other registers.

I added a test to TestElfCore.py that tests reading FPR/SSE registers
both from a 32 and 64 bit elf-core file and I have inluded the source
which I used to generate the core files.

I tried to also add support for the AVX registers, because this info could
also be present in the elf-core file (note NT_X86_XSTATE - that is the result of
the newer XSAVE instruction). Parsing the contents from the file is
easy. The problem is that the ymm registers are split into two halves
and they are in different places in the note. For making this work one
would either make a "hacky" approach, because there won't be
any other way with the current state of the register contexts - they
assume that "this register is of size N and at offset M" and
don't have the notion of discontinuos registers.

Reviewers: labath

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D26300

llvm-svn: 287506
2016-11-20 21:24:49 +00:00
Zachary Turner c156427ded Don't allow direct access to StreamString's internal buffer.
This is a large API change that removes the two functions from
StreamString that return a std::string& and a const std::string&,
and instead provide one function which returns a StringRef.

Direct access to the underlying buffer violates the concept of
a "stream" which is intended to provide forward only access,
and makes porting to llvm::raw_ostream more difficult in the
future.

Differential Revision: https://reviews.llvm.org/D26698

llvm-svn: 287152
2016-11-16 21:15:24 +00:00
Pavel Labath 766fd11597 Remove TimeValue from UnwindLLDB.cpp
Really NFC, as the code is #ifdefed out, but I did make sure it compiles if I enable it.

llvm-svn: 285797
2016-11-02 10:27:54 +00:00
Pavel Labath 7a8ba4ffbe Fix arm64 sub-register definitions
The "value regs" field was filled incorrectly. It is supposed to list the
registers that *this* register is a sub-register of, not the other way around.
This manifested itself in "register read" showing only the smaller sub-registers
(and a bunch of tests not passing). I am not sure if the "invalidates" field is
correct either, but it's usage seems to be inconsistent, so I'll leave that as-is
for now.

llvm-svn: 284981
2016-10-24 14:57:50 +00:00
Pavel Labath 183098ca47 Reformat RegisterInfos_arm64 into a table. NFC
llvm-svn: 284976
2016-10-24 14:01:52 +00:00
Pavel Labath 16706dcbd4 Add the new arm64 sub-register definitions to NativeRegisterContextLinux
It's quite sad that we have to edit so many files just to add a register. I am
going to investigate how to merge these definitions somehow, but for now this
should at least get arm64 linux working again.

llvm-svn: 284970
2016-10-24 12:59:20 +00:00
Jason Molenda 0b5102fd7e Add lldb register definitions for w0-w28, s0-s31, and d0-d31 to
RegisterInfos_arm64.h.  These register definitions include the
offset into the register context, which will vary depending on the
endianness of the arm64 target system (e.g. s8 is at offset 0 in
v8 on little-endian, it is at offset 12 on big-endian) and I've
only added the little-endian definitions to the table.  If we want
to add a big-endian arm64 target, we'll need a separate table which
uses the big-endian offsets for these registers.  I changed the
name of the register table from g_register_infos_arm64 to
g_register_infos_arm64_le to make it explicit that this is the
little-endian version of that table, and updated users of the table
to use the new name.

I added support for the "w", "s", and "d" registers to
RegisterContextDarwin_arm64 but it was more an example than anything
useful -- this plugin is only used when working with core files and
darwin core files do not (today) include the floating point register
context, so it only added the support for the "w" pseudo registers.
When we're connected to a real arm64 device, we use the ProcessGDBRemote
code.

llvm-svn: 284666
2016-10-19 23:38:38 +00:00
Nitesh Jain 47a2c55447 [LLDB][MIPS] fix Floating point register read/write for big endian
Reviewers: clayborg, labath, jaydeep

Subscribers: bhushan, slthakur, lldb-commits

Differential Revision: https://reviews.llvm.org/D24603

llvm-svn: 284003
2016-10-12 10:53:57 +00:00
Zachary Turner 95eae4235d Make lldb::Regex use StringRef.
This updates getters and setters to use StringRef instead of
const char *.  I tested the build on Linux, Windows, and OSX
and saw no build or test failures.  I cannot test any BSD
or Android variants, however I expect the required changes
to be minimal or non-existant.

llvm-svn: 282079
2016-09-21 16:01:28 +00:00
Eugene Zelenko 3eb83b4a0d Fix Clang initialization and Clang-tidy modernize-use-nullptr warnings in source/Plugins/Process/Utility.
Differential revision: https://reviews.llvm.org/D24694

llvm-svn: 282041
2016-09-21 00:59:22 +00:00
Zachary Turner ecbb0bb169 Fix more functions in Args to use StringRef.
This patch also marks the const char* versions as =delete to prevent
their use.  This has the potential to cause build breakages on some
platforms which I can't compile.  I have tested on Windows, Linux,
and OSX.  Best practices for fixing broken callsites are outlined in
Args.h in a comment above the deleted function declarations.

Eventually we can remove these =delete declarations, but for now they
are important to make sure that all implicit conversions from
const char * are manually audited to make sure that they do not invoke a
conversion from nullptr.

llvm-svn: 281919
2016-09-19 17:54:06 +00:00
Greg Clayton 8e0d63112b Fix compiler warnings where two values weren't being initialized.
llvm-svn: 281770
2016-09-16 20:10:02 +00:00
Dimitar Vlahovski 6d78a1a417 Reformat x86_64 register infos defines table
Fix the table format of the register defines after clang-format.
Added guards to prevent future reformatting again from clang-format.

llvm-svn: 281606
2016-09-15 12:58:27 +00:00
Valentina Giusti 5f957b54c8 Use Intel CPU flags to determine target supported features.
Summary:
This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX
and MPX are supported by the target hardware. In case the HW supports XSAVE,
and at least one of the extended register sets, it further checks if the
target software has the kernel support for such features, by verifying that
their XSAVE part is correctly managed.

Differential Revision: https://reviews.llvm.org/D24559

llvm-svn: 281507
2016-09-14 17:27:48 +00:00
Valentina Giusti cda0ae46ac Fix for rL280668, Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary: Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: dvlahovski, granata.enrico, clayborg, labath

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24255

llvm-svn: 280942
2016-09-08 14:16:45 +00:00
Zachary Turner 816e762fcc Put the LLVM_ALIGNAS directive in the right place.
llvm-svn: 280758
2016-09-06 22:02:06 +00:00
Zachary Turner 415a189c09 Make LLDB compile on Windows after the reformat.
Most of these issues arose as a result of header re-ordering, but
it turned up a real bug, which is that MSVC doesn't support
__attribute__((packed)) or __attribute__((aligned)).  This was
working before because there's a Windows header that #defines
__attribute__(x) to nothing.  We should fix this by removing
that #define entirely, and dealing with the fallout separately
which may turn up even more bugs.

I fixed this by replacing them with the corresponding LLVM
macros which understand how to do these operations on all the
different compilers.

llvm-svn: 280757
2016-09-06 21:52:14 +00:00
Kate Stone b9c1b51e45 *** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style.  This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort.  Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit.  The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

    find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
    find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit.  There are alternatives available that will attempt
to look through this change and find the appropriate prior commit.  YMMV.

llvm-svn: 280751
2016-09-06 20:57:50 +00:00
Dimitar Vlahovski ee44a92df6 Revert "Intel(R) Memory Protection Extensions (Intel(R) MPX) support."
This reverts commit rL280668 because the register tests fail on i386
Linux.

I investigated a little bit what causes the failure - there are missing
registers when running 'register read -a'.
This is the output I got at the bottom:
"""
...
Memory Protection Extensions:
      bnd0 = {0x0000000000000000 0x0000000000000000}
      bnd1 = {0x0000000000000000 0x0000000000000000}
      bnd2 = {0x0000000000000000 0x0000000000000000}
      bnd3 = {0x0000000000000000 0x0000000000000000}

unknown:
2 registers were unavailable.
"""

Also looking at the packets exchanged between the client and server:
"""
...
history[308] tid=0x7338 <  19> send packet: $qRegisterInfo4a#d7
history[309] tid=0x7338 < 130> read packet:
$name:bnd0;bitsize:128;offset:1032;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:101;dwarf:101;#48
history[310] tid=0x7338 <  19> send packet: $qRegisterInfo4b#d8
history[311] tid=0x7338 < 130> read packet:
$name:bnd1;bitsize:128;offset:1048;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:102;dwarf:102;#52
history[312] tid=0x7338 <  19> send packet: $qRegisterInfo4c#d9
history[313] tid=0x7338 < 130> read packet:
$name:bnd2;bitsize:128;offset:1064;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:103;dwarf:103;#53
history[314] tid=0x7338 <  19> send packet: $qRegisterInfo4d#da
history[315] tid=0x7338 < 130> read packet:
$name:bnd3;bitsize:128;offset:1080;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:104;dwarf:104;#54
history[316] tid=0x7338 <  19> send packet: $qRegisterInfo4e#db
history[317] tid=0x7338 <  76> read packet:
$name:bndcfgu;bitsize:64;offset:1096;encoding:vector;format:vector-uint8;#99
history[318] tid=0x7338 <  19> send packet: $qRegisterInfo4f#dc
history[319] tid=0x7338 <  78> read packet:
$name:bndstatus;bitsize:64;offset:1104;encoding:vector;format:vector-uint8;#8e
...
"""

The bndcfgu and bndstatus registers don't have the 'Memory Protections
Extension' set. I looked at the code and it seems that that is set
correctly.

So I'm not sure what's the problem or where does it come from.

Also there is a second failure related to something like this in the
tests:
"""
registerSet.GetName().lower()
"""

For some reason the registerSet.GetName() returns None.

llvm-svn: 280703
2016-09-06 11:00:37 +00:00
Valentina Giusti f105abbc0d Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary:

The Intel(R) Memory Protection Extensions (Intel(R) MPX) associates pointers
to bounds, against which the software can check memory references to
prevent out of bound memory access.

This patch allows accessing the MPX registers:
  * bnd0-3: 128-bit registers to hold the bound values,
  * bndcfgu, bndstatus: 64-bit configuration registers,

This patch also adds read/write tests for the MPX registers in the register
command tests and adds a new subdirectory for MPX specific tests.

Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: labath, granata.enrico, lldb-commits, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24187

llvm-svn: 280668
2016-09-05 17:43:10 +00:00
Zachary Turner d08f09c113 Convert some StringExtractor functions to accept MutableArrayRefs.
MutableArrayRef<T> is essentially a safer version of passing around
(T*, length) pairs and provides some convenient functions for working
with the data without having to manually manipulate indices.

This is a minor NFC.

llvm-svn: 280123
2016-08-30 18:12:11 +00:00
Pavel Labath 9ba9dfdd02 Make sure files include what they use (part 2/2)
This makes lldb still compile on linux after a project-wide clang-format

llvm-svn: 278335
2016-08-11 14:12:10 +00:00
Pavel Labath dc2b3b7ea8 Make sure files include what they use (part 1/N)
preparation for the big clang-format.

llvm-svn: 278222
2016-08-10 13:30:20 +00:00
Greg Clayton 5b22f4a6f7 Fix more RegisterInfo initialization issues and quiet hundreds of warnings.
llvm-svn: 278063
2016-08-08 22:48:07 +00:00
Greg Clayton 1386c6ceae Fix RegisterInfo initializers to have all the required initializers after recent changes. This quiets a few hundred warnings on MacOSX.
llvm-svn: 278060
2016-08-08 22:15:35 +00:00
Nitesh Jain 52b6cc5d5f [LLVM][MIPS] Fix FPU Size Based on Dynamic FR.
Reviewers: jingham, clayborg

Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, lldb-commits, emaste, nemanjai, labath, sdardis

Differential Revision: https://reviews.llvm.org/D20357

llvm-svn: 277343
2016-08-01 13:45:51 +00:00
Jim Ingham 75c450466d The ARM single-step handling needs to look for breakpoint on the next instruction.
<rdar://problem/27006685>

llvm-svn: 276796
2016-07-26 19:50:25 +00:00
Jason Molenda 17b45390db Revert r273524, it may have been the cause of a linux testbot failure
for TestNamespaceLookup.py; didn't see anything obviously wrong so I'll
need to look at this more closely before re-committing.  (passed OK on
macOS ;)

llvm-svn: 273531
2016-06-23 04:24:16 +00:00
Jason Molenda cb6dae22e2 Do some minor renames of "Mac OS X" to "macOS".
There's uses of "macosx" that will be more tricky to
change, like in triples (e.g. "x86_64-apple-macosx10.11") - 
for now I'm just updating source comments and strings printed 
for humans.

llvm-svn: 273524
2016-06-23 01:18:16 +00:00
Kuba Brecka 00d7c563d2 A better fix of incorrectly used locking in HistoryThread and HistoryUnwind.
llvm-svn: 270363
2016-05-22 14:19:11 +00:00
Kuba Brecka d9b228128b Revert r270358 ("Fix an incorrectly used locking in HistoryThread and HistoryUnwind").
llvm-svn: 270359
2016-05-22 14:05:28 +00:00
Kuba Brecka 7380f25d29 Fix an incorrectly used locking in HistoryThread and HistoryUnwind, where unique_lock's release() was called causing the mutex to stay locked.
llvm-svn: 270358
2016-05-22 12:24:38 +00:00
Sagar Thakur b189db627c [LLDB][MIPS] Fix Floating point Registers Encoding
Patch by Nitesh Jain.

Summary: Currently floating point regsiters has eEncodingUint encoding. Hence register write  '1.25' will failed. This patch add eEncodingIEEE754 encoding for floating point registers( - ). This patch will fix test_fp_register_write in TestRegisters.py

Reviewers: clayborg, sagar
Subscribers: mohit.bhakkad, jaydeep, bhushan, sdardis, lldb-commits
Differential: D18853
llvm-svn: 270208
2016-05-20 12:11:52 +00:00
Jason Molenda 1ebb2c92f2 Some changes to prevent searching down the stack for saved register
values for the pc or return address register.

On ios with arm64 and a binary that has multiple functions without 
individual symbol boundaries, we end up with an assembly profile
unwind plan that says lr=<same> - that is, the link register contents
are unmodified from the caller's value.  This gets the unwinder in
a loop.  

When we're off the 0th frame, we never want to look to a caller for
a pc or return-address register value.

Add checks to ReadGPRValue and ReadRegister to prevent both the pc
and ra register values from recursing.

If this causes problems with backtraces on android, let me know or
back it out and I'll look into it -- but I think these are
straightforward and don't expect problems.

<rdar://problem/24610365> 

llvm-svn: 270162
2016-05-20 00:16:14 +00:00
Saleem Abdulrasool 16ff860469 remove use of Mutex in favour of std::{,recursive_}mutex
This is a pretty straightforward first pass over removing a number of uses of
Mutex in favor of std::mutex or std::recursive_mutex. The problem is that there
are interfaces which take Mutex::Locker & to lock internal locks. This patch
cleans up most of the easy cases. The only non-trivial change is in
CommandObjectTarget.cpp where a Mutex::Locker was split into two.

llvm-svn: 269877
2016-05-18 01:59:10 +00:00
Ulrich Weigand 7793ba86d1 Fix unwind failures when PC points beyond the end of a function
RegisterContextLLDB::InitializeNonZerothFrame already has code to attempt
to detect and handle the case where the PC points beyond the end of a
function, but there are certain cases where this doesn't work correctly.

In fact, there are *two* different places where this detection is attempted,
and the failure is in fact a result of an unfortunate interaction between
those two separate attempts.

First, the ResolveSymbolContextForAddress routine is called with the
resolve_tail_call_address flag set to true.  This causes the routine
to internally accept a PC pointing beyond the end of a function, and
still resolving the PC to that function symbol.

Second, the InitializeNonZerothFrame routine itself maintains a
"decr_pc_and_recompute_addr_range" flag and, if that turns out to
be true, itself decrements the PC by one and searches again for
a symbol at that new PC value.

Both approaches correctly identify the symbol associated with the PC.
However, the problem is now that later on, we also need to find the
DWARF CFI record associated with the PC.  This is done in the
RegisterContextLLDB::GetFullUnwindPlanForFrame routine, and uses
the "m_current_offset_backed_up_one" member variable.

However, that variable only actually contains the PC "backed up by
one" if the *second* approach above was taken.  If the function was
already identified via the first approach above, that member variable
is *not* backed up by one but simply points to the original PC.
This in turn causes GetEHFrameUnwindPlan to not correctly identify
the DWARF CFI record associated with the PC.

Now, in many cases, if the first method had to back up the PC by one,
we *still* use the second method too, because of this piece of code:

    // Or if we're in the middle of the stack (and not "above" an asynchronous event like sigtramp),
    // and our "current" pc is the start of a function...
    if (m_sym_ctx_valid
        && GetNextFrame()->m_frame_type != eTrapHandlerFrame
        && GetNextFrame()->m_frame_type != eDebuggerFrame
        && addr_range.GetBaseAddress().IsValid()
        && addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection()
        && addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset())
    {
        decr_pc_and_recompute_addr_range = true;
    }

In many cases, when the PC is one beyond the end of the current function,
it will indeed then be exactly at the start of the next function.  But this
is not always the case, e.g. if there happens to be alignment padding
between the end of one function and the start of the next.

In those cases, we may sucessfully look up the function symbol via
ResolveSymbolContextForAddress, but *not* set decr_pc_and_recompute_addr_range,
and therefore fail to find the correct DWARF CFI record.

A very simple fix for this problem is to just never use the first method.
Call ResolveSymbolContextForAddress with resolve_tail_call_address set
to false, which will cause it to fail if the PC is beyond the end of
the current function; or else, identify the next function if the PC
is also at the start of the next function.  In either case, we will
then set the decr_pc_and_recompute_addr_range variable and back up the
PC anyway, but this time also find the correct DWARF CFI.

A related problem is that the ResolveSymbolContextForAddress sometimes
returns a "symbol" with empty name.  This turns out to be an ELF section
symbol.  Now, usually those get type eSymbolTypeInvalid.  However, there
is code in ObjectFileELF::ParseSymbols that tries to change the type of
invalid symbols to eSymbolTypeCode or eSymbolTypeData if the symbol
lies within the code or data section.

Unfortunately, this check also hits the symbol for the code section
itself, which is then marked as eSymbolTypeCode.  While the size of
the section symbol is 0 according to the ELF file, LLDB considers
this size invalid and attempts to figure out the "correct" size.
Depending on how this goes, we may end up with a symbol that overlays
part of the code section, even outside areas covered by real function
symbols.

Therefore, if we call ResolveSymbolContextForAddress with PC pointing
beyond the end of a function, we may get this bogus section symbol.
This again means InitializeNonZerothFrame thinks we have a valid PC,
but then we don't find any unwind info for it.

The fix for this problem is me to simply always leave ELF section
symbols as type eSymbolTypeInvalid.

Differential Revision: http://reviews.llvm.org/D18975

llvm-svn: 267363
2016-04-24 20:49:56 +00:00
Ulrich Weigand bb00d0b6b2 Support Linux on SystemZ as platform
This patch adds support for Linux on SystemZ:
- A new ArchSpec value of eCore_s390x_generic
- A new directory Plugins/ABI/SysV-s390x providing an ABI implementation
- Register context support
- Native Linux support including watchpoint support
- ELF core file support
- Misc. support throughout the code base (e.g. breakpoint opcodes)
- Test case updates to support the platform

This should provide complete support for debugging the SystemZ platform.
Not yet supported are optional features like transaction support (zEC12)
or SIMD vector support (z13).

There is no instruction emulation, since our ABI requires that all code
provide correct DWARF CFI at all PC locations in .eh_frame to support
unwinding (i.e. -fasynchronous-unwind-tables is on by default).

The implementation follows existing platforms in a mostly straightforward
manner.  A couple of things that are different:

- We do not use PTRACE_PEEKUSER / PTRACE_POKEUSER to access single registers,
  since some registers (access register) reside at offsets in the user area
  that are multiples of 4, but the PTRACE_PEEKUSER interface only allows
  accessing aligned 8-byte blocks in the user area.  Instead, we use a s390
  specific ptrace interface PTRACE_PEEKUSR_AREA / PTRACE_POKEUSR_AREA that
  allows accessing a whole block of the user area in one go, so in effect
  allowing to treat parts of the user area as register sets.

- SystemZ hardware does not provide any means to implement read watchpoints,
  only write watchpoints.  In fact, we can only support a *single* write
  watchpoint (but this can span a range of arbitrary size).  In LLDB this
  means we support only a single watchpoint.  I've set all test cases that
  require read watchpoints (or multiple watchpoints) to expected failure
  on the platform.  [ Note that there were two test cases that install
  a read/write watchpoint even though they nowhere rely on the "read"
  property.  I've changed those to simply use plain write watchpoints. ]

Differential Revision: http://reviews.llvm.org/D18978

llvm-svn: 266308
2016-04-14 14:28:34 +00:00