Commit Graph

458 Commits

Author SHA1 Message Date
Daniel Dunbar f30f4a5887 TableGen / AsmMatcher: Tweaks to avoid generating completely bogus match
functions.
 - Fix variant flattening when the variant embeds an operand reference.

 - Ignore instructions which reference an operand multiple times (e.g., "xorb
   $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32").

llvm-svn: 78099
2009-08-04 20:36:45 +00:00
Daniel Dunbar b2aebed2dc Change MCOperand to use Create style instead of Make style for constructing
operands.

llvm-svn: 77837
2009-08-02 00:09:22 +00:00
Daniel Dunbar b6d6aa2d22 llvm-mc: Match a few X86 instructions.
- This is "experimental" code, I am feeling my way around and working out the
   best way to do things (and learning tblgen in the process). Comments welcome,
   but keep in mind this stuff will change radically.

 - This is enough to match "subb" and friends, but not much else. The next step is to
   automatically generate the matchers for individual operands.

llvm-svn: 77657
2009-07-31 02:32:59 +00:00
Daniel Dunbar da6efdcd22 Remove unintended changes.
llvm-svn: 77616
2009-07-30 18:29:44 +00:00
Daniel Dunbar 132f78395a Twines: Don't allow implicit conversion from integers, this is too tricky.
llvm-svn: 77605
2009-07-30 17:37:43 +00:00
Daniel Dunbar 0033199c50 Match X86 register names to number.
llvm-svn: 77404
2009-07-29 00:02:19 +00:00
Daniel Dunbar e2eec05e60 tblgen/AsmMatcher: Emit simple matcher for register names.
llvm-svn: 76212
2009-07-17 18:51:11 +00:00
Daniel Dunbar 3085b57bb8 Stub out assembly matcher (.s -> MCInst) tblgen backend.
llvm-svn: 75378
2009-07-11 19:39:44 +00:00