Commit Graph

105499 Commits

Author SHA1 Message Date
Matt Arsenault c6ae7b4763 R600/SI: Default to no single precision denormals.
llvm-svn: 213017
2014-07-14 23:40:43 +00:00
Alp Toker 6be46b8ae5 Revert "Revert "Move clang feature flags settings out of LLVM core and into cfe""
It turns out this commit was fine. The problem was in the legacy build system (fixed r213010).

This reverts commit r213005.

llvm-svn: 213015
2014-07-14 23:30:31 +00:00
Lang Hames c832ae3eae [RuntimeDyld] Handle endiannes differences between the host and target while
reading MachO files magic numbers in RuntimeDyld.

This is required now that we're testing cross-platform JITing (via
RuntimeDyldChecker), and should fix some issues that David Fang has seen on PPC
builds.

llvm-svn: 213012
2014-07-14 23:19:50 +00:00
Adam Nemet cf7c905cfb [X86] Specify all TSFlags bit-offsets symbolically
No functional change.

The offsets for the other bitfields are specified symbolically.  I need to
increase the size for one of the earlier fields which is easier after this
cleanup.

Why these bits are relative to VEXShift is a bit strange but that is for
another cleanup.

I made sure that the values for the enums are unchanged after this change.

llvm-svn: 213011
2014-07-14 23:18:39 +00:00
David Majnemer 8bce66b093 CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF
COFF lacks a feature that other object file formats support: mergeable
sections.

To work around this, MSVC sticks constant pool entries in special COMDAT
sections so that each constant is in it's own section.  This permits
unused constants to be dropped and it also allows duplicate constants in
different translation units to get merged together.

This fixes PR20262.

Differential Revision: http://reviews.llvm.org/D4482

llvm-svn: 213006
2014-07-14 22:57:27 +00:00
Alp Toker 2034ac8181 Revert "Move clang feature flags settings out of LLVM core and into cfe"
This broke one of the builds, presumably side-by-side modular CMake.
Investigating.

This reverts commit r212998.

llvm-svn: 213005
2014-07-14 22:54:22 +00:00
Alp Toker 6a10223d4a Fix a -Wunused-local-typedefs warning
llvm-svn: 213002
2014-07-14 22:46:45 +00:00
Andrea Di Biagio 3960a9571f [DAGCombiner] Add more rules to combine shuffle vector dag nodes.
This patch teaches the DAGCombiner how to fold a pair of shuffles
according to rules:
  1.  shuffle(shuffle A, B, M0), B, M1) -> shuffle(A, B, M2)
  2.  shuffle(shuffle A, B, M0), A, M1) -> shuffle(A, B, M3)

The new rules would only trigger if the resulting shuffle has legal type and
legal mask.

Added test 'combine-vec-shuffle-3.ll' to verify that DAGCombiner correctly
folds shuffles on x86 when the resulting mask is legal. Also added some negative
cases to verify that we avoid introducing illegal shuffles.

llvm-svn: 213001
2014-07-14 22:46:26 +00:00
Matt Arsenault caa9c71f32 Look through addrspacecast in IsConstantOffsetFromGlobal
llvm-svn: 213000
2014-07-14 22:39:26 +00:00
Matt Arsenault fd78d0c934 Look through addrspacecast in GetPointerBaseWithConstantOffset
llvm-svn: 212999
2014-07-14 22:39:22 +00:00
Alp Toker 7746d9b033 Move clang feature flags settings out of LLVM core and into cfe
clang r212997 incorporated these settings into its own build system.  They no
longer need to be set from LLVM.

llvm-svn: 212998
2014-07-14 22:19:04 +00:00
David Majnemer 5a1c4b8283 CodeGen: Add a getSectionKind method to MachineConstantPoolEntry
This is just a helper routine, no functionality has changed.

llvm-svn: 212993
2014-07-14 22:06:29 +00:00
Matt Arsenault eb9e5f41a6 Convert test to FileCheck
llvm-svn: 212992
2014-07-14 21:59:26 +00:00
David Majnemer 54b2d64cdc ADT: Surface LowerCase argument for utohexstr
The underlying function. utohex_buffer, already supports an argument for
deciding if the hex characters should be upper or lower case.  Expose an
identical argument for utohexstr.

llvm-svn: 212991
2014-07-14 21:56:54 +00:00
Sanjay Patel a56f8c227c removed circular definitions in comments
llvm-svn: 212990
2014-07-14 21:51:59 +00:00
Justin Bogner 759645ea89 Support: Fix option handling when using cl::Required with aliasopt
Until now, attempting to create an alias of a required option would
complain if the user supplied the alias, because the required option
didn't have a value. Similarly, if you said the alias was required,
then using the base option would complain that the alias wasn't
supplied. Lastly, if you put required on both, *neither* option would
work.

By changning alias to overload addOccurrence and setting cl::Required
on the original option, we can get this to behave in a more useful
way. I've also added a test and updated a user that was getting this
wrong.

llvm-svn: 212986
2014-07-14 20:53:57 +00:00
David Majnemer b8f435ca70 Fix a test broken in r212981
@icmp_sdiv_neg1 should have referred to %a instead of %call, it was
renamed at the last second.

llvm-svn: 212983
2014-07-14 20:46:04 +00:00
David Majnemer af9180fd04 InstSimplify: Correct sdiv x / -1
Determining the bounds of x/ -1 would start off with us dividing it by
INT_MIN.  Suffice to say, this would not work very well.

Instead, handle it upfront by checking for -1 and mapping it to the
range: [INT_MIN + 1, INT_MAX.  This means that the result of our
division can be any value other than INT_MIN.

llvm-svn: 212981
2014-07-14 20:38:45 +00:00
Sanjay Patel 8c98230248 fixed link
llvm-svn: 212977
2014-07-14 19:52:36 +00:00
David Majnemer 5ea4fc0b33 InstSimplify: The upper bound of X / C was missing a rounding step
Summary:
When calculating the upper bound of X / -8589934592, we would perform
the following calculation: Floor[INT_MAX / 8589934592]

However, flooring the result would make us wrongly come to the
conclusion that 1073741824 was not in the set of possible values.
Instead, use the ceiling of the result.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4502

llvm-svn: 212976
2014-07-14 19:49:57 +00:00
Justin Bogner 973b2ff322 Support: Use a range-based for
llvm-svn: 212973
2014-07-14 19:24:13 +00:00
Matt Arsenault 199b39e063 Look through addrspacecast when checking isDereferenceablePointer
llvm-svn: 212971
2014-07-14 18:54:12 +00:00
Nick Lewycky 703e488ed9 Don't eliminate memcpy's when the address of the pointer may itself be relevant. Fixes PR18304. Patch by David Wiberg!
llvm-svn: 212970
2014-07-14 18:52:02 +00:00
Bill Wendling c80b6c92e2 Unify the lowering of arguments during SjLj prepare.
The 'select true, %arg, undef' instruction can be used for both aggregate and
non-aggregate arguments.

llvm-svn: 212967
2014-07-14 18:21:11 +00:00
Sanjay Patel b49bf168f2 fixed typo
llvm-svn: 212966
2014-07-14 18:21:07 +00:00
Matt Arsenault d0d6c0b4c9 Use pointer type cast helpers.
llvm-svn: 212963
2014-07-14 17:24:38 +00:00
Matt Arsenault 740980ee69 Add CreatePointerBitCastOrAddrSpaceCast to IRBuilder and co.
llvm-svn: 212962
2014-07-14 17:24:35 +00:00
Matt Arsenault 62c836fd3b Update comments to include addrspacecast
llvm-svn: 212961
2014-07-14 17:24:31 +00:00
Matt Arsenault 73064e1429 Remove GCC 3.3 workaround
llvm-svn: 212960
2014-07-14 17:11:20 +00:00
Saleem Abdulrasool b51d464f1e X86: correct 64-bit atomics on 32-bit
We would emit a libcall for a 64-bit atomic on x86 after SVN r212119.  This was
due to the misuse of hasCmpxchg16 to indicate if cmpxchg8b was supported on a
32-bit target.  They were added at different times and would result in the
border condition being mishandled.

This fixes the border case to emit the cmpxchg8b instruction for 64-bit atomic
operations on x86 at the cost of restoring a long-standing bug in the codegen.
We emit a cmpxchg8b on all x86 targets even where the CPU does not support this
instruction (pre-Pentium CPUs).  Although this bug should be fixed, this was
present prior to SVN r212119 and this change, so this is not really introducing
a regression.

llvm-svn: 212956
2014-07-14 16:28:13 +00:00
Saleem Abdulrasool 271ac58eb3 CodeGen: add missing include
Found during windows unwinding work.  This header is indirectly included through
a chain leading through Support/Win64EH.h.  Explicitly include the header.  NFC.

llvm-svn: 212955
2014-07-14 16:28:09 +00:00
David Majnemer 8f6b04cb57 llvm-objdump: Handle BSS sections larger than the object file
The size of the uninitialized sections, like BSS, can exceed the size of
the object file.

Do not attempt to grab the contents of such sections.

llvm-svn: 212953
2014-07-14 16:20:14 +00:00
Tim Northover 6c647eae8b X86: remove temporary atomicrmw used during lowering.
We construct a temporary "atomicrmw xchg" instruction when lowering atomic
stores for widths that aren't supported natively. This isn't on the top-level
worklist though, so it won't be removed automatically and we have to do it
ourselves once that itself has been lowered.

Thanks Saleem for pointing this out!

llvm-svn: 212948
2014-07-14 15:31:13 +00:00
Daniel Sanders 41ffa5d1ba Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags
The lld tests will temporarily fail again but Simon Atanasyan will commit a fix for those shortly.

llvm-svn: 212946
2014-07-14 15:05:51 +00:00
Daniel Sanders cb0d36e592 Revert: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags
This commit causes multiple lld tests to fail. Reverting while I investigate the issue.

llvm-svn: 212945
2014-07-14 14:43:45 +00:00
Daniel Sanders 8e254166e1 [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags
Summary:
.bss, .text, and .data are at least 16-byte aligned.
.reginfo is 4-byte aligned and has a 24-byte EntrySize.
.MIPS.abiflags has an 24-byte EntrySize.
.MIPS.options is 8-byte aligned and has 1-byte EntrySize.

Using a 1-byte EntrySize for .MIPS.options seems strange because the
records are neither 1-byte long nor fixed-length but this matches the value
that GAS emits.

Differential Revision: http://reviews.llvm.org/D4487

llvm-svn: 212939
2014-07-14 14:02:14 +00:00
Daniel Sanders 7ddb0ab85f [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.
Summary:
This is because the FP64A the hardware will redirect 32-bit reads/writes
from/to odd-numbered registers to the upper 32-bits of the corresponding
even register. In effect, simulating FR=0 mode when FR=0 mode is not
available.

Unfortunately, we have to make the decision to avoid mfc1/mtc1 before
register allocation so we currently do this for even registers too.

FPXX has a similar requirement on 32-bit architectures that lack
mfhc1/mthc1 so this patch also handles the affected moves from the FPU for
FPXX too. Moves to the FPU were supported by an earlier commit.

Differential Revision: http://reviews.llvm.org/D4484

llvm-svn: 212938
2014-07-14 13:08:14 +00:00
Daniel Sanders 24e08fd5c0 [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves
Summary:
This is similar to r210771 which did the same thing for MTHC1.

Also corrected MTHC1_D32 and MTHC1_D64 which used AFGR64 and FGR64 on the
wrong definitions.

Differential Revision: http://reviews.llvm.org/D4483

llvm-svn: 212936
2014-07-14 12:41:31 +00:00
NAKAMURA Takumi 6a931f507a [CMake][Win32.DLL] Let llvm_add_library(SHARED) link dependent libraries as PRIVATE.
For example, c-index-test.exe requires just libclang.dll (its import library).
When libraries in libclang were not PRIVATE but PUBLIC, c-index-test required libraries transitive by libclang.

Note, on mingw with BUILD_SHARED_LIBS, library dependencies would become more strict.
In principle, required libraries should be "required in its source file".

This will help to detect missing dependencies.

llvm-svn: 212934
2014-07-14 12:26:15 +00:00
Tim Northover 3cb24110b1 AArch64: remove unnecessary pseudo-instruction.
Sufficiently twisted use of TableGen lets us write patterns directly for f16
(as an i16 promoted to i32) -> f32 conversion.

llvm-svn: 212933
2014-07-14 11:16:02 +00:00
Daniel Sanders 9ee2aee859 [mips] Correct the AFL_FLAGS1_ODDSPREG flag in .MIPS.abiflags when no '.module oddspreg' is used
Differential Revision: http://reviews.llvm.org/D4486

llvm-svn: 212932
2014-07-14 10:26:15 +00:00
Sasa Stankovic b976fee83c [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is
enabled and mthc1 and dmtc1 are not available (e.g. on MIPS32r1)

This prevents the upper 32-bits of a double precision value from being moved to
the FPU with mtc1 to an odd-numbered FPU register. This is necessary to ensure
that the code generated executes correctly regardless of the current FPU mode.

MIPS32r2 and above continues to use mtc1/mthc1, while MIPS-IV and above continue
to use dmtc1.

Differential Revision: http://reviews.llvm.org/D4465

llvm-svn: 212930
2014-07-14 09:40:29 +00:00
Bill Wendling 151b44d653 Support lowering of empty aggregates.
This crash was pretty common while compiling Rust for iOS (armv7). Reason -
SjLj preparation step was lowering aggregate arguments as ExtractValue +
InsertValue. ExtractValue has assertion which checks that there is some data in
value, which is not true in case of empty (no fields) structures. Rust uses
them quite extensively so this patch uses a 'select true, %val, undef'
instruction to lower the argument.

Patch by Valerii Hiora.

llvm-svn: 212922
2014-07-14 06:22:36 +00:00
NAKAMURA Takumi 5c40508457 [CMake] LINK_COMPONENTS: Add also corresponding MCTargetDesc and TargetInfo as well, when target names or "nativecodegen" are specified.
llvm-svn: 212921
2014-07-14 05:07:07 +00:00
NAKAMURA Takumi 23b702c8de [CMake] Update libdeps.
llvm-svn: 212920
2014-07-14 05:01:53 +00:00
NAKAMURA Takumi c3b3897e8a NVPTX/LLVMBuild.txt: Add "Scalar" to required_libraries. It is really referenced.
llvm-svn: 212918
2014-07-14 02:52:19 +00:00
NAKAMURA Takumi a56f860e29 Object/LLVMBuild.txt: Sort required_libraries by alphabetical order.
llvm-svn: 212917
2014-07-14 02:52:08 +00:00
Andrea Di Biagio 67d8b2e2b0 [DAGCombiner] Fix a crash caused by a missing check for legal type when trying to fold shuffles.
Verify that DAGCombiner does not crash when trying to fold a pair of shuffles
according to rule (added at r212539):
  (shuffle (shuffle A, Undef, M0), Undef, M1) -> (shuffle A, Undef, M2)

The DAGCombiner avoids folding shuffles if the resulting shuffle dag node
is not legal for the target. That means, the resulting shuffle must have
legal type and legal mask.

Before, the DAGCombiner only called method
'TargetLowering::isShuffleMaskLegal' to check if it was "safe" to fold according
to the above-mentioned rule. However, this caused a crash in the x86 backend
since method 'isShuffleMaskLegal' always expects to be called on a
legal vector type.

llvm-svn: 212915
2014-07-13 21:02:14 +00:00
Saleem Abdulrasool c7c3cb1f4e MC: make MCWin64EHInstruction a POD-like struct
This is the first of a number of changes designed to generalise
MCWin64EHInstruction to support different target architectures.  An ordered set
(vector) of these instructions is saved per frame to permit the emission of
information for Windows NT style unwinding.  The only bit of information which
is actually target specific here is the Opcode for the unwinding bytecode.  The
remainder of the information is simply generic information that is relevant to
the Windows NT unwinding model.

Remove the accessors for the fields, making them const and public instead.  Sink
the knowledge of the alias'ed name into the single source and sink a single-use
check method into the use.

llvm-svn: 212914
2014-07-13 19:03:45 +00:00
Saleem Abdulrasool 5705cd8cf6 MC: make helper function be more const-correct
Introduce const-ness on parameters, they are used as read-only and should not be
modified.  NFC.

llvm-svn: 212913
2014-07-13 19:03:40 +00:00