Matt Arsenault
33e3ecee0c
AMDGPU: Reduce 64-bit SRAs
...
llvm-svn: 258096
2016-01-18 22:09:04 +00:00
Matt Arsenault
6e3a45193a
AMDGPU: Split 64-bit and of constant up
...
This breaks the tests that were meant for testing
64-bit inline immediates, so move those to shl where
they won't be broken up.
This should be repeated for the other related bit ops.
llvm-svn: 258095
2016-01-18 22:01:13 +00:00
Matt Arsenault
3cbbc10488
AMDGPU: Generalize shl combine
...
Reduce 64-bit shl with constant > 32. We already special cased
this for the == 32 case, but this also works for any >= 32 constant.
llvm-svn: 258092
2016-01-18 21:55:14 +00:00
Matt Arsenault
80edab99ff
AMDGPU: Reduce 64-bit lshr by constant to 32-bit
...
64-bit shifts are very slow on some subtargets.
llvm-svn: 258090
2016-01-18 21:43:36 +00:00