Commit Graph

36 Commits

Author SHA1 Message Date
Konrad Kleine 248a13057a [lldb] NFC modernize codebase with modernize-use-nullptr
Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codebase by using
`nullptr` instread of `0` or `NULL`. See
https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-nullptr.html
for more information.

This is the command I ran and I to fix and format the code base:

```
run-clang-tidy.py \
	-header-filter='.*' \
	-checks='-*,modernize-use-nullptr' \
	-fix ~/dev/llvm-project/lldb/.* \
	-format \
	-style LLVM \
	-p ~/llvm-builds/debug-ninja-gcc
```

NOTE: There were also changes to `llvm/utils/unittest` but I did not
include them because I felt that maybe this library shall be updated in
isolation somehow.

NOTE: I know this is a rather large commit but it is a nobrainer in most
parts.

Reviewers: martong, espindola, shafik, #lldb, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, JDevlieghere, teemperor, rnkovacs, emaste, kubamracek, nemanjai, ki.stfu, javed.absar, arichardson, kbarton, jrtc27, MaskRay, atanasyan, dexonsmith, arphaman, jfb, jsji, jdoerfert, lldb-commits, llvm-commits

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D61847

llvm-svn: 361484
2019-05-23 11:14:47 +00:00
Jonas Devlieghere 8b3af63b89 [NFC] Remove ASCII lines from comments
A lot of comments in LLDB are surrounded by an ASCII line to delimit the
begging and end of the comment.

Its use is not really consistent across the code base, sometimes the
lines are longer, sometimes they are shorter and sometimes they are
omitted. Furthermore, it looks kind of weird with the 80 column limit,
where the comment actually extends past the line, but not by much.
Furthermore, when /// is used for Doxygen comments, it looks
particularly odd. And when // is used, it incorrectly gives the
impression that it's actually a Doxygen comment.

I assume these lines were added to improve distinguishing between
comments and code. However, given that todays editors and IDEs do a
great job at highlighting comments, I think it's worth to drop this for
the sake of consistency. The alternative is fixing all the
inconsistencies, which would create a lot more churn.

Differential revision: https://reviews.llvm.org/D60508

llvm-svn: 358135
2019-04-10 20:48:55 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Jonas Devlieghere a6682a413d Simplify Boolean expressions
This patch simplifies boolean expressions acorss LLDB. It was generated
using clang-tidy with the following command:

run-clang-tidy.py -checks='-*,readability-simplify-boolean-expr' -format -fix $PWD

Differential revision: https://reviews.llvm.org/D55584

llvm-svn: 349215
2018-12-15 00:15:33 +00:00
Jonas Devlieghere 672d2c1255 Remove comments after header includes.
This patch removes the comments following the header includes. They were
added after running IWYU over the LLDB codebase. However they add little
value, are often outdates and burdensome to maintain.

Differential revision: https://reviews.llvm.org/D54385

llvm-svn: 346625
2018-11-11 23:16:43 +00:00
Pavel Labath d821c997aa Move RegisterValue,Scalar,State from Core to Utility
These three classes have no external dependencies, but they are used
from various low-level APIs. Moving them down to Utility improves
overall code layering (although it still does not break any particular
dependency completely).

The XCode project will need to be updated after this change.

Differential Revision: https://reviews.llvm.org/D49740

llvm-svn: 339127
2018-08-07 11:07:21 +00:00
Tatyana Krasnukha 04803b3ef2 Change AddressClass type from 'enum' to 'enum class'.
If we have a function with signature f(addr_t, AddressClass), it is easy to muddle up the order of arguments without any warnings from compiler. 'enum class' prevents passing integer in place of AddressClass and vice versa.

llvm-svn: 335599
2018-06-26 13:06:54 +00:00
Adrian Prantl 05097246f3 Reflow paragraphs in comments.
This is intended as a clean up after the big clang-format commit
(r280751), which unfortunately resulted in many of the comment
paragraphs in LLDB being very hard to read.

FYI, the script I used was:

import textwrap
import commands
import os
import sys
import re
tmp = "%s.tmp"%sys.argv[1]
out = open(tmp, "w+")
with open(sys.argv[1], "r") as f:
  header = ""
  text = ""
  comment = re.compile(r'^( *//) ([^ ].*)$')
  special = re.compile(r'^((([A-Z]+[: ])|([0-9]+ )).*)|(.*;)$')
  for line in f:
      match = comment.match(line)
      if match and not special.match(match.group(2)):
          # skip intentionally short comments.
          if not text and len(match.group(2)) < 40:
              out.write(line)
              continue

          if text:
              text += " " + match.group(2)
          else:
              header = match.group(1)
              text = match.group(2)

          continue

      if text:
          filled = textwrap.wrap(text, width=(78-len(header)),
                                 break_long_words=False)
          for l in filled:
              out.write(header+" "+l+'\n')
              text = ""

      out.write(line)

os.rename(tmp, sys.argv[1])

Differential Revision: https://reviews.llvm.org/D46144

llvm-svn: 331197
2018-04-30 16:49:04 +00:00
Pavel Labath 5f19b90783 Move ArchSpec to the Utility module
The rationale here is that ArchSpec is used throughout the codebase,
including in places which should not depend on the rest of the code in
the Core module.

This commit touches many files, but most of it is just renaming of
 #include lines. In a couple of cases, I removed the #include ArchSpec
line altogether, as the file was not using it. In one or two places,
this necessitated adding other #includes like lldb-private-defines.h.

llvm-svn: 318048
2017-11-13 16:16:33 +00:00
Benjamin Kramer e1a6074b52 Remove uses of std::auto_ptr, it's going away in C++17.
std::unique_ptr is pretty much a drop-in replacement here. Also remove nullptr
checks that are doing nothing.

llvm-svn: 313265
2017-09-14 15:01:55 +00:00
Zachary Turner 97206d5727 Rename Error -> Status.
This renames the LLDB error class to Status, as discussed
on the lldb-dev mailing list.

A change of this magnitude cannot easily be done without
find and replace, but that has potential to catch unwanted
occurrences of common strings such as "Error".  Every effort
was made to find all the obvious things such as the word "Error"
appearing in a string, etc, but it's possible there are still
some lingering occurences left around.  Hopefully nothing too
serious.

llvm-svn: 302872
2017-05-12 04:51:55 +00:00
Zachary Turner 2f3df6137a iwyu fixes for lldbCore.
This adjusts header file includes for headers and source files
in Core.  In doing so, one dependency cycle is eliminated
because all the includes from Core to that project were dead
includes anyway.  In places where some files in other projects
were only compiling due to a transitive include from another
header, fixups have been made so that those files also include
the header they need.  Tested on Windows and Linux, and plan
to address failures on OSX and FreeBSD after watching the
bots.

llvm-svn: 299714
2017-04-06 21:28:29 +00:00
Zachary Turner 666cc0b291 Move DataBuffer / DataExtractor and friends from Core -> Utility.
llvm-svn: 296943
2017-03-04 01:30:05 +00:00
Zachary Turner bf9a77305f Move classes from Core -> Utility.
This moves the following classes from Core -> Utility.

ConstString
Error
RegularExpression
Stream
StreamString

The goal here is to get lldbUtility into a state where it has
no dependendencies except on itself and LLVM, so it can be the
starting point at which to start untangling LLDB's dependencies.
These are all low level and very widely used classes, and
previously lldbUtility had dependencies up to lldbCore in order
to use these classes.  So moving then down to lldbUtility makes
sense from both the short term and long term perspective in
solving this problem.

Differential Revision: https://reviews.llvm.org/D29427

llvm-svn: 293941
2017-02-02 21:39:50 +00:00
Mehdi Amini 36d33fc109 Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC)
llvm-svn: 283018
2016-10-01 06:46:33 +00:00
Kate Stone b9c1b51e45 *** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style.  This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort.  Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit.  The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

    find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
    find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit.  There are alternatives available that will attempt
to look through this change and find the appropriate prior commit.  YMMV.

llvm-svn: 280751
2016-09-06 20:57:50 +00:00
Nitesh Jain f5cadce1cd [LLVM][MIPS] Add (D)SUBU, (D)ADDU, LUI instructions emulation . Fix emulation for (D)ADDIU, SD/SW and LW/LD instructions
Reviewers: clayborg, jaydeep, bhushan

Subscribers: mohit.bhakkad, slthakur, sdardis, lldb-commits

Differential Revision: https://reviews.llvm.org/D20357

llvm-svn: 277426
2016-08-02 07:18:07 +00:00
Sagar Thakur 4a716226a5 [LLDB][MIPS] Fix Emulation of Compact branch and ADDIU instructions
Patch by Nitesh Jain.

This patch contains 2 changes:

  - Corrected target address calculation of compact branch instructions to reflect changes in disassembler (http://reviews.llvm.org/D17540).
  - Added emulation for (missing) 'Addiu' instruction.

Reviewers :jaydeep, bhushan, clayborg
Differential: http://reviews.llvm.org/D21064

llvm-svn: 273535
2016-06-23 06:40:37 +00:00
Ulrich Weigand b00ef10b70 Make Scalar::GetBytes and RegisterValue::GetBytes const
Scalar::GetBytes provides a non-const access to the underlying bytes
of the scalar value, supposedly allowing for modification of those
bytes.  However, even with the current implementation, this is not
really possible.  For floating-point scalars, the pointer returned
by GetBytes refers to a temporary copy; modifications to that copy
will be simply ignored.  For integer scalars, the pointer refers
to internal memory of the APInt implementation, which isn't
supposed to be directly modifyable; GetBytes simply casts aways
the const-ness of the pointer ...

With my upcoming patch to fix Scalar::GetBytes for big-endian
systems, this problem is going to get worse, since there we need
temporary copies even for some integer scalars.  Therefore, this
patch makes Scalar::GetBytes const, fixing all those problems.

As a follow-on change, RegisterValues::GetBytes must be made const
as well.  This in turn means that the way of initializing a
RegisterValue by doing a SetType followed by writing to GetBytes
no longer works.  Instead, I've changed SetValueFromData to do
the equivalent of SetType itself, and then re-implemented
SetFromMemoryData to work on top of SetValueFromData. 

There is still a need for RegisterValue::SetType, since some
platform-specific code uses it to reinterpret the contents of
an already filled RegisterValue.  To make this usage work in
all cases (even changing from a type implemented via Scalar
to a type implemented as a byte buffer), SetType now simply
copies the old contents out, and then reloads the RegisterValue
from this data using the new type via SetValueFromData.

This in turn means that there is no remaining caller of
Scalar::SetType, so it can be removed.

The only other follow-on change was in MIPS EmulateInstruction
code, where some uses of RegisterValue::GetBytes could be made
const trivially.

Differential Revision: http://reviews.llvm.org/D18980

llvm-svn: 266310
2016-04-14 14:31:08 +00:00
Benjamin Kramer 79dad1d056 Update for LLVM change
llvm-svn: 258819
2016-01-26 16:45:00 +00:00
Zachary Turner a505be4e5d Fix some compiler warnings with MSVC 2015.
llvm-svn: 257671
2016-01-13 21:22:00 +00:00
Bhushan D. Attarde 6fd916cd0c Fix build warnings after rL256915
llvm-svn: 256929
2016-01-06 12:08:22 +00:00
Bhushan D. Attarde f2be8df54b [LLDB][MIPS32]Merge emulation of similar instructions
SUMMARY:
    This patch merges emulation of similar instructions into a single function (wherever possible) to remove code duplication.
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, jaydeep, lldb-commits
    Differential Revision: http://reviews.llvm.org/D15886

llvm-svn: 256915
2016-01-06 05:44:02 +00:00
Mohit K. Bhakkad 8087745c47 Addressing warning due to rL249651
llvm-svn: 249809
2015-10-09 06:34:52 +00:00
Mohit K. Bhakkad e990bfe117 [LLDB][MIPS] microMIPS load/store instruction emulation for hardware watchpoints
Reviewers: clayborg.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D13493

llvm-svn: 249651
2015-10-08 03:34:11 +00:00
Bhushan D. Attarde f55a0a47cf [MIPS] Emulate microMIPS instructions
SUMMARY:
    This patch includes:

    1. Emulation of prologue/epilogue and branch instructions for microMIPS.
    2. Setting up alternate disassembler (to be used for microMIPS).
       So there will be two disassembler instances, one for microMIPS and other for MIPS.
       Appropriate disassembler will be used based on the address class of instruction address.

    3. Some of the branch instructions does not have fixed sized delay slot, that means delay slot instruction can be of 2-byte or 4-byte.
       For this "m_next_inst_size" has been introduced which stores the size of next instruction (i.e size of delay slot instruction in case of branch).
       This can be used wherever the size of next instruction is required.

    4. A minor change to use mips32 register names instead of mips64 names.
    
    Reviewers: clayborg, tberghammer
    Subscribers: mohit.bhakkad, sagar, jaydeep, nitesh.jain, lldb-commits
    Differential Revision: http://reviews.llvm.org/D13282 

llvm-svn: 249381
2015-10-06 08:52:08 +00:00
Tamas Berghammer 3f934e4b13 Fix register names in EmulateInstructionMIPS.cpp
llvm-svn: 248281
2015-09-22 15:04:39 +00:00
Sagar Thakur af368f6e88 [MIPS32] Emulate MSA instructions for MIPS32
This patch adds MSA branch instruction emulation for MIPS32.

Reviewers: tberghammer, jaydeep
Subscribers: mohit.bhakkad, bhushan, nitesh.jain
Differential: http://reviews.llvm.org/D12898
llvm-svn: 248277
2015-09-22 13:57:11 +00:00
Jason Molenda 63bd0db071 Clean up register naming conventions inside lldb.
"gcc" register numbers are now correctly referred to as "ehframe"
register numbers.  In almost all cases, ehframe and dwarf register
numbers are identical (the one exception is i386 darwin where ehframe
regnums were incorrect).

The old "gdb" register numbers, which I incorrectly thought were
stabs register numbers, are now referred to as "Process Plugin"
register numbers.  This is the register numbering scheme that the
remote process controller stub (lldb-server, gdbserver, core file
support, kdp server, remote jtag devices, etc) uses to refer to the
registers.  The process plugin register numbers may not be contiguous
- there are remote jtag devices that have gaps in their register
numbering schemes.

I removed all of the enums for "gdb" register numbers that we had
in lldb - these were meaningless - and I put LLDB_INVALID_REGNUM
in all of the register tables for the Process Plugin regnum slot.

This change is almost entirely mechnical; the one actual change in
here is to ProcessGDBRemote.cpp's ParseRegisters() which parses the
qXfer:features:read:target.xml response.  As it parses register
definitions from the xml, it will assign sequential numbers as the
eRegisterKindLLDB numbers (the lldb register numberings must be
sequential, without any gaps) and if the xml file specifies register
numbers, those will be used as the eRegisterKindProcessPlugin
register numbers (and those may have gaps).  A J-Link jtag device's
target.xml does contain a gap in register numbers, and it only 
specifies the register numbers for the registers after that gap.
The device supports many different ARM boards and probably selects
different part of its register file as appropriate.

http://reviews.llvm.org/D12791
<rdar://problem/22623262> 

llvm-svn: 247741
2015-09-15 23:20:34 +00:00
Mohit K. Bhakkad a73239f860 [LLDB][MIPS] MIPS load/store instruction emulation for hardware watchpoints
Reviewers: clayborg.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D12670

llvm-svn: 247129
2015-09-09 10:17:58 +00:00
Sagar Thakur 789da6678e [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This patch :

- Fixes offsets of all register sets for Mips.
- Adds MSA register set and FRE=1 mode support for FP register set.
- Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
- Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.

Reviewers: jaydeep, clayborg, jasonmolenda, ovyalov, emaste
Subscribers: tberghammer, ovyalov, emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential: http://reviews.llvm.org/D10919
llvm-svn: 245217
2015-08-17 13:40:17 +00:00
Oleksiy Vyalov 9dcdd2ee03 Revert r244308 since it's introducing test regressions on Linux:
- TestLldbGdbServer.py both clang & gcc, i386 and x86_64
 - TestConstVariables.py gcc, i386 and x86_64
 - 112 failures clang, i386

llvm-svn: 244514
2015-08-10 21:49:50 +00:00
Sagar Thakur d754890047 [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This change :

    - Fixes offsets of all register sets for Mips.
    - Adds MSA register set and FRE=1 mode support for FP register set.
    - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
    - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.
    - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types.

Reviewers : emaste, jaydeep, clayborg
Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential : http://reviews.llvm.org/D10919

llvm-svn: 244308
2015-08-07 06:39:38 +00:00
Jaydeep Patil 501a781998 [LLDB][MIPS] Detect MIPS application specific extensions like micromips
SUMMARY:
    The patch detects MIPS application specific extensions (ASE) like micromips by reading 
    ELF header.e_flags and SHT_MIPS_ABIFLAGS section. MIPS triple does not contain ASE 
    information like micromips, mips16, DSP, MSA etc. These can be read from header.e_flags 
    or SHT_MIPS_ABIFLAGS section.
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, lldb-commits
    Differential Revision: http://reviews.llvm.org/D11133

llvm-svn: 242381
2015-07-16 03:51:55 +00:00
Jaydeep Patil c60c94528c [LLDB][MIPS] MIPS32 branch emulation and single-stepping
SUMMARY:
    This patch implements
      1. Emulation of MIPS32 branch instructions
      2. Enable single-stepping for MIPS32 instructions
      3. Correction in emulation of MIPS64 branch instructions with delay slot
      4. Adjust breakpoint address when breakpoint is hit in a forbidden slot of compact branch instruction
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, bhushan, lldb-commits, emaste, nitesh.jain
    Differential Revision: http://reviews.llvm.org/D10596

llvm-svn: 240373
2015-06-23 03:37:08 +00:00
Bhushan D. Attarde 794a4d5a9f Assembly profiler for mips32
Summary:
Implementation of assembly profiler for MIPS32 using EmulateInstruction which currently scans only prologue/epilogue assembly instructions. It uses llvm::MCDisassembler to decode assembly instructions.

Reviewers: clayborg, jasonmolenda

Differential Revision: http://reviews.llvm.org/D9769

llvm-svn: 237420
2015-05-15 06:53:30 +00:00