OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
428,405 Commits 31 Branches 0 Tags 2.2 GiB
Commit Graph

1 Commits

Author SHA1 Message Date
Zi Xuan Wu a190fcdfcc [CSKY] Add inline asm constraints and related codegen support 
There are kinds of inline asm constraints and corresponding register class or register as following.

 'b': mGPRRegClass
 'v': sGPRRegClass
 'w': sFPR32RegClass or sFPR64RegClass
 'c': C register
 'z': R14 register
 'h': HI register
 'l': LO register
 'y': HI or LO register

It also adds codegen test for inline-asm including constraints, clobbers and abi names.
 2022-02-07 17:45:37 +08:00